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{
    "id": 814182,
    "url": "http://patchwork.ozlabs.org/api/patches/814182/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170915091812.13368-2-heiko@sntech.de/",
    "project": {
        "id": 37,
        "url": "http://patchwork.ozlabs.org/api/projects/37/?format=api",
        "name": "Devicetree Bindings",
        "link_name": "devicetree-bindings",
        "list_id": "devicetree.vger.kernel.org",
        "list_email": "devicetree@vger.kernel.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
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        "commit_url_format": ""
    },
    "msgid": "<20170915091812.13368-2-heiko@sntech.de>",
    "list_archive_url": null,
    "date": "2017-09-15T09:18:05",
    "name": "[v2,1/8] dt-bindings: gpu: mali-utgard: Add Rockchip Utgard Malis",
    "commit_ref": null,
    "pull_url": null,
    "state": "not-applicable",
    "archived": true,
    "hash": "ccf1ffe71280c7ac18eb8329d8c54ab7d6de7a12",
    "submitter": {
        "id": 10645,
        "url": "http://patchwork.ozlabs.org/api/people/10645/?format=api",
        "name": "Heiko Stübner",
        "email": "heiko@sntech.de"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170915091812.13368-2-heiko@sntech.de/mbox/",
    "series": [
        {
            "id": 3257,
            "url": "http://patchwork.ozlabs.org/api/series/3257/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=3257",
            "date": "2017-09-15T09:18:04",
            "name": "ARM: dts: rockchip: add Utgard Mali nodes for some socs",
            "version": 2,
            "mbox": "http://patchwork.ozlabs.org/series/3257/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/814182/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/814182/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<devicetree-owner@vger.kernel.org>",
        "X-Original-To": "incoming-dt@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming-dt@bilbo.ozlabs.org",
        "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)",
        "Received": [
            "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtqZS2KVXz9sRm\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tFri, 15 Sep 2017 19:18:24 +1000 (AEST)",
            "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751269AbdIOJSX (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tFri, 15 Sep 2017 05:18:23 -0400",
            "from gloria.sntech.de ([95.129.55.99]:48414 \"EHLO gloria.sntech.de\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751157AbdIOJSW (ORCPT <rfc822;devicetree@vger.kernel.org>);\n\tFri, 15 Sep 2017 05:18:22 -0400",
            "from p5b127fef.dip0.t-ipconnect.de ([91.18.127.239]\n\thelo=phil.sntech) by gloria.sntech.de with esmtpsa\n\t(TLS1.1:DHE_RSA_AES_256_CBC_SHA1:256)\n\t(Exim 4.80) (envelope-from <heiko@sntech.de>)\n\tid 1dsmlP-0007Vp-Jq; Fri, 15 Sep 2017 11:18:19 +0200"
        ],
        "From": "Heiko Stuebner <heiko@sntech.de>",
        "To": "linux-rockchip@lists.infradead.org",
        "Cc": "robh+dt@kernel.org, mark.rutland@arm.com,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tHeiko Stuebner <heiko@sntech.de>",
        "Subject": "[PATCH v2 1/8] dt-bindings: gpu: mali-utgard: Add Rockchip Utgard\n\tMalis",
        "Date": "Fri, 15 Sep 2017 11:18:05 +0200",
        "Message-Id": "<20170915091812.13368-2-heiko@sntech.de>",
        "X-Mailer": "git-send-email 2.14.1",
        "In-Reply-To": "<20170915091812.13368-1-heiko@sntech.de>",
        "References": "<20170915091812.13368-1-heiko@sntech.de>",
        "Sender": "devicetree-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<devicetree.vger.kernel.org>",
        "X-Mailing-List": "devicetree@vger.kernel.org"
    },
    "content": "Some (older or lower power) Rockchip socs use Utgard-based Mali-GPUs.\nSo add the necessary compatibles for them. As the setup is the same for\nall of them (needing only the additional reset line), they get added in\na somewhat condensed form, to not inflate the document unnecessary.\n\nSigned-off-by: Heiko Stuebner <heiko@sntech.de>\n---\n Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 8 ++++++++\n 1 file changed, 8 insertions(+)",
    "diff": "diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt\nindex b4ebd56d03f3..24aacafb2594 100644\n--- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt\n+++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt\n@@ -13,6 +13,10 @@ Required properties:\n       + allwinner,sun50i-h5-mali\n       + amlogic,meson-gxbb-mali\n       + amlogic,meson-gxl-mali\n+      + rockchip,rk3036-mali\n+      + rockchip,rk3066-mali\n+      + rockchip,rk3188-mali\n+      + rockchip,rk3228-mali\n       + stericsson,db8500-mali\n \n   - reg: Physical base address and length of the GPU registers\n@@ -63,6 +67,10 @@ to specify one more vendor-specific compatible, among:\n     Required properties:\n       * resets: phandle to the reset line for the GPU\n \n+  - Rockchip variants:\n+    Required properties:\n+      * resets: phandle to the reset line for the GPU\n+\n   - stericsson,db8500-mali\n     Required properties:\n       * interrupt-names and interrupts:\n",
    "prefixes": [
        "v2",
        "1/8"
    ]
}