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GET /api/patches/814159/?format=api
{ "id": 814159, "url": "http://patchwork.ozlabs.org/api/patches/814159/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170915084030.40988-8-aik@ozlabs.ru/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170915084030.40988-8-aik@ozlabs.ru>", "list_archive_url": null, "date": "2017-09-15T08:40:24", "name": "[qemu,v2,07/13] memory: Switch memory from using AddressSpace to FlatView", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "bf06a054a9137d7c3f4109879529fdbefe89e08e", "submitter": { "id": 7621, "url": "http://patchwork.ozlabs.org/api/people/7621/?format=api", "name": "Alexey Kardashevskiy", "email": "aik@ozlabs.ru" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170915084030.40988-8-aik@ozlabs.ru/mbox/", "series": [ { "id": 3250, "url": "http://patchwork.ozlabs.org/api/series/3250/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=3250", "date": "2017-09-15T08:40:21", "name": "memory: Reduce memory use", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/3250/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/814159/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/814159/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xtpxr2G9hz9sPr\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 15 Sep 2017 18:50:08 +1000 (AEST)", "from localhost ([::1]:51990 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dsmK6-0008N2-Cp\n\tfor incoming@patchwork.ozlabs.org; Fri, 15 Sep 2017 04:50:06 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:38204)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <aik@ozlabs.ru>) id 1dsmB5-0006xW-6i\n\tfor qemu-devel@nongnu.org; Fri, 15 Sep 2017 04:40:53 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <aik@ozlabs.ru>) id 1dsmB1-0002Tg-Uz\n\tfor qemu-devel@nongnu.org; Fri, 15 Sep 2017 04:40:47 -0400", "from ozlabs.ru ([107.173.13.209]:44668)\n\tby eggs.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <aik@ozlabs.ru>) id 1dsmB1-0002Ql-FC\n\tfor qemu-devel@nongnu.org; Fri, 15 Sep 2017 04:40:43 -0400", "from vpl1.ozlabs.ibm.com (localhost [IPv6:::1])\n\tby ozlabs.ru (Postfix) with ESMTP id BB9CF3A6005B;\n\tFri, 15 Sep 2017 04:41:56 -0400 (EDT)" ], "From": "Alexey Kardashevskiy <aik@ozlabs.ru>", "To": "qemu-devel@nongnu.org", "Date": "Fri, 15 Sep 2017 18:40:24 +1000", "Message-Id": "<20170915084030.40988-8-aik@ozlabs.ru>", "X-Mailer": "git-send-email 2.11.0", "In-Reply-To": "<20170915084030.40988-1-aik@ozlabs.ru>", "References": "<20170915084030.40988-1-aik@ozlabs.ru>", "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 3.x [fuzzy]", "X-Received-From": "107.173.13.209", "Subject": "[Qemu-devel] [PATCH qemu v2 07/13] memory: Switch memory from using\n\tAddressSpace to FlatView", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "Alexey Kardashevskiy <aik@ozlabs.ru>, Paolo Bonzini <pbonzini@redhat.com>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "FlatView's will be shared between AddressSpace's and subpage_t\nand MemoryRegionSection cannot store AS anymore, hence this change.\n\nIn particular, for:\n\n typedef struct subpage_t {\n MemoryRegion iomem;\n- AddressSpace *as;\n+ FlatView *fv;\n hwaddr base;\n uint16_t sub_section[];\n } subpage_t;\n\n struct MemoryRegionSection {\n MemoryRegion *mr;\n- AddressSpace *address_space;\n+ FlatView *fv;\n hwaddr offset_within_region;\n Int128 size;\n hwaddr offset_within_address_space;\n bool readonly;\n };\n\nSigned-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>\n---\n include/exec/memory-internal.h | 2 +-\n include/exec/memory.h | 51 ++++++++----\n exec.c | 180 ++++++++++++++++++++++++-----------------\n hw/intc/openpic_kvm.c | 2 +-\n memory.c | 32 ++++----\n 5 files changed, 159 insertions(+), 108 deletions(-)", "diff": "diff --git a/include/exec/memory-internal.h b/include/exec/memory-internal.h\nindex 08b7e01047..c8a5522510 100644\n--- a/include/exec/memory-internal.h\n+++ b/include/exec/memory-internal.h\n@@ -28,7 +28,7 @@ extern const MemoryRegionOps unassigned_mem_ops;\n bool memory_region_access_valid(MemoryRegion *mr, hwaddr addr,\n unsigned size, bool is_write);\n \n-void mem_add(AddressSpace *as, FlatView *fv, MemoryRegionSection *section);\n+void mem_add(FlatView *fv, MemoryRegionSection *section);\n AddressSpaceDispatch *mem_begin(AddressSpace *as);\n void mem_commit(AddressSpaceDispatch *d);\n \ndiff --git a/include/exec/memory.h b/include/exec/memory.h\nindex 2346f8b863..7816e5d655 100644\n--- a/include/exec/memory.h\n+++ b/include/exec/memory.h\n@@ -48,6 +48,7 @@\n \n typedef struct MemoryRegionOps MemoryRegionOps;\n typedef struct MemoryRegionMmio MemoryRegionMmio;\n+typedef struct FlatView FlatView;\n \n struct MemoryRegionMmio {\n CPUReadMemoryFunc *read[3];\n@@ -320,6 +321,8 @@ struct AddressSpace {\n QTAILQ_ENTRY(AddressSpace) address_spaces_link;\n };\n \n+FlatView *address_space_to_flatview(AddressSpace *as);\n+\n /**\n * MemoryRegionSection: describes a fragment of a #MemoryRegion\n *\n@@ -333,7 +336,7 @@ struct AddressSpace {\n */\n struct MemoryRegionSection {\n MemoryRegion *mr;\n- AddressSpace *address_space;\n+ FlatView *fv;\n hwaddr offset_within_region;\n Int128 size;\n hwaddr offset_within_address_space;\n@@ -1842,9 +1845,17 @@ IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr,\n * @len: pointer to length\n * @is_write: indicates the transfer direction\n */\n-MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr,\n- hwaddr *xlat, hwaddr *len,\n- bool is_write);\n+MemoryRegion *flatview_translate(FlatView *fv,\n+ hwaddr addr, hwaddr *xlat,\n+ hwaddr *len, bool is_write);\n+\n+static inline MemoryRegion *address_space_translate(AddressSpace *as,\n+ hwaddr addr, hwaddr *xlat,\n+ hwaddr *len, bool is_write)\n+{\n+ return flatview_translate(address_space_to_flatview(as),\n+ addr, xlat, len, is_write);\n+}\n \n /* address_space_access_valid: check for validity of accessing an address\n * space range\n@@ -1895,12 +1906,13 @@ void address_space_unmap(AddressSpace *as, void *buffer, hwaddr len,\n \n \n /* Internal functions, part of the implementation of address_space_read. */\n-MemTxResult address_space_read_continue(AddressSpace *as, hwaddr addr,\n- MemTxAttrs attrs, uint8_t *buf,\n- int len, hwaddr addr1, hwaddr l,\n-\t\t\t\t\tMemoryRegion *mr);\n-MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,\n- MemTxAttrs attrs, uint8_t *buf, int len);\n+MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr,\n+ MemTxAttrs attrs, uint8_t *buf,\n+ int len, hwaddr addr1, hwaddr l,\n+ MemoryRegion *mr);\n+\n+MemTxResult flatview_read_full(FlatView *fv, hwaddr addr,\n+ MemTxAttrs attrs, uint8_t *buf, int len);\n void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr);\n \n static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write)\n@@ -1927,8 +1939,8 @@ static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write)\n * @buf: buffer with the data transferred\n */\n static inline __attribute__((__always_inline__))\n-MemTxResult address_space_read(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,\n- uint8_t *buf, int len)\n+MemTxResult flatview_read(FlatView *fv, hwaddr addr, MemTxAttrs attrs,\n+ uint8_t *buf, int len)\n {\n MemTxResult result = MEMTX_OK;\n hwaddr l, addr1;\n@@ -1939,22 +1951,29 @@ MemTxResult address_space_read(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,\n if (len) {\n rcu_read_lock();\n l = len;\n- mr = address_space_translate(as, addr, &addr1, &l, false);\n+ mr = flatview_translate(fv, addr, &addr1, &l, false);\n if (len == l && memory_access_is_direct(mr, false)) {\n ptr = qemu_map_ram_ptr(mr->ram_block, addr1);\n memcpy(buf, ptr, len);\n } else {\n- result = address_space_read_continue(as, addr, attrs, buf, len,\n- addr1, l, mr);\n+ result = flatview_read_continue(fv, addr, attrs, buf, len,\n+ addr1, l, mr);\n }\n rcu_read_unlock();\n }\n } else {\n- result = address_space_read_full(as, addr, attrs, buf, len);\n+ result = flatview_read_full(fv, addr, attrs, buf, len);\n }\n return result;\n }\n \n+static inline MemTxResult address_space_read(AddressSpace *as, hwaddr addr,\n+ MemTxAttrs attrs, uint8_t *buf,\n+ int len)\n+{\n+ return flatview_read(address_space_to_flatview(as), addr, attrs, buf, len);\n+}\n+\n /**\n * address_space_read_cached: read from a cached RAM region\n *\ndiff --git a/exec.c b/exec.c\nindex 3212c5e70d..b561098df3 100644\n--- a/exec.c\n+++ b/exec.c\n@@ -199,7 +199,7 @@ struct AddressSpaceDispatch {\n #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)\n typedef struct subpage_t {\n MemoryRegion iomem;\n- AddressSpace *as;\n+ FlatView *fv;\n hwaddr base;\n uint16_t sub_section[];\n } subpage_t;\n@@ -469,13 +469,13 @@ address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *x\n }\n \n /* Called from RCU critical section */\n-static MemoryRegionSection address_space_do_translate(AddressSpace *as,\n- hwaddr addr,\n- hwaddr *xlat,\n- hwaddr *plen,\n- bool is_write,\n- bool is_mmio,\n- AddressSpace **target_as)\n+static MemoryRegionSection flatview_do_translate(FlatView *fv,\n+ hwaddr addr,\n+ hwaddr *xlat,\n+ hwaddr *plen,\n+ bool is_write,\n+ bool is_mmio,\n+ AddressSpace **target_as)\n {\n IOMMUTLBEntry iotlb;\n MemoryRegionSection *section;\n@@ -483,8 +483,9 @@ static MemoryRegionSection address_space_do_translate(AddressSpace *as,\n IOMMUMemoryRegionClass *imrc;\n \n for (;;) {\n- AddressSpaceDispatch *d = address_space_to_dispatch(as);\n- section = address_space_translate_internal(d, addr, &addr, plen, is_mmio);\n+ section = address_space_translate_internal(\n+ flatview_to_dispatch(fv), addr, &addr,\n+ plen, is_mmio);\n \n iommu_mr = memory_region_get_iommu(section->mr);\n if (!iommu_mr) {\n@@ -501,7 +502,7 @@ static MemoryRegionSection address_space_do_translate(AddressSpace *as,\n goto translate_fail;\n }\n \n- as = iotlb.target_as;\n+ fv = address_space_to_flatview(iotlb.target_as);\n *target_as = iotlb.target_as;\n }\n \n@@ -524,8 +525,8 @@ IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr,\n plen = (hwaddr)-1;\n \n /* This can never be MMIO. */\n- section = address_space_do_translate(as, addr, &xlat, &plen,\n- is_write, false, &as);\n+ section = flatview_do_translate(address_space_to_flatview(as), addr,\n+ &xlat, &plen, is_write, false, &as);\n \n /* Illegal translation */\n if (section.mr == &io_mem_unassigned) {\n@@ -561,16 +562,15 @@ iotlb_fail:\n }\n \n /* Called from RCU critical section */\n-MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr,\n- hwaddr *xlat, hwaddr *plen,\n- bool is_write)\n+MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat,\n+ hwaddr *plen, bool is_write)\n {\n MemoryRegion *mr;\n MemoryRegionSection section;\n+ AddressSpace *as = NULL;\n \n /* This can be MMIO, so setup MMIO bit. */\n- section = address_space_do_translate(as, addr, xlat, plen, is_write, true,\n- &as);\n+ section = flatview_do_translate(fv, addr, xlat, plen, is_write, true, &as);\n mr = section.mr;\n \n if (xen_enabled() && memory_access_is_direct(mr, is_write)) {\n@@ -1220,7 +1220,7 @@ hwaddr memory_region_section_get_iotlb(CPUState *cpu,\n } else {\n AddressSpaceDispatch *d;\n \n- d = address_space_to_dispatch(section->address_space);\n+ d = flatview_to_dispatch(section->fv);\n iotlb = section - d->map.sections;\n iotlb += xlat;\n }\n@@ -1246,7 +1246,7 @@ hwaddr memory_region_section_get_iotlb(CPUState *cpu,\n \n static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,\n uint16_t section);\n-static subpage_t *subpage_init(AddressSpace *as, hwaddr base);\n+static subpage_t *subpage_init(FlatView *fv, hwaddr base);\n \n static void *(*phys_mem_alloc)(size_t size, uint64_t *align) =\n qemu_anon_ram_alloc;\n@@ -1303,7 +1303,7 @@ static void phys_sections_free(PhysPageMap *map)\n g_free(map->nodes);\n }\n \n-static void register_subpage(AddressSpace *as, AddressSpaceDispatch *d,\n+static void register_subpage(FlatView *fv, AddressSpaceDispatch *d,\n MemoryRegionSection *section)\n {\n subpage_t *subpage;\n@@ -1319,8 +1319,8 @@ static void register_subpage(AddressSpace *as, AddressSpaceDispatch *d,\n assert(existing->mr->subpage || existing->mr == &io_mem_unassigned);\n \n if (!(existing->mr->subpage)) {\n- subpage = subpage_init(as, base);\n- subsection.address_space = as;\n+ subpage = subpage_init(fv, base);\n+ subsection.fv = fv;\n subsection.mr = &subpage->iomem;\n phys_page_set(d, base >> TARGET_PAGE_BITS, 1,\n phys_section_add(&d->map, &subsection));\n@@ -1346,7 +1346,7 @@ static void register_multipage(AddressSpaceDispatch *d,\n phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index);\n }\n \n-void mem_add(AddressSpace *as, FlatView *fv, MemoryRegionSection *section)\n+void mem_add(FlatView *fv, MemoryRegionSection *section)\n {\n AddressSpaceDispatch *d = flatview_to_dispatch(fv);\n MemoryRegionSection now = *section, remain = *section;\n@@ -1357,7 +1357,7 @@ void mem_add(AddressSpace *as, FlatView *fv, MemoryRegionSection *section)\n - now.offset_within_address_space;\n \n now.size = int128_min(int128_make64(left), now.size);\n- register_subpage(as, d, &now);\n+ register_subpage(fv, d, &now);\n } else {\n now.size = int128_zero();\n }\n@@ -1367,10 +1367,10 @@ void mem_add(AddressSpace *as, FlatView *fv, MemoryRegionSection *section)\n remain.offset_within_region += int128_get64(now.size);\n now = remain;\n if (int128_lt(remain.size, page_size)) {\n- register_subpage(as, d, &now);\n+ register_subpage(fv, d, &now);\n } else if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) {\n now.size = page_size;\n- register_subpage(as, d, &now);\n+ register_subpage(fv, d, &now);\n } else {\n now.size = int128_and(now.size, int128_neg(page_size));\n register_multipage(d, &now);\n@@ -2501,6 +2501,11 @@ static const MemoryRegionOps watch_mem_ops = {\n .endianness = DEVICE_NATIVE_ENDIAN,\n };\n \n+static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,\n+ const uint8_t *buf, int len);\n+static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len,\n+ bool is_write);\n+\n static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,\n unsigned len, MemTxAttrs attrs)\n {\n@@ -2512,8 +2517,7 @@ static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data,\n printf(\"%s: subpage %p len %u addr \" TARGET_FMT_plx \"\\n\", __func__,\n subpage, len, addr);\n #endif\n- res = address_space_read(subpage->as, addr + subpage->base,\n- attrs, buf, len);\n+ res = flatview_read(subpage->fv, addr + subpage->base, attrs, buf, len);\n if (res) {\n return res;\n }\n@@ -2562,8 +2566,7 @@ static MemTxResult subpage_write(void *opaque, hwaddr addr,\n default:\n abort();\n }\n- return address_space_write(subpage->as, addr + subpage->base,\n- attrs, buf, len);\n+ return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len);\n }\n \n static bool subpage_accepts(void *opaque, hwaddr addr,\n@@ -2575,8 +2578,8 @@ static bool subpage_accepts(void *opaque, hwaddr addr,\n __func__, subpage, is_write ? 'w' : 'r', len, addr);\n #endif\n \n- return address_space_access_valid(subpage->as, addr + subpage->base,\n- len, is_write);\n+ return flatview_access_valid(subpage->fv, addr + subpage->base,\n+ len, is_write);\n }\n \n static const MemoryRegionOps subpage_ops = {\n@@ -2610,12 +2613,12 @@ static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,\n return 0;\n }\n \n-static subpage_t *subpage_init(AddressSpace *as, hwaddr base)\n+static subpage_t *subpage_init(FlatView *fv, hwaddr base)\n {\n subpage_t *mmio;\n \n mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t));\n- mmio->as = as;\n+ mmio->fv = fv;\n mmio->base = base;\n memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio,\n NULL, TARGET_PAGE_SIZE);\n@@ -2629,12 +2632,11 @@ static subpage_t *subpage_init(AddressSpace *as, hwaddr base)\n return mmio;\n }\n \n-static uint16_t dummy_section(PhysPageMap *map, AddressSpace *as,\n- MemoryRegion *mr)\n+static uint16_t dummy_section(PhysPageMap *map, FlatView *fv, MemoryRegion *mr)\n {\n- assert(as);\n+ assert(fv);\n MemoryRegionSection section = {\n- .address_space = as,\n+ .fv = fv,\n .mr = mr,\n .offset_within_address_space = 0,\n .offset_within_region = 0,\n@@ -2673,16 +2675,17 @@ static void io_mem_init(void)\n \n AddressSpaceDispatch *mem_begin(AddressSpace *as)\n {\n+ FlatView *fv = address_space_to_flatview(as);\n AddressSpaceDispatch *d = g_new0(AddressSpaceDispatch, 1);\n uint16_t n;\n \n- n = dummy_section(&d->map, as, &io_mem_unassigned);\n+ n = dummy_section(&d->map, fv, &io_mem_unassigned);\n assert(n == PHYS_SECTION_UNASSIGNED);\n- n = dummy_section(&d->map, as, &io_mem_notdirty);\n+ n = dummy_section(&d->map, fv, &io_mem_notdirty);\n assert(n == PHYS_SECTION_NOTDIRTY);\n- n = dummy_section(&d->map, as, &io_mem_rom);\n+ n = dummy_section(&d->map, fv, &io_mem_rom);\n assert(n == PHYS_SECTION_ROM);\n- n = dummy_section(&d->map, as, &io_mem_watch);\n+ n = dummy_section(&d->map, fv, &io_mem_watch);\n assert(n == PHYS_SECTION_WATCH);\n \n d->phys_map = (PhysPageEntry) { .ptr = PHYS_MAP_NODE_NIL, .skip = 1 };\n@@ -2862,11 +2865,11 @@ static bool prepare_mmio_access(MemoryRegion *mr)\n }\n \n /* Called within RCU critical section. */\n-static MemTxResult address_space_write_continue(AddressSpace *as, hwaddr addr,\n- MemTxAttrs attrs,\n- const uint8_t *buf,\n- int len, hwaddr addr1,\n- hwaddr l, MemoryRegion *mr)\n+static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr,\n+ MemTxAttrs attrs,\n+ const uint8_t *buf,\n+ int len, hwaddr addr1,\n+ hwaddr l, MemoryRegion *mr)\n {\n uint8_t *ptr;\n uint64_t val;\n@@ -2928,14 +2931,14 @@ static MemTxResult address_space_write_continue(AddressSpace *as, hwaddr addr,\n }\n \n l = len;\n- mr = address_space_translate(as, addr, &addr1, &l, true);\n+ mr = flatview_translate(fv, addr, &addr1, &l, true);\n }\n \n return result;\n }\n \n-MemTxResult address_space_write(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,\n- const uint8_t *buf, int len)\n+static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,\n+ const uint8_t *buf, int len)\n {\n hwaddr l;\n hwaddr addr1;\n@@ -2945,20 +2948,27 @@ MemTxResult address_space_write(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,\n if (len > 0) {\n rcu_read_lock();\n l = len;\n- mr = address_space_translate(as, addr, &addr1, &l, true);\n- result = address_space_write_continue(as, addr, attrs, buf, len,\n- addr1, l, mr);\n+ mr = flatview_translate(fv, addr, &addr1, &l, true);\n+ result = flatview_write_continue(fv, addr, attrs, buf, len,\n+ addr1, l, mr);\n rcu_read_unlock();\n }\n \n return result;\n }\n \n+MemTxResult address_space_write(AddressSpace *as, hwaddr addr,\n+ MemTxAttrs attrs,\n+ const uint8_t *buf, int len)\n+{\n+ return flatview_write(address_space_to_flatview(as), addr, attrs, buf, len);\n+}\n+\n /* Called within RCU critical section. */\n-MemTxResult address_space_read_continue(AddressSpace *as, hwaddr addr,\n- MemTxAttrs attrs, uint8_t *buf,\n- int len, hwaddr addr1, hwaddr l,\n- MemoryRegion *mr)\n+MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr,\n+ MemTxAttrs attrs, uint8_t *buf,\n+ int len, hwaddr addr1, hwaddr l,\n+ MemoryRegion *mr)\n {\n uint8_t *ptr;\n uint64_t val;\n@@ -3018,14 +3028,14 @@ MemTxResult address_space_read_continue(AddressSpace *as, hwaddr addr,\n }\n \n l = len;\n- mr = address_space_translate(as, addr, &addr1, &l, false);\n+ mr = flatview_translate(fv, addr, &addr1, &l, false);\n }\n \n return result;\n }\n \n-MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,\n- MemTxAttrs attrs, uint8_t *buf, int len)\n+MemTxResult flatview_read_full(FlatView *fv, hwaddr addr,\n+ MemTxAttrs attrs, uint8_t *buf, int len)\n {\n hwaddr l;\n hwaddr addr1;\n@@ -3035,25 +3045,33 @@ MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,\n if (len > 0) {\n rcu_read_lock();\n l = len;\n- mr = address_space_translate(as, addr, &addr1, &l, false);\n- result = address_space_read_continue(as, addr, attrs, buf, len,\n- addr1, l, mr);\n+ mr = flatview_translate(fv, addr, &addr1, &l, false);\n+ result = flatview_read_continue(fv, addr, attrs, buf, len,\n+ addr1, l, mr);\n rcu_read_unlock();\n }\n \n return result;\n }\n \n-MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,\n- uint8_t *buf, int len, bool is_write)\n+static MemTxResult flatview_rw(FlatView *fv, hwaddr addr, MemTxAttrs attrs,\n+ uint8_t *buf, int len, bool is_write)\n {\n if (is_write) {\n- return address_space_write(as, addr, attrs, (uint8_t *)buf, len);\n+ return flatview_write(fv, addr, attrs, (uint8_t *)buf, len);\n } else {\n- return address_space_read(as, addr, attrs, (uint8_t *)buf, len);\n+ return flatview_read(fv, addr, attrs, (uint8_t *)buf, len);\n }\n }\n \n+MemTxResult address_space_rw(AddressSpace *as, hwaddr addr,\n+ MemTxAttrs attrs, uint8_t *buf,\n+ int len, bool is_write)\n+{\n+ return flatview_rw(address_space_to_flatview(as),\n+ addr, attrs, buf, len, is_write);\n+}\n+\n void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,\n int len, int is_write)\n {\n@@ -3211,7 +3229,8 @@ static void cpu_notify_map_clients(void)\n qemu_mutex_unlock(&map_client_list_lock);\n }\n \n-bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bool is_write)\n+static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len,\n+ bool is_write)\n {\n MemoryRegion *mr;\n hwaddr l, xlat;\n@@ -3219,7 +3238,7 @@ bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bool is_\n rcu_read_lock();\n while (len > 0) {\n l = len;\n- mr = address_space_translate(as, addr, &xlat, &l, is_write);\n+ mr = flatview_translate(fv, addr, &xlat, &l, is_write);\n if (!memory_access_is_direct(mr, is_write)) {\n l = memory_access_size(mr, l, addr);\n if (!memory_region_access_valid(mr, xlat, l, is_write)) {\n@@ -3235,8 +3254,16 @@ bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bool is_\n return true;\n }\n \n+bool address_space_access_valid(AddressSpace *as, hwaddr addr,\n+ int len, bool is_write)\n+{\n+ return flatview_access_valid(address_space_to_flatview(as),\n+ addr, len, is_write);\n+}\n+\n static hwaddr\n-address_space_extend_translation(AddressSpace *as, hwaddr addr, hwaddr target_len,\n+flatview_extend_translation(FlatView *fv, hwaddr addr,\n+ hwaddr target_len,\n MemoryRegion *mr, hwaddr base, hwaddr len,\n bool is_write)\n {\n@@ -3253,7 +3280,8 @@ address_space_extend_translation(AddressSpace *as, hwaddr addr, hwaddr target_le\n }\n \n len = target_len;\n- this_mr = address_space_translate(as, addr, &xlat, &len, is_write);\n+ this_mr = flatview_translate(fv, addr, &xlat,\n+ &len, is_write);\n if (this_mr != mr || xlat != base + done) {\n return done;\n }\n@@ -3276,6 +3304,7 @@ void *address_space_map(AddressSpace *as,\n hwaddr l, xlat;\n MemoryRegion *mr;\n void *ptr;\n+ FlatView *fv = address_space_to_flatview(as);\n \n if (len == 0) {\n return NULL;\n@@ -3283,7 +3312,7 @@ void *address_space_map(AddressSpace *as,\n \n l = len;\n rcu_read_lock();\n- mr = address_space_translate(as, addr, &xlat, &l, is_write);\n+ mr = flatview_translate(fv, addr, &xlat, &l, is_write);\n \n if (!memory_access_is_direct(mr, is_write)) {\n if (atomic_xchg(&bounce.in_use, true)) {\n@@ -3299,7 +3328,7 @@ void *address_space_map(AddressSpace *as,\n memory_region_ref(mr);\n bounce.mr = mr;\n if (!is_write) {\n- address_space_read(as, addr, MEMTXATTRS_UNSPECIFIED,\n+ flatview_read(fv, addr, MEMTXATTRS_UNSPECIFIED,\n bounce.buffer, l);\n }\n \n@@ -3310,7 +3339,8 @@ void *address_space_map(AddressSpace *as,\n \n \n memory_region_ref(mr);\n- *plen = address_space_extend_translation(as, addr, len, mr, xlat, l, is_write);\n+ *plen = flatview_extend_translation(fv, addr, len, mr, xlat,\n+ l, is_write);\n ptr = qemu_ram_ptr_length(mr->ram_block, xlat, plen, true);\n rcu_read_unlock();\n \ndiff --git a/hw/intc/openpic_kvm.c b/hw/intc/openpic_kvm.c\nindex 0518e017c4..fa83420254 100644\n--- a/hw/intc/openpic_kvm.c\n+++ b/hw/intc/openpic_kvm.c\n@@ -124,7 +124,7 @@ static void kvm_openpic_region_add(MemoryListener *listener,\n uint64_t reg_base;\n int ret;\n \n- if (section->address_space != &address_space_memory) {\n+ if (section->fv != address_space_to_flatview(&address_space_memory)) {\n abort();\n }\n \ndiff --git a/memory.c b/memory.c\nindex 1d93e4c836..0f51445d30 100644\n--- a/memory.c\n+++ b/memory.c\n@@ -154,7 +154,8 @@ enum ListenerDirection { Forward, Reverse };\n /* No need to ref/unref .mr, the FlatRange keeps it alive. */\n #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \\\n do { \\\n- MemoryRegionSection mrs = section_from_flat_range(fr, as); \\\n+ MemoryRegionSection mrs = section_from_flat_range(fr, \\\n+ address_space_to_flatview(as)); \\\n MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \\\n } while(0)\n \n@@ -238,11 +239,11 @@ typedef struct AddressSpaceOps AddressSpaceOps;\n for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)\n \n static inline MemoryRegionSection\n-section_from_flat_range(FlatRange *fr, AddressSpace *as)\n+section_from_flat_range(FlatRange *fr, FlatView *fv)\n {\n return (MemoryRegionSection) {\n .mr = fr->mr,\n- .address_space = as,\n+ .fv = fv,\n .offset_within_region = fr->offset_in_region,\n .size = fr->addr.size,\n .offset_within_address_space = int128_get64(fr->addr.start),\n@@ -312,7 +313,7 @@ static void flatview_unref(FlatView *view)\n }\n }\n \n-static FlatView *address_space_to_flatview(AddressSpace *as)\n+FlatView *address_space_to_flatview(AddressSpace *as)\n {\n return atomic_rcu_read(&as->current_map);\n }\n@@ -760,7 +761,7 @@ static void address_space_add_del_ioeventfds(AddressSpace *as,\n fds_new[inew]))) {\n fd = &fds_old[iold];\n section = (MemoryRegionSection) {\n- .address_space = as,\n+ .fv = address_space_to_flatview(as),\n .offset_within_address_space = int128_get64(fd->addr.start),\n .size = fd->addr.size,\n };\n@@ -773,7 +774,7 @@ static void address_space_add_del_ioeventfds(AddressSpace *as,\n fds_old[iold]))) {\n fd = &fds_new[inew];\n section = (MemoryRegionSection) {\n- .address_space = as,\n+ .fv = address_space_to_flatview(as),\n .offset_within_address_space = int128_get64(fd->addr.start),\n .size = fd->addr.size,\n };\n@@ -932,17 +933,17 @@ static void address_space_update_flatview(AddressSpace *as,\n ++iold;\n } else if (frold && frnew && flatrange_equal(frold, frnew)) {\n /* In both and unchanged (except logging may have changed) */\n- MemoryRegionSection mrs = section_from_flat_range(frnew, as);\n+ MemoryRegionSection mrs = section_from_flat_range(frnew, new_view);\n \n- mem_add(as, new_view, &mrs);\n+ mem_add(new_view, &mrs);\n \n ++iold;\n ++inew;\n } else {\n /* In new */\n- MemoryRegionSection mrs = section_from_flat_range(frnew, as);\n+ MemoryRegionSection mrs = section_from_flat_range(frnew, new_view);\n \n- mem_add(as, new_view, &mrs);\n+ mem_add(new_view, &mrs);\n \n ++inew;\n }\n@@ -1906,7 +1907,7 @@ void memory_region_sync_dirty_bitmap(MemoryRegion *mr)\n view = address_space_get_flatview(as);\n FOR_EACH_FLAT_RANGE(fr, view) {\n if (fr->mr == mr) {\n- MemoryRegionSection mrs = section_from_flat_range(fr, as);\n+ MemoryRegionSection mrs = section_from_flat_range(fr, view);\n listener->log_sync(listener, &mrs);\n }\n }\n@@ -2009,7 +2010,7 @@ static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpa\n FOR_EACH_FLAT_RANGE(fr, view) {\n if (fr->mr == mr) {\n section = (MemoryRegionSection) {\n- .address_space = as,\n+ .fv = view,\n .offset_within_address_space = int128_get64(fr->addr.start),\n .size = fr->addr.size,\n };\n@@ -2371,7 +2372,7 @@ static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,\n }\n \n ret.mr = fr->mr;\n- ret.address_space = as;\n+ ret.fv = view;\n range = addrrange_intersection(range, fr->addr);\n ret.offset_within_region = fr->offset_in_region;\n ret.offset_within_region += int128_get64(int128_sub(range.start,\n@@ -2420,7 +2421,8 @@ void memory_global_dirty_log_sync(void)\n view = address_space_get_flatview(as);\n FOR_EACH_FLAT_RANGE(fr, view) {\n if (fr->dirty_log_mask) {\n- MemoryRegionSection mrs = section_from_flat_range(fr, as);\n+ MemoryRegionSection mrs = section_from_flat_range(fr, view);\n+\n listener->log_sync(listener, &mrs);\n }\n }\n@@ -2505,7 +2507,7 @@ static void listener_add_address_space(MemoryListener *listener,\n FOR_EACH_FLAT_RANGE(fr, view) {\n MemoryRegionSection section = {\n .mr = fr->mr,\n- .address_space = as,\n+ .fv = view,\n .offset_within_region = fr->offset_in_region,\n .size = fr->addr.size,\n .offset_within_address_space = int128_get64(fr->addr.start),\n", "prefixes": [ "qemu", "v2", "07/13" ] }