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GET /api/patches/813793/?format=api
{ "id": 813793, "url": "http://patchwork.ozlabs.org/api/patches/813793/?format=api", "web_url": "http://patchwork.ozlabs.org/project/skiboot/patch/20170914111346.11970-5-npiggin@gmail.com/", "project": { "id": 44, "url": "http://patchwork.ozlabs.org/api/projects/44/?format=api", "name": "skiboot firmware development", "link_name": "skiboot", "list_id": "skiboot.lists.ozlabs.org", "list_email": "skiboot@lists.ozlabs.org", "web_url": "http://github.com/open-power/skiboot", "scm_url": "http://github.com/open-power/skiboot", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170914111346.11970-5-npiggin@gmail.com>", "list_archive_url": null, "date": "2017-09-14T11:13:45", "name": "[4/5] cpu: idle split pm enable into sreset and ipi components", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "01503ec9aa2381fe4404f29cf6c31fc147a6efba", "submitter": { "id": 69518, "url": "http://patchwork.ozlabs.org/api/people/69518/?format=api", "name": "Nicholas Piggin", "email": "npiggin@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/skiboot/patch/20170914111346.11970-5-npiggin@gmail.com/mbox/", "series": [ { "id": 3075, "url": "http://patchwork.ozlabs.org/api/series/3075/?format=api", "web_url": "http://patchwork.ozlabs.org/project/skiboot/list/?series=3075", "date": "2017-09-14T11:13:41", "name": "POWER9 idle pm support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/3075/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/813793/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/813793/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "skiboot@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "skiboot@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xtGCj54qnz9sMN\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 14 Sep 2017 21:15:13 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xtGCj3xCTzDrbJ\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 14 Sep 2017 21:15:13 +1000 (AEST)", "from mail-pf0-x241.google.com (mail-pf0-x241.google.com\n\t[IPv6:2607:f8b0:400e:c00::241])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xtGBj5n8FzDrRV\n\tfor <skiboot@lists.ozlabs.org>; Thu, 14 Sep 2017 21:14:21 +1000 (AEST)", "by mail-pf0-x241.google.com with SMTP id q76so1359591pfq.5\n\tfor <skiboot@lists.ozlabs.org>; Thu, 14 Sep 2017 04:14:21 -0700 (PDT)", "from roar.au.ibm.com (203-219-56-202.tpgi.com.au. [203.219.56.202])\n\tby smtp.gmail.com with ESMTPSA id\n\tc2sm29289224pgq.61.2017.09.14.04.14.15\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tThu, 14 Sep 2017 04:14:18 -0700 (PDT)" ], "Authentication-Results": [ "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"rh9blfyi\"; dkim-atps=neutral", "lists.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"rh9blfyi\"; dkim-atps=neutral", "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gmail.com\n\t(client-ip=2607:f8b0:400e:c00::241; helo=mail-pf0-x241.google.com;\n\tenvelope-from=npiggin@gmail.com; receiver=<UNKNOWN>)", "lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"rh9blfyi\"; dkim-atps=neutral" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=Il5P20GhhegFsM5LVTL2gmiQSv8S7U+hCH5D9g/RDD8=;\n\tb=rh9blfyi0Dn1/znzRRMKEi4O/n4JuoiOXA4KSGzyF83QCUdpJAww1lhOnXdc/aRwx0\n\tx/SV1j5K8gDhmI6jJV11H77WCWAlYOUbqr1pWluAqqcdBC12hJkH3pqWh/eKNhVJJ7jv\n\t3IV/6Na6/X092AivOlbSiNDs6UagcdWr06qt9sfjAjZcunGfoDDhkSuFgKx+ho7ro43g\n\tIlUGlDFO9E3at9iZ6XCTbOvsrZkJR8jLBb9hi5xfnYqB5Wub5Yxe2vYXBoSoMg3vzUbj\n\t5l34AU6s0SxzHART/H71+dC7X/IcDj37aEmDTsrBYC2gSt08QXs6ktEMlEnDE4Kcigay\n\tDH3A==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=Il5P20GhhegFsM5LVTL2gmiQSv8S7U+hCH5D9g/RDD8=;\n\tb=YfaBJq+2PwPp/OOQ9/OoJ6nTF6BtXCCk+FG+qe8cdwPrEpiON1wY4UPOk41fsgHpFV\n\tn817A1ca9vKLE02hAZ2HglDj5hqEQTIO+IrFIBRVC5jcakZ0zN3PGMe7FR96Af8A5roZ\n\tuR3UxmfCHb0BQzipEapto7IFgyIQb3UrcF9kNtjzNB9+xCrFHIiafw64UVrVXnBP4ldQ\n\tqJbccZ7q2P0ZBDa+pfxDCI9wC0E9TbdeKdJqKBBcmnWGN1EGsnU2M2OouwRWJv8Rum4M\n\tNRC0NrRujKDBtZLn9jJoZidCOIRmAIlRiYqIro+Zo4q8VtN1wjcLW8YkwzUArGc5HlnD\n\tv8Rg==", "X-Gm-Message-State": "AHPjjUirhPLOVRkcSuoW9/oyshvDrszPemT/Hq/8twNly7WLr0RQLAgT\n\tZmkmBXPLXDu9PKNT", "X-Google-Smtp-Source": "ADKCNb6bq5QQy8X/TiZbp3faELrKVZ6STjf2iFQjniTb6rtE4vPNfVXs6DVKQJSxjhhjePV/N1wHnA==", "X-Received": "by 10.99.115.26 with SMTP id o26mr21357634pgc.9.1505387658983;\n\tThu, 14 Sep 2017 04:14:18 -0700 (PDT)", "From": "Nicholas Piggin <npiggin@gmail.com>", "To": "skiboot@lists.ozlabs.org", "Date": "Thu, 14 Sep 2017 21:13:45 +1000", "Message-Id": "<20170914111346.11970-5-npiggin@gmail.com>", "X-Mailer": "git-send-email 2.13.3", "In-Reply-To": "<20170914111346.11970-1-npiggin@gmail.com>", "References": "<20170914111346.11970-1-npiggin@gmail.com>", "Subject": "[Skiboot] [PATCH 4/5] cpu: idle split pm enable into sreset and ipi\n\tcomponents", "X-BeenThere": "skiboot@lists.ozlabs.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Mailing list for skiboot development <skiboot.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/skiboot>,\n\t<mailto:skiboot-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/skiboot/>", "List-Post": "<mailto:skiboot@lists.ozlabs.org>", "List-Help": "<mailto:skiboot-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/skiboot>,\n\t<mailto:skiboot-request@lists.ozlabs.org?subject=subscribe>", "Cc": "\"Gautham R . Shenoy\" <ego@linux.vnet.ibm.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org", "Sender": "\"Skiboot\"\n\t<skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>" }, "content": "pm idle requires the system reset vector and IPI facilities before\nit can be enabled. Split these out and manage them individually.\n\nSigned-off-by: Nicholas Piggin <npiggin@gmail.com>\n---\n core/cpu.c | 91 +++++++++++++++++++++++++++++++++++-------------------\n core/fast-reboot.c | 3 +-\n core/init.c | 10 ++++--\n include/cpu.h | 8 +++--\n 4 files changed, 74 insertions(+), 38 deletions(-)", "diff": "diff --git a/core/cpu.c b/core/cpu.c\nindex 01001861..460094ad 100644\n--- a/core/cpu.c\n+++ b/core/cpu.c\n@@ -52,6 +52,8 @@ static bool hile_supported;\n static bool radix_supported;\n static unsigned long hid0_hile;\n static unsigned long hid0_attn;\n+static bool sreset_enabled;\n+static bool ipi_enabled;\n static bool pm_enabled;\n static bool current_hile_mode;\n static bool current_radix_mode;\n@@ -321,9 +323,7 @@ static void cpu_idle_p8(enum cpu_wake_cause wake_on)\n \t\tmtspr(SPR_LPCR, lpcr);\n \n \t} else {\n-\t\t/* Mark outselves sleeping so cpu_set_pm_enable knows to\n-\t\t * send an IPI\n-\t\t */\n+\t\t/* Mark outselves sleeping so wakeup knows to send an IPI */\n \t\tcpu->in_sleep = true;\n \t\tsync();\n \n@@ -346,35 +346,6 @@ skip_sleep:\n \treset_cpu_icp();\n }\n \n-void cpu_set_pm_enable(bool enabled)\n-{\n-\tstruct cpu_thread *cpu;\n-\n-\tprlog(PR_INFO, \"CPU: %sing power management\\n\",\n-\t enabled ? \"enabl\" : \"disabl\");\n-\n-\tif (proc_gen != proc_gen_p8)\n-\t\treturn;\n-\n-\t/* Public P8 Mambo has broken NAP */\n-\tif (chip_quirk(QUIRK_MAMBO_CALLOUTS))\n-\t\treturn;\n-\n-\tpm_enabled = enabled;\n-\n-\tif (enabled)\n-\t\treturn;\n-\n-\t/* If disabling, take everybody out of PM */\n-\tsync();\n-\tfor_each_available_cpu(cpu) {\n-\t\twhile (cpu->in_sleep || cpu->in_idle) {\n-\t\t\ticp_kick_cpu(cpu);\n-\t\t\tcpu_relax();\n-\t\t}\n-\t}\n-}\n-\n static void cpu_idle_pm(enum cpu_wake_cause wake_on)\n {\n \tswitch(proc_gen) {\n@@ -444,6 +415,62 @@ no_pm:\n \t}\n }\n \n+static void cpu_pm_disable(void)\n+{\n+\tstruct cpu_thread *cpu;\n+\n+\tpm_enabled = false;\n+\tsync();\n+\n+\tif (proc_gen == proc_gen_p8) {\n+\t\tfor_each_available_cpu(cpu) {\n+\t\t\twhile (cpu->in_sleep || cpu->in_idle) {\n+\t\t\t\ticp_kick_cpu(cpu);\n+\t\t\t\tcpu_relax();\n+\t\t\t}\n+\t\t}\n+\t}\n+}\n+\n+void cpu_set_sreset_enable(bool enabled)\n+{\n+\tif (sreset_enabled == enabled)\n+\t\treturn;\n+\n+\tif (proc_gen == proc_gen_p8) {\n+\t\t/* Public P8 Mambo has broken NAP */\n+\t\tif (chip_quirk(QUIRK_MAMBO_CALLOUTS))\n+\t\t\treturn;\n+\n+\t\tsreset_enabled = enabled;\n+\t\tsync();\n+\n+\t\tif (!enabled) {\n+\t\t\tcpu_pm_disable();\n+\t\t} else {\n+\t\t\tif (ipi_enabled)\n+\t\t\t\tpm_enabled = true;\n+\t\t}\n+\t}\n+}\n+\n+void cpu_set_ipi_enable(bool enabled)\n+{\n+\tif (ipi_enabled == enabled)\n+\t\treturn;\n+\n+\tif (proc_gen == proc_gen_p8) {\n+\t\tipi_enabled = enabled;\n+\t\tsync();\n+\t\tif (!enabled) {\n+\t\t\tcpu_pm_disable();\n+\t\t} else {\n+\t\t\tif (sreset_enabled)\n+\t\t\t\tpm_enabled = true;\n+\t\t}\n+\t}\n+}\n+\n void cpu_process_local_jobs(void)\n {\n \tstruct cpu_thread *cpu = first_available_cpu();\ndiff --git a/core/fast-reboot.c b/core/fast-reboot.c\nindex 7bfc06de..8af5c590 100644\n--- a/core/fast-reboot.c\n+++ b/core/fast-reboot.c\n@@ -564,7 +564,8 @@ void __noreturn fast_reboot_entry(void)\n \tcpu_fast_reboot_complete();\n \n \t/* We can now do NAP mode */\n-\tcpu_set_pm_enable(true);\n+\tcpu_set_sreset_enable(true);\n+\tcpu_set_ipi_enable(true);\n \n \t/* Start preloading kernel and ramdisk */\n \tstart_preload_kernel();\ndiff --git a/core/init.c b/core/init.c\nindex 8951e17b..42e6b560 100644\n--- a/core/init.c\n+++ b/core/init.c\n@@ -382,7 +382,7 @@ static bool load_kernel(void)\n \t\t * by our vectors.\n \t\t */\n \t\tif (kernel_entry < 0x2000) {\n-\t\t\tcpu_set_pm_enable(false);\n+\t\t\tcpu_set_sreset_enable(false);\n \t\t\tmemcpy(NULL, old_vectors, 0x2000);\n \t\t\tsync_icache();\n \t\t}\n@@ -545,7 +545,8 @@ void __noreturn load_and_boot_kernel(bool is_reboot)\n \tmem_dump_free();\n \n \t/* Take processours out of nap */\n-\tcpu_set_pm_enable(false);\n+\tcpu_set_sreset_enable(false);\n+\tcpu_set_ipi_enable(false);\n \n \t/* Dump the selected console */\n \tstdoutp = dt_prop_get_def(dt_chosen, \"linux,stdout-path\", NULL);\n@@ -725,6 +726,7 @@ void setup_reset_vector(void)\n \twhile(src < &reset_patch_end)\n \t\t*(dst++) = *(src++);\n \tsync_icache();\n+\tcpu_set_sreset_enable(true);\n }\n \n void copy_exception_vectors(void)\n@@ -926,6 +928,8 @@ void __noreturn __nomcount main_cpu_entry(const void *fdt)\n \n \t/* On P7/P8, get the ICPs and make sure they are in a sane state */\n \tinit_interrupts();\n+\tif (proc_gen == proc_gen_p7 || proc_gen == proc_gen_p8)\n+\t\tcpu_set_ipi_enable(true);\n \n \t/* On P9, initialize XIVE */\n \tinit_xive();\n@@ -951,7 +955,7 @@ void __noreturn __nomcount main_cpu_entry(const void *fdt)\n \tsetup_reset_vector();\n \n \t/* We can now do NAP mode */\n-\tcpu_set_pm_enable(true);\n+\tcpu_set_sreset_enable(true);\n \n \t/*\n \t * Synchronize time bases. Thi resets all the TB values to a small\ndiff --git a/include/cpu.h b/include/cpu.h\nindex f08940f7..0b873178 100644\n--- a/include/cpu.h\n+++ b/include/cpu.h\n@@ -256,8 +256,12 @@ extern void cpu_process_jobs(void);\n extern void cpu_process_local_jobs(void);\n /* Check if there's any job pending */\n bool cpu_check_jobs(struct cpu_thread *cpu);\n-/* Enable/disable PM */\n-void cpu_set_pm_enable(bool pm_enabled);\n+\n+/* OPAL sreset vector in place at 0x100 */\n+void cpu_set_sreset_enable(bool sreset_enabled);\n+\n+/* IPI for PM modes is enabled */\n+void cpu_set_ipi_enable(bool sreset_enabled);\n \n static inline void cpu_give_self_os(void)\n {\n", "prefixes": [ "4/5" ] }