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GET /api/patches/813505/?format=api
{ "id": 813505, "url": "http://patchwork.ozlabs.org/api/patches/813505/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1505318412-27121-10-git-send-email-patrice.chotard@st.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1505318412-27121-10-git-send-email-patrice.chotard@st.com>", "list_archive_url": null, "date": "2017-09-13T16:00:12", "name": "[U-Boot,v2,9/9] board: Add stm32h7 SoC, discovery and evaluation boards support", "commit_ref": "246771b1845df858007165827d934ca9c43153b3", "pull_url": null, "state": "accepted", "archived": false, "hash": "f0f206a639e3c554bc795713178021f93b674df3", "submitter": { "id": 63958, "url": "http://patchwork.ozlabs.org/api/people/63958/?format=api", "name": "Patrice CHOTARD", "email": "patrice.chotard@st.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1505318412-27121-10-git-send-email-patrice.chotard@st.com/mbox/", "series": [ { "id": 2943, "url": "http://patchwork.ozlabs.org/api/series/2943/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=2943", "date": "2017-09-13T16:00:03", "name": "Add STM32H7 SoC, Discovery and Evaluation board support", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/2943/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/813505/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/813505/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xsmk53nXtz9sNV\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 14 Sep 2017 02:06:21 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 1AD4BC22208; Wed, 13 Sep 2017 16:05:34 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 69144C22623;\n\tWed, 13 Sep 2017 16:00:46 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 75734C21EF4; Wed, 13 Sep 2017 16:00:30 +0000 (UTC)", "from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com\n\t[91.207.212.93])\n\tby lists.denx.de (Postfix) with ESMTPS id B3510C22505\n\tfor <u-boot@lists.denx.de>; Wed, 13 Sep 2017 16:00:25 +0000 (UTC)", "from pps.filterd (m0046660.ppops.net [127.0.0.1])\n\tby mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8DFxD1a000945; Wed, 13 Sep 2017 18:00:24 +0200", "from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35])\n\tby mx08-00178001.pphosted.com with ESMTP id 2cv5e519u7-1\n\t(version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT);\n\tWed, 13 Sep 2017 18:00:24 +0200", "from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9])\n\tby beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E1E713A;\n\tWed, 13 Sep 2017 16:00:23 +0000 (GMT)", "from Webmail-eu.st.com (sfhdag6node3.st.com [10.75.127.18])\n\tby zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id B2F972B31;\n\tWed, 13 Sep 2017 16:00:23 +0000 (GMT)", "from localhost (10.75.127.45) by SFHDAG6NODE3.st.com (10.75.127.18)\n\twith Microsoft SMTP Server (TLS) id 15.0.1178.4;\n\tWed, 13 Sep 2017 18:00:23 +0200" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.7 required=5.0 tests=RCVD_IN_DNSWL_LOW\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "From": "<patrice.chotard@st.com>", "To": "<u-boot@lists.denx.de>, <albert.u.boot@aribaud.net>, <sjg@chromium.org>, \n\t<vikas.manocha@st.com>", "Date": "Wed, 13 Sep 2017 18:00:12 +0200", "Message-ID": "<1505318412-27121-10-git-send-email-patrice.chotard@st.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1505318412-27121-1-git-send-email-patrice.chotard@st.com>", "References": "<1505318412-27121-1-git-send-email-patrice.chotard@st.com>", "MIME-Version": "1.0", "X-Originating-IP": "[10.75.127.45]", "X-ClientProxiedBy": "SFHDAG8NODE2.st.com (10.75.127.23) To SFHDAG6NODE3.st.com\n\t(10.75.127.18)", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-13_04:, , signatures=0", "Subject": "[U-Boot] [PATCH v2 9/9] board: Add stm32h7 SoC,\n\tdiscovery and evaluation boards support", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Patrice Chotard <patrice.chotard@st.com>\n\nThis patch adds support for stm32h7 soc family, stm32h743\ndiscovery and evaluation boards.\n\nFor more information about STM32H7 series, please visit:\nhttp://www.st.com/en/microcontrollers/stm32h7-series.html\n\nSigned-off-by: Patrice Chotard <patrice.chotard@st.com>\n---\n\nv2: _ get memory address and size from DT in board file \n\n\n arch/arm/include/asm/arch-stm32h7/gpio.h | 126 +++++++++++++++++++++++++++++\n arch/arm/include/asm/arch-stm32h7/stm32.h | 21 +++++\n arch/arm/mach-stm32/Kconfig | 17 ++++\n arch/arm/mach-stm32/Makefile | 1 +\n arch/arm/mach-stm32/stm32h7/Kconfig | 12 +++\n arch/arm/mach-stm32/stm32h7/Makefile | 8 ++\n arch/arm/mach-stm32/stm32h7/soc.c | 59 ++++++++++++++\n board/st/stm32h743-disco/Kconfig | 19 +++++\n board/st/stm32h743-disco/MAINTAINERS | 7 ++\n board/st/stm32h743-disco/Makefile | 8 ++\n board/st/stm32h743-disco/stm32h743-disco.c | 56 +++++++++++++\n board/st/stm32h743-eval/Kconfig | 19 +++++\n board/st/stm32h743-eval/MAINTAINERS | 6 ++\n board/st/stm32h743-eval/Makefile | 8 ++\n board/st/stm32h743-eval/stm32h743-eval.c | 56 +++++++++++++\n configs/stm32h743-disco_defconfig | 30 +++++++\n configs/stm32h743-eval_defconfig | 30 +++++++\n include/configs/stm32h743-disco.h | 51 ++++++++++++\n include/configs/stm32h743-eval.h | 51 ++++++++++++\n 19 files changed, 585 insertions(+)\n create mode 100644 arch/arm/include/asm/arch-stm32h7/gpio.h\n create mode 100644 arch/arm/include/asm/arch-stm32h7/stm32.h\n create mode 100644 arch/arm/mach-stm32/stm32h7/Kconfig\n create mode 100644 arch/arm/mach-stm32/stm32h7/Makefile\n create mode 100644 arch/arm/mach-stm32/stm32h7/soc.c\n create mode 100644 board/st/stm32h743-disco/Kconfig\n create mode 100644 board/st/stm32h743-disco/MAINTAINERS\n create mode 100644 board/st/stm32h743-disco/Makefile\n create mode 100644 board/st/stm32h743-disco/stm32h743-disco.c\n create mode 100644 board/st/stm32h743-eval/Kconfig\n create mode 100644 board/st/stm32h743-eval/MAINTAINERS\n create mode 100644 board/st/stm32h743-eval/Makefile\n create mode 100644 board/st/stm32h743-eval/stm32h743-eval.c\n create mode 100644 configs/stm32h743-disco_defconfig\n create mode 100644 configs/stm32h743-eval_defconfig\n create mode 100644 include/configs/stm32h743-disco.h\n create mode 100644 include/configs/stm32h743-eval.h", "diff": "diff --git a/arch/arm/include/asm/arch-stm32h7/gpio.h b/arch/arm/include/asm/arch-stm32h7/gpio.h\nnew file mode 100644\nindex 0000000..450784c\n--- /dev/null\n+++ b/arch/arm/include/asm/arch-stm32h7/gpio.h\n@@ -0,0 +1,126 @@\n+/*\n+ * Copyright (C) STMicroelectronics SA 2017\n+ * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#ifndef _STM32_GPIO_H_\n+#define _STM32_GPIO_H_\n+#include <asm/gpio.h>\n+\n+enum stm32_gpio_port {\n+\tSTM32_GPIO_PORT_A = 0,\n+\tSTM32_GPIO_PORT_B,\n+\tSTM32_GPIO_PORT_C,\n+\tSTM32_GPIO_PORT_D,\n+\tSTM32_GPIO_PORT_E,\n+\tSTM32_GPIO_PORT_F,\n+\tSTM32_GPIO_PORT_G,\n+\tSTM32_GPIO_PORT_H,\n+\tSTM32_GPIO_PORT_I\n+};\n+\n+enum stm32_gpio_pin {\n+\tSTM32_GPIO_PIN_0 = 0,\n+\tSTM32_GPIO_PIN_1,\n+\tSTM32_GPIO_PIN_2,\n+\tSTM32_GPIO_PIN_3,\n+\tSTM32_GPIO_PIN_4,\n+\tSTM32_GPIO_PIN_5,\n+\tSTM32_GPIO_PIN_6,\n+\tSTM32_GPIO_PIN_7,\n+\tSTM32_GPIO_PIN_8,\n+\tSTM32_GPIO_PIN_9,\n+\tSTM32_GPIO_PIN_10,\n+\tSTM32_GPIO_PIN_11,\n+\tSTM32_GPIO_PIN_12,\n+\tSTM32_GPIO_PIN_13,\n+\tSTM32_GPIO_PIN_14,\n+\tSTM32_GPIO_PIN_15\n+};\n+\n+enum stm32_gpio_mode {\n+\tSTM32_GPIO_MODE_IN = 0,\n+\tSTM32_GPIO_MODE_OUT,\n+\tSTM32_GPIO_MODE_AF,\n+\tSTM32_GPIO_MODE_AN\n+};\n+\n+enum stm32_gpio_otype {\n+\tSTM32_GPIO_OTYPE_PP = 0,\n+\tSTM32_GPIO_OTYPE_OD\n+};\n+\n+enum stm32_gpio_speed {\n+\tSTM32_GPIO_SPEED_2M = 0,\n+\tSTM32_GPIO_SPEED_25M,\n+\tSTM32_GPIO_SPEED_50M,\n+\tSTM32_GPIO_SPEED_100M\n+};\n+\n+enum stm32_gpio_pupd {\n+\tSTM32_GPIO_PUPD_NO = 0,\n+\tSTM32_GPIO_PUPD_UP,\n+\tSTM32_GPIO_PUPD_DOWN\n+};\n+\n+enum stm32_gpio_af {\n+\tSTM32_GPIO_AF0 = 0,\n+\tSTM32_GPIO_AF1,\n+\tSTM32_GPIO_AF2,\n+\tSTM32_GPIO_AF3,\n+\tSTM32_GPIO_AF4,\n+\tSTM32_GPIO_AF5,\n+\tSTM32_GPIO_AF6,\n+\tSTM32_GPIO_AF7,\n+\tSTM32_GPIO_AF8,\n+\tSTM32_GPIO_AF9,\n+\tSTM32_GPIO_AF10,\n+\tSTM32_GPIO_AF11,\n+\tSTM32_GPIO_AF12,\n+\tSTM32_GPIO_AF13,\n+\tSTM32_GPIO_AF14,\n+\tSTM32_GPIO_AF15\n+};\n+\n+struct stm32_gpio_dsc {\n+\tenum stm32_gpio_port\tport;\n+\tenum stm32_gpio_pin\tpin;\n+};\n+\n+struct stm32_gpio_ctl {\n+\tenum stm32_gpio_mode\tmode;\n+\tenum stm32_gpio_otype\totype;\n+\tenum stm32_gpio_speed\tspeed;\n+\tenum stm32_gpio_pupd\tpupd;\n+\tenum stm32_gpio_af\taf;\n+};\n+\n+struct stm32_gpio_regs {\n+\tu32 moder;\t/* GPIO port mode */\n+\tu32 otyper;\t/* GPIO port output type */\n+\tu32 ospeedr;\t/* GPIO port output speed */\n+\tu32 pupdr;\t/* GPIO port pull-up/pull-down */\n+\tu32 idr;\t/* GPIO port input data */\n+\tu32 odr;\t/* GPIO port output data */\n+\tu32 bsrr;\t/* GPIO port bit set/reset */\n+\tu32 lckr;\t/* GPIO port configuration lock */\n+\tu32 afr[2];\t/* GPIO alternate function */\n+};\n+\n+struct stm32_gpio_priv {\n+\tstruct stm32_gpio_regs *regs;\n+};\n+\n+static inline unsigned stm32_gpio_to_port(unsigned gpio)\n+{\n+\treturn gpio / 16;\n+}\n+\n+static inline unsigned stm32_gpio_to_pin(unsigned gpio)\n+{\n+\treturn gpio % 16;\n+}\n+\n+#endif /* _STM32_GPIO_H_ */\ndiff --git a/arch/arm/include/asm/arch-stm32h7/stm32.h b/arch/arm/include/asm/arch-stm32h7/stm32.h\nnew file mode 100644\nindex 0000000..9ff1f13\n--- /dev/null\n+++ b/arch/arm/include/asm/arch-stm32h7/stm32.h\n@@ -0,0 +1,21 @@\n+/*\n+ * Copyright (C) STMicroelectronics SA 2017\n+ * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#ifndef _ASM_ARCH_HARDWARE_H\n+#define _ASM_ARCH_HARDWARE_H\n+\n+/*\n+ * This empty files is needed to not break compilation\n+ * Some common drivers to STM32F4/F7 and H7 include a stm32.h file\n+ * Some cleanup need to be done to communalize all the following\n+ * stm32.h files:\n+ *\n+ * arch/arm/include/asm/arch-stm32f1/stm32.h\n+ * arch/arm/include/asm/arch-stm32f4/stm32.h\n+ * arch/arm/include/asm/arch-stm32f7/stm32.h\n+ */\n+#endif /* _ASM_ARCH_HARDWARE_H */\ndiff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig\nindex 947ce5f..b618b60 100644\n--- a/arch/arm/mach-stm32/Kconfig\n+++ b/arch/arm/mach-stm32/Kconfig\n@@ -25,7 +25,24 @@ config STM32F7\n \tselect SPL_SYS_MALLOC_SIMPLE\n \tselect SPL_XIP_SUPPORT\n \n+config STM32H7\n+\tbool \"stm32h7 family\"\n+\tselect CLK\n+\tselect DM_GPIO\n+\tselect DM_RESET\n+\tselect MISC\n+\tselect PINCTRL\n+\tselect PINCTRL_STM32\n+\tselect RAM\n+\tselect REGMAP\n+\tselect STM32_SDRAM\n+\tselect STM32_RCC\n+\tselect STM32_RESET\n+\tselect STM32X7_SERIAL\n+\tselect SYSCON\n+\n source \"arch/arm/mach-stm32/stm32f4/Kconfig\"\n source \"arch/arm/mach-stm32/stm32f7/Kconfig\"\n+source \"arch/arm/mach-stm32/stm32h7/Kconfig\"\n \n endif\ndiff --git a/arch/arm/mach-stm32/Makefile b/arch/arm/mach-stm32/Makefile\nindex 6b76944..0f5ac37 100644\n--- a/arch/arm/mach-stm32/Makefile\n+++ b/arch/arm/mach-stm32/Makefile\n@@ -7,3 +7,4 @@\n \n obj-$(CONFIG_STM32F4) += stm32f4/\n obj-$(CONFIG_STM32F7) += stm32f7/\n+obj-$(CONFIG_STM32H7) += stm32h7/\ndiff --git a/arch/arm/mach-stm32/stm32h7/Kconfig b/arch/arm/mach-stm32/stm32h7/Kconfig\nnew file mode 100644\nindex 0000000..55e6217\n--- /dev/null\n+++ b/arch/arm/mach-stm32/stm32h7/Kconfig\n@@ -0,0 +1,12 @@\n+if STM32H7\n+\n+config TARGET_STM32H743_DISCO\n+\tbool \"STM32H743 Discovery board\"\n+\n+config TARGET_STM32H743_EVAL\n+\tbool \"STM32H743 Evaluation board\"\n+\n+source \"board/st/stm32h743-eval/Kconfig\"\n+source \"board/st/stm32h743-disco/Kconfig\"\n+\n+endif\ndiff --git a/arch/arm/mach-stm32/stm32h7/Makefile b/arch/arm/mach-stm32/stm32h7/Makefile\nnew file mode 100644\nindex 0000000..97f92f7\n--- /dev/null\n+++ b/arch/arm/mach-stm32/stm32h7/Makefile\n@@ -0,0 +1,8 @@\n+#\n+# Copyright (c) 2017\n+# Patrice Chotard <patrice.chotard@st.com>\n+#\n+# SPDX-License-Identifier:\tGPL-2.0+\n+#\n+\n+obj-y += soc.o\ndiff --git a/arch/arm/mach-stm32/stm32h7/soc.c b/arch/arm/mach-stm32/stm32h7/soc.c\nnew file mode 100644\nindex 0000000..a65fab6\n--- /dev/null\n+++ b/arch/arm/mach-stm32/stm32h7/soc.c\n@@ -0,0 +1,59 @@\n+/*\n+ * Copyright (C) STMicroelectronics SA 2017\n+ * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#include <common.h>\n+#include <asm/io.h>\n+#include <asm/armv7m_mpu.h>\n+\n+u32 get_cpu_rev(void)\n+{\n+\treturn 0;\n+}\n+\n+int arch_cpu_init(void)\n+{\n+\tint i;\n+\n+\tstruct mpu_region_config stm32_region_config[] = {\n+\t\t/*\n+\t\t * Make all 4GB cacheable & executable. We are overriding it\n+\t\t * with next region for any requirement. e.g. below region1,\n+\t\t * 2 etc.\n+\t\t * In other words, the area not coming in following\n+\t\t * regions configuration is the one configured here in region_0\n+\t\t * (cacheable & executable).\n+\t\t */\n+\t\t{ 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,\n+\t\tO_I_WB_RD_WR_ALLOC, REGION_4GB },\n+\n+\t\t/* Code area, executable & strongly ordered */\n+\t\t{ 0xD0000000, REGION_1, XN_EN, PRIV_RW_USR_RW,\n+\t\tSTRONG_ORDER, REGION_8MB },\n+\n+\t\t/* Device area in all H7 : Not executable */\n+\t\t{ 0x40000000, REGION_2, XN_EN, PRIV_RW_USR_RW,\n+\t\tDEVICE_NON_SHARED, REGION_512MB },\n+\n+\t\t/*\n+\t\t * Armv7m fixed configuration: strongly ordered & not\n+\t\t * executable, not cacheable\n+\t\t */\n+\t\t{ 0xE0000000, REGION_4, XN_EN, PRIV_RW_USR_RW,\n+\t\tSTRONG_ORDER, REGION_512MB },\n+\t};\n+\n+\tdisable_mpu();\n+\tfor (i = 0; i < ARRAY_SIZE(stm32_region_config); i++)\n+\t\tmpu_config(&stm32_region_config[i]);\n+\tenable_mpu();\n+\n+\treturn 0;\n+}\n+\n+void s_init(void)\n+{\n+}\ndiff --git a/board/st/stm32h743-disco/Kconfig b/board/st/stm32h743-disco/Kconfig\nnew file mode 100644\nindex 0000000..7d6ec1d\n--- /dev/null\n+++ b/board/st/stm32h743-disco/Kconfig\n@@ -0,0 +1,19 @@\n+if TARGET_STM32H743_DISCO\n+\n+config SYS_BOARD\n+\tstring\n+\tdefault \"stm32h743-disco\"\n+\n+config SYS_VENDOR\n+\tstring\n+\tdefault \"st\"\n+\n+config SYS_SOC\n+\tstring\n+\tdefault \"stm32h7\"\n+\n+config SYS_CONFIG_NAME\n+\tstring\n+\tdefault \"stm32h743-disco\"\n+\n+endif\ndiff --git a/board/st/stm32h743-disco/MAINTAINERS b/board/st/stm32h743-disco/MAINTAINERS\nnew file mode 100644\nindex 0000000..e5e0b5a\n--- /dev/null\n+++ b/board/st/stm32h743-disco/MAINTAINERS\n@@ -0,0 +1,7 @@\n+STM32H743 DISCOVERY BOARD\n+M:\tPatrice Chotard <patrice.chotard@st.com>\n+S:\tMaintained\n+F:\tboard/st/stm32h743-disco\n+F:\tinclude/configs/stm32h743-disco.h\n+F:\tconfigs/stm32h743-disco_defconfig\n+F:\tarch/arm/dts/stm32h7*\ndiff --git a/board/st/stm32h743-disco/Makefile b/board/st/stm32h743-disco/Makefile\nnew file mode 100644\nindex 0000000..778fe1c\n--- /dev/null\n+++ b/board/st/stm32h743-disco/Makefile\n@@ -0,0 +1,8 @@\n+#\n+# Copyright (C) STMicroelectronics SA 2017\n+# Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.#\n+#\n+# SPDX-License-Identifier:\tGPL-2.0+\n+#\n+\n+obj-y\t:= stm32h743-disco.o\ndiff --git a/board/st/stm32h743-disco/stm32h743-disco.c b/board/st/stm32h743-disco/stm32h743-disco.c\nnew file mode 100644\nindex 0000000..625b3a0\n--- /dev/null\n+++ b/board/st/stm32h743-disco/stm32h743-disco.c\n@@ -0,0 +1,56 @@\n+/*\n+ * Copyright (C) STMicroelectronics SA 2017\n+ * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#include <common.h>\n+#include <dm.h>\n+\n+DECLARE_GLOBAL_DATA_PTR;\n+\n+int dram_init(void)\n+{\n+\tstruct udevice *dev;\n+\tint ret;\n+\n+\tret = uclass_get_device(UCLASS_RAM, 0, &dev);\n+\tif (ret) {\n+\t\tdebug(\"DRAM init failed: %d\\n\", ret);\n+\t\treturn ret;\n+\t}\n+\n+\tif (fdtdec_setup_memory_size() != 0)\n+\t\tret = -EINVAL;\n+\n+\treturn ret;\n+}\n+\n+int dram_init_banksize(void)\n+{\n+\tfdtdec_setup_memory_banksize();\n+\n+\treturn 0;\n+}\n+\n+int board_early_init_f(void)\n+{\n+\treturn 0;\n+}\n+\n+u32 get_board_rev(void)\n+{\n+\treturn 0;\n+}\n+\n+int board_late_init(void)\n+{\n+\treturn 0;\n+}\n+\n+int board_init(void)\n+{\n+\tgd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;\n+\treturn 0;\n+}\ndiff --git a/board/st/stm32h743-eval/Kconfig b/board/st/stm32h743-eval/Kconfig\nnew file mode 100644\nindex 0000000..ea879b1\n--- /dev/null\n+++ b/board/st/stm32h743-eval/Kconfig\n@@ -0,0 +1,19 @@\n+if TARGET_STM32H743_EVAL\n+\n+config SYS_BOARD\n+\tstring\n+\tdefault \"stm32h743-eval\"\n+\n+config SYS_VENDOR\n+\tstring\n+\tdefault \"st\"\n+\n+config SYS_SOC\n+\tstring\n+\tdefault \"stm32h7\"\n+\n+config SYS_CONFIG_NAME\n+\tstring\n+\tdefault \"stm32h743-eval\"\n+\n+endif\ndiff --git a/board/st/stm32h743-eval/MAINTAINERS b/board/st/stm32h743-eval/MAINTAINERS\nnew file mode 100644\nindex 0000000..3029c56\n--- /dev/null\n+++ b/board/st/stm32h743-eval/MAINTAINERS\n@@ -0,0 +1,6 @@\n+STM32H743 EVALUATION BOARD\n+M:\tPatrice Chotard <patrice.chotard@st.com>\n+S:\tMaintained\n+F:\tboard/st/stm32h743-eval\n+F:\tinclude/configs/stm32h743-eval.h\n+F:\tconfigs/stm32h743-eval_defconfig\ndiff --git a/board/st/stm32h743-eval/Makefile b/board/st/stm32h743-eval/Makefile\nnew file mode 100644\nindex 0000000..4f25b2d\n--- /dev/null\n+++ b/board/st/stm32h743-eval/Makefile\n@@ -0,0 +1,8 @@\n+#\n+# (C) Copyright 2017\n+# Patrice Chotard, <patrice.chotard@st.com>\n+#\n+# SPDX-License-Identifier:\tGPL-2.0+\n+#\n+\n+obj-y\t:= stm32h743-eval.o\ndiff --git a/board/st/stm32h743-eval/stm32h743-eval.c b/board/st/stm32h743-eval/stm32h743-eval.c\nnew file mode 100644\nindex 0000000..625b3a0\n--- /dev/null\n+++ b/board/st/stm32h743-eval/stm32h743-eval.c\n@@ -0,0 +1,56 @@\n+/*\n+ * Copyright (C) STMicroelectronics SA 2017\n+ * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#include <common.h>\n+#include <dm.h>\n+\n+DECLARE_GLOBAL_DATA_PTR;\n+\n+int dram_init(void)\n+{\n+\tstruct udevice *dev;\n+\tint ret;\n+\n+\tret = uclass_get_device(UCLASS_RAM, 0, &dev);\n+\tif (ret) {\n+\t\tdebug(\"DRAM init failed: %d\\n\", ret);\n+\t\treturn ret;\n+\t}\n+\n+\tif (fdtdec_setup_memory_size() != 0)\n+\t\tret = -EINVAL;\n+\n+\treturn ret;\n+}\n+\n+int dram_init_banksize(void)\n+{\n+\tfdtdec_setup_memory_banksize();\n+\n+\treturn 0;\n+}\n+\n+int board_early_init_f(void)\n+{\n+\treturn 0;\n+}\n+\n+u32 get_board_rev(void)\n+{\n+\treturn 0;\n+}\n+\n+int board_late_init(void)\n+{\n+\treturn 0;\n+}\n+\n+int board_init(void)\n+{\n+\tgd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;\n+\treturn 0;\n+}\ndiff --git a/configs/stm32h743-disco_defconfig b/configs/stm32h743-disco_defconfig\nnew file mode 100644\nindex 0000000..eed921d2\n--- /dev/null\n+++ b/configs/stm32h743-disco_defconfig\n@@ -0,0 +1,30 @@\n+CONFIG_ARM=y\n+CONFIG_STM32=y\n+CONFIG_SYS_MALLOC_F_LEN=0xF00\n+CONFIG_STM32H7=y\n+CONFIG_TARGET_STM32H743_DISCO=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"stm32h743i-disco\"\n+CONFIG_BOOTDELAY=3\n+CONFIG_DEFAULT_FDT_FILE=\"stm32h743i-disco\"\n+# CONFIG_DISPLAY_CPUINFO is not set\n+CONFIG_BOARD_EARLY_INIT_F=y\n+CONFIG_HUSH_PARSER=y\n+CONFIG_SYS_PROMPT=\"U-Boot > \"\n+CONFIG_AUTOBOOT_KEYED=y\n+CONFIG_AUTOBOOT_PROMPT=\"Hit SPACE in %d seconds to stop autoboot.\\n\"\n+CONFIG_AUTOBOOT_STOP_STR=\" \"\n+CONFIG_CMD_BOOTZ=y\n+# CONFIG_CMD_IMLS is not set\n+# CONFIG_CMD_FPGA is not set\n+# CONFIG_CMD_SETEXPR is not set\n+# CONFIG_CMD_NET is not set\n+# CONFIG_CMD_NFS is not set\n+CONFIG_CMD_TIMER=y\n+CONFIG_OF_CONTROL=y\n+CONFIG_OF_EMBED=y\n+# CONFIG_PINCTRL_FULL is not set\n+# CONFIG_SPL_SERIAL_PRESENT is not set\n+CONFIG_REGEX=y\n+CONFIG_LIB_RAND=y\n+CONFIG_OF_LIBFDT_OVERLAY=y\n+# CONFIG_EFI_LOADER is not set\ndiff --git a/configs/stm32h743-eval_defconfig b/configs/stm32h743-eval_defconfig\nnew file mode 100644\nindex 0000000..61e702e\n--- /dev/null\n+++ b/configs/stm32h743-eval_defconfig\n@@ -0,0 +1,30 @@\n+CONFIG_ARM=y\n+CONFIG_STM32=y\n+CONFIG_SYS_MALLOC_F_LEN=0xF00\n+CONFIG_STM32H7=y\n+CONFIG_TARGET_STM32H743_EVAL=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"stm32h743i-eval\"\n+CONFIG_BOOTDELAY=3\n+CONFIG_DEFAULT_FDT_FILE=\"stm32h743i-eval\"\n+# CONFIG_DISPLAY_CPUINFO is not set\n+CONFIG_BOARD_EARLY_INIT_F=y\n+CONFIG_HUSH_PARSER=y\n+CONFIG_SYS_PROMPT=\"U-Boot > \"\n+CONFIG_AUTOBOOT_KEYED=y\n+CONFIG_AUTOBOOT_PROMPT=\"Hit SPACE in %d seconds to stop autoboot.\\n\"\n+CONFIG_AUTOBOOT_STOP_STR=\" \"\n+CONFIG_CMD_BOOTZ=y\n+# CONFIG_CMD_IMLS is not set\n+# CONFIG_CMD_FPGA is not set\n+# CONFIG_CMD_SETEXPR is not set\n+# CONFIG_CMD_NET is not set\n+# CONFIG_CMD_NFS is not set\n+CONFIG_CMD_TIMER=y\n+CONFIG_OF_CONTROL=y\n+CONFIG_OF_EMBED=y\n+# CONFIG_PINCTRL_FULL is not set\n+# CONFIG_SPL_SERIAL_PRESENT is not set\n+CONFIG_REGEX=y\n+CONFIG_LIB_RAND=y\n+CONFIG_OF_LIBFDT_OVERLAY=y\n+# CONFIG_EFI_LOADER is not set\ndiff --git a/include/configs/stm32h743-disco.h b/include/configs/stm32h743-disco.h\nnew file mode 100644\nindex 0000000..b0061cd\n--- /dev/null\n+++ b/include/configs/stm32h743-disco.h\n@@ -0,0 +1,51 @@\n+/*\n+ * Copyright (C) STMicroelectronics SA 2017\n+ * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#ifndef __CONFIG_H\n+#define __CONFIG_H\n+\n+#include <config.h>\n+\n+#define CONFIG_SYS_FLASH_BASE\t\t0x08000000\n+#define CONFIG_SYS_INIT_SP_ADDR\t\t0x30020000\n+#define CONFIG_SYS_TEXT_BASE\t\t0x08000000\n+\n+/*\n+ * Configuration of the external SDRAM memory\n+ */\n+#define CONFIG_NR_DRAM_BANKS\t\t1\n+#define CONFIG_SYS_RAM_BASE\t\t0xD0000000\n+#define CONFIG_SYS_SDRAM_BASE\t\tCONFIG_SYS_RAM_BASE\n+#define CONFIG_SYS_LOAD_ADDR\t\t0xD0400000\n+#define CONFIG_LOADADDR\t\t\t0xD0400000\n+\n+#define CONFIG_ENV_SIZE\t\t\t(8 << 10)\n+\n+#define CONFIG_SYS_ARCH_TIMER\n+#define CONFIG_SYS_HZ_CLOCK\t\t250000000\n+\n+#define CONFIG_CMDLINE_TAG\n+#define CONFIG_SETUP_MEMORY_TAGS\n+#define CONFIG_INITRD_TAG\n+#define CONFIG_REVISION_TAG\n+\n+#define CONFIG_SYS_MAXARGS\t\t16\n+#define CONFIG_SYS_MALLOC_LEN\t\t(1 * 1024 * 1024)\n+\n+#define CONFIG_BOOTARGS\t\t\t\t\t\t\t\\\n+\t\"console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel\"\n+\n+/*\n+ * Command line configuration.\n+ */\n+#define CONFIG_SYS_LONGHELP\n+#define CONFIG_AUTO_COMPLETE\n+#define CONFIG_CMDLINE_EDITING\n+#define CONFIG_CMD_CACHE\n+#define CONFIG_BOARD_LATE_INIT\n+\n+#endif /* __CONFIG_H */\ndiff --git a/include/configs/stm32h743-eval.h b/include/configs/stm32h743-eval.h\nnew file mode 100644\nindex 0000000..b0061cd\n--- /dev/null\n+++ b/include/configs/stm32h743-eval.h\n@@ -0,0 +1,51 @@\n+/*\n+ * Copyright (C) STMicroelectronics SA 2017\n+ * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#ifndef __CONFIG_H\n+#define __CONFIG_H\n+\n+#include <config.h>\n+\n+#define CONFIG_SYS_FLASH_BASE\t\t0x08000000\n+#define CONFIG_SYS_INIT_SP_ADDR\t\t0x30020000\n+#define CONFIG_SYS_TEXT_BASE\t\t0x08000000\n+\n+/*\n+ * Configuration of the external SDRAM memory\n+ */\n+#define CONFIG_NR_DRAM_BANKS\t\t1\n+#define CONFIG_SYS_RAM_BASE\t\t0xD0000000\n+#define CONFIG_SYS_SDRAM_BASE\t\tCONFIG_SYS_RAM_BASE\n+#define CONFIG_SYS_LOAD_ADDR\t\t0xD0400000\n+#define CONFIG_LOADADDR\t\t\t0xD0400000\n+\n+#define CONFIG_ENV_SIZE\t\t\t(8 << 10)\n+\n+#define CONFIG_SYS_ARCH_TIMER\n+#define CONFIG_SYS_HZ_CLOCK\t\t250000000\n+\n+#define CONFIG_CMDLINE_TAG\n+#define CONFIG_SETUP_MEMORY_TAGS\n+#define CONFIG_INITRD_TAG\n+#define CONFIG_REVISION_TAG\n+\n+#define CONFIG_SYS_MAXARGS\t\t16\n+#define CONFIG_SYS_MALLOC_LEN\t\t(1 * 1024 * 1024)\n+\n+#define CONFIG_BOOTARGS\t\t\t\t\t\t\t\\\n+\t\"console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel\"\n+\n+/*\n+ * Command line configuration.\n+ */\n+#define CONFIG_SYS_LONGHELP\n+#define CONFIG_AUTO_COMPLETE\n+#define CONFIG_CMDLINE_EDITING\n+#define CONFIG_CMD_CACHE\n+#define CONFIG_BOARD_LATE_INIT\n+\n+#endif /* __CONFIG_H */\n", "prefixes": [ "U-Boot", "v2", "9/9" ] }