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GET /api/patches/813407/?format=api
{ "id": 813407, "url": "http://patchwork.ozlabs.org/api/patches/813407/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170913115029.47626-2-pasic@linux.vnet.ibm.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170913115029.47626-2-pasic@linux.vnet.ibm.com>", "list_archive_url": null, "date": "2017-09-13T11:50:26", "name": "[v2,1/4] s390x/css: introduce css data stream", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "8cf0f5625d87605d8793959f97b00d3d153cc1f9", "submitter": { "id": 68297, "url": "http://patchwork.ozlabs.org/api/people/68297/?format=api", "name": "Halil Pasic", "email": "pasic@linux.vnet.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170913115029.47626-2-pasic@linux.vnet.ibm.com/mbox/", "series": [ { "id": 2899, "url": "http://patchwork.ozlabs.org/api/series/2899/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2899", "date": "2017-09-13T11:50:25", "name": "add CCW indirect data access support", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/2899/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/813407/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/813407/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xsg6Z43rDz9sNV\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 13 Sep 2017 21:53:42 +1000 (AEST)", "from localhost ([::1]:41779 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1ds6Ee-0002IP-Jx\n\tfor incoming@patchwork.ozlabs.org; Wed, 13 Sep 2017 07:53:40 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:43317)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <pasic@linux.vnet.ibm.com>) id 1ds6Bq-0000Rv-BX\n\tfor qemu-devel@nongnu.org; Wed, 13 Sep 2017 07:50:51 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <pasic@linux.vnet.ibm.com>) id 1ds6Bl-0005Rz-C2\n\tfor qemu-devel@nongnu.org; Wed, 13 Sep 2017 07:50:46 -0400", "from mx0b-001b2d01.pphosted.com ([148.163.158.5]:59124\n\thelo=mx0a-001b2d01.pphosted.com)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <pasic@linux.vnet.ibm.com>)\n\tid 1ds6Bk-0005Ra-Vi\n\tfor qemu-devel@nongnu.org; Wed, 13 Sep 2017 07:50:41 -0400", "from pps.filterd (m0098413.ppops.net [127.0.0.1])\n\tby mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8DBn7hh033160\n\tfor <qemu-devel@nongnu.org>; Wed, 13 Sep 2017 07:50:40 -0400", "from e06smtp15.uk.ibm.com (e06smtp15.uk.ibm.com [195.75.94.111])\n\tby mx0b-001b2d01.pphosted.com with ESMTP id 2cy2qsmdyw-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor <qemu-devel@nongnu.org>; Wed, 13 Sep 2017 07:50:39 -0400", "from localhost\n\tby e06smtp15.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! Violators will be prosecuted\n\tfor <qemu-devel@nongnu.org> from <pasic@linux.vnet.ibm.com>;\n\tWed, 13 Sep 2017 12:50:38 +0100", "from b06cxnps3075.portsmouth.uk.ibm.com (9.149.109.195)\n\tby e06smtp15.uk.ibm.com (192.168.101.145) with IBM ESMTP SMTP\n\tGateway: Authorized Use Only! Violators will be prosecuted; \n\tWed, 13 Sep 2017 12:50:36 +0100", "from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com\n\t[9.149.105.58])\n\tby b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with\n\tESMTP id v8DBoawA24051744; Wed, 13 Sep 2017 11:50:36 GMT", "from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 9341B4C040;\n\tWed, 13 Sep 2017 12:47:09 +0100 (BST)", "from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 64EAE4C044;\n\tWed, 13 Sep 2017 12:47:09 +0100 (BST)", "from tuxmaker.boeblingen.de.ibm.com (unknown [9.152.85.9])\n\tby d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTPS;\n\tWed, 13 Sep 2017 12:47:09 +0100 (BST)" ], "From": "Halil Pasic <pasic@linux.vnet.ibm.com>", "To": "Cornelia Huck <cohuck@redhat.com>", "Date": "Wed, 13 Sep 2017 13:50:26 +0200", "X-Mailer": "git-send-email 2.13.5", "In-Reply-To": "<20170913115029.47626-1-pasic@linux.vnet.ibm.com>", "References": "<20170913115029.47626-1-pasic@linux.vnet.ibm.com>", "X-TM-AS-GCONF": "00", "x-cbid": "17091311-0020-0000-0000-000003B7A268", "X-IBM-AV-DETECTION": "SAVI=unused REMOTE=unused XFE=unused", "x-cbparentid": "17091311-0021-0000-0000-000042491325", "Message-Id": "<20170913115029.47626-2-pasic@linux.vnet.ibm.com>", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-13_04:, , signatures=0", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=0\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1709130186", "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy]", "X-Received-From": "148.163.158.5", "Subject": "[Qemu-devel] [PATCH v2 1/4] s390x/css: introduce css data stream", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>,\n\tHalil Pasic <pasic@linux.vnet.ibm.com>,\n\tPierre Morel <pmorel@linux.vnet.ibm.com>, qemu-devel@nongnu.org", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "This is a preparation for introducing handling for indirect data\naddressing and modified indirect data addressing (CCW). Here we introduce\nan interface which should make the addressing scheme transparent for the\nclient code. Here we implement only the basic scheme (no IDA or MIDA).\n\nSigned-off-by: Halil Pasic <pasic@linux.vnet.ibm.com>\n---\n hw/s390x/css.c | 55 +++++++++++++++++++++++++++++++++++++++++\n include/hw/s390x/css.h | 67 ++++++++++++++++++++++++++++++++++++++++++++++++++\n 2 files changed, 122 insertions(+)", "diff": "diff --git a/hw/s390x/css.c b/hw/s390x/css.c\nindex 901dc6a0f3..e8d2016563 100644\n--- a/hw/s390x/css.c\n+++ b/hw/s390x/css.c\n@@ -783,6 +783,61 @@ static CCW1 copy_ccw_from_guest(hwaddr addr, bool fmt1)\n }\n return ret;\n }\n+/**\n+ * If out of bounds marks the stream broken. If broken returns -EINVAL,\n+ * otherwise the requested length (may be zero)\n+ */\n+static inline int cds_check_len(CcwDataStream *cds, int len)\n+{\n+ if (cds->at_byte + len > cds->count) {\n+ cds->flags |= CDS_F_STREAM_BROKEN;\n+ }\n+ return cds->flags & CDS_F_STREAM_BROKEN ? -EINVAL : len;\n+}\n+\n+static int ccw_dstream_rw_noflags(CcwDataStream *cds, void *buff, int len,\n+ CcwDataStreamOp op)\n+{\n+ int ret;\n+\n+ ret = cds_check_len(cds, len);\n+ if (ret <= 0) {\n+ return ret;\n+ }\n+ if (op == CDS_OP_A) {\n+ goto incr;\n+ }\n+ ret = address_space_rw(&address_space_memory, cds->cda,\n+ MEMTXATTRS_UNSPECIFIED, buff, len, op);\n+ if (ret != MEMTX_OK) {\n+ cds->flags |= CDS_F_STREAM_BROKEN;\n+ return -EINVAL;\n+ }\n+incr:\n+ cds->at_byte += len;\n+ cds->cda += len;\n+ return 0;\n+}\n+\n+void ccw_dstream_init(CcwDataStream *cds, CCW1 const *ccw, ORB const *orb)\n+{\n+ /*\n+ * We don't support MIDA (an optional facility) yet and we\n+ * catch this earlier. Just for expressing the precondition.\n+ */\n+ g_assert(!(orb->ctrl1 & ORB_CTRL1_MASK_MIDAW));\n+ cds->flags = (orb->ctrl0 & ORB_CTRL0_MASK_I2K ? CDS_F_I2K : 0) |\n+ (orb->ctrl0 & ORB_CTRL0_MASK_C64 ? CDS_F_C64 : 0) |\n+ (ccw->flags & CCW_FLAG_IDA ? CDS_F_IDA : 0);\n+ cds->count = ccw->count;\n+ cds->cda_orig = ccw->cda;\n+ ccw_dstream_rewind(cds);\n+ if (!(cds->flags & CDS_F_IDA)) {\n+ cds->op_handler = ccw_dstream_rw_noflags;\n+ } else {\n+ assert(false);\n+ }\n+}\n \n static int css_interpret_ccw(SubchDev *sch, hwaddr ccw_addr,\n bool suspend_allowed)\ndiff --git a/include/hw/s390x/css.h b/include/hw/s390x/css.h\nindex 0653d3c9be..79acaf99b7 100644\n--- a/include/hw/s390x/css.h\n+++ b/include/hw/s390x/css.h\n@@ -75,6 +75,29 @@ typedef struct CMBE {\n uint32_t reserved[7];\n } QEMU_PACKED CMBE;\n \n+typedef enum CcwDataStreamOp {\n+ CDS_OP_R = 0,\n+ CDS_OP_W = 1,\n+ CDS_OP_A = 2\n+} CcwDataStreamOp;\n+\n+/** normal usage is via SuchchDev.cds instead of instantiating */\n+typedef struct CcwDataStream {\n+#define CDS_F_IDA 0x01\n+#define CDS_F_MIDA 0x02\n+#define CDS_F_I2K 0x04\n+#define CDS_F_C64 0x08\n+#define CDS_F_STREAM_BROKEN 0x80\n+ uint8_t flags;\n+ uint8_t at_idaw;\n+ uint16_t at_byte;\n+ uint16_t count;\n+ uint32_t cda_orig;\n+ int (*op_handler)(struct CcwDataStream *cds, void *buff, int len,\n+ CcwDataStreamOp op);\n+ hwaddr cda;\n+} CcwDataStream;\n+\n typedef struct SubchDev SubchDev;\n struct SubchDev {\n /* channel-subsystem related things: */\n@@ -92,6 +115,7 @@ struct SubchDev {\n uint8_t ccw_no_data_cnt;\n uint16_t migrated_schid; /* used for missmatch detection */\n ORB orb;\n+ CcwDataStream cds;\n /* transport-provided data: */\n int (*ccw_cb) (SubchDev *, CCW1);\n void (*disable_cb)(SubchDev *);\n@@ -240,4 +264,47 @@ SubchDev *css_create_sch(CssDevId bus_id, bool is_virtual, bool squash_mcss,\n /** Turn on css migration */\n void css_register_vmstate(void);\n \n+\n+void ccw_dstream_init(CcwDataStream *cds, CCW1 const *ccw, ORB const *orb);\n+\n+static inline void ccw_dstream_rewind(CcwDataStream *cds)\n+{\n+ cds->at_byte = 0;\n+ cds->at_idaw = 0;\n+ cds->cda = cds->cda_orig;\n+}\n+\n+static inline bool ccw_dstream_good(CcwDataStream *cds)\n+{\n+ return !(cds->flags & CDS_F_STREAM_BROKEN);\n+}\n+\n+static inline uint16_t ccw_dstream_residual_count(CcwDataStream *cds)\n+{\n+ return cds->count - cds->at_byte;\n+}\n+\n+static inline uint16_t ccw_dstream_avail(CcwDataStream *cds)\n+{\n+ return ccw_dstream_good(cds) ? ccw_dstream_residual_count(cds) : 0;\n+}\n+\n+static inline int ccw_dstream_advance(CcwDataStream *cds, int len)\n+{\n+ return cds->op_handler(cds, NULL, len, CDS_OP_A);\n+}\n+\n+static inline int ccw_dstream_write_buf(CcwDataStream *cds, void *buff, int len)\n+{\n+ return cds->op_handler(cds, buff, len, CDS_OP_W);\n+}\n+\n+static inline int ccw_dstream_read_buf(CcwDataStream *cds, void *buff, int len)\n+{\n+ return cds->op_handler(cds, buff, len, CDS_OP_R);\n+}\n+\n+#define ccw_dstream_read(cds, v) ccw_dstream_read_buf((cds), &(v), sizeof(v))\n+#define ccw_dstream_write(cds, v) ccw_dstream_write_buf((cds), &(v), sizeof(v))\n+\n #endif\n", "prefixes": [ "v2", "1/4" ] }