Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/813266/?format=api
{ "id": 813266, "url": "http://patchwork.ozlabs.org/api/patches/813266/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1505295574-14294-1-git-send-email-lukma@denx.de/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1505295574-14294-1-git-send-email-lukma@denx.de>", "list_archive_url": null, "date": "2017-09-13T09:39:34", "name": "[U-Boot] sf: bar: Clean BA24 Bank Address Register bit after read/write/erase operation", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "72f4ab91690ab8fbc0275e95cd61304a20a94c4d", "submitter": { "id": 70701, "url": "http://patchwork.ozlabs.org/api/people/70701/?format=api", "name": "Lukasz Majewski", "email": "lukma@denx.de" }, "delegate": { "id": 17739, "url": "http://patchwork.ozlabs.org/api/users/17739/?format=api", "username": "jagan", "first_name": "Jagannadha Sutradharudu", "last_name": "Teki", "email": "jagannadh.teki@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1505295574-14294-1-git-send-email-lukma@denx.de/mbox/", "series": [ { "id": 2855, "url": "http://patchwork.ozlabs.org/api/series/2855/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=2855", "date": "2017-09-13T09:39:34", "name": "[U-Boot] sf: bar: Clean BA24 Bank Address Register bit after read/write/erase operation", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/2855/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/813266/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/813266/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xsc8Q08YRz9rxj\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 13 Sep 2017 19:40:04 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 7799DC221D3; Wed, 13 Sep 2017 09:40:00 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 2014CC21D92;\n\tWed, 13 Sep 2017 09:39:58 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 6827BC21D92; Wed, 13 Sep 2017 09:39:56 +0000 (UTC)", "from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10])\n\tby lists.denx.de (Postfix) with ESMTPS id 16836C21D19\n\tfor <u-boot@lists.denx.de>; Wed, 13 Sep 2017 09:39:56 +0000 (UTC)", "from frontend03.mail.m-online.net (unknown [192.168.6.182])\n\tby mail-out.m-online.net (Postfix) with ESMTP id 3xsc8C1Zvxz1qsWH;\n\tWed, 13 Sep 2017 11:39:55 +0200 (CEST)", "from localhost (dynscan3.mnet-online.de [192.168.6.84])\n\tby mail.m-online.net (Postfix) with ESMTP id 3xsc8C1DTpz1qqkS;\n\tWed, 13 Sep 2017 11:39:55 +0200 (CEST)", "from mail.mnet-online.de ([192.168.8.182])\n\tby localhost (dynscan3.mail.m-online.net [192.168.6.84]) (amavisd-new,\n\tport 10024)\n\twith ESMTP id xERUJ1r3n1cg; Wed, 13 Sep 2017 11:39:54 +0200 (CEST)", "from localhost.localdomain (89-64-27-66.dynamic.chello.pl\n\t[89.64.27.66])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mail.mnet-online.de (Postfix) with ESMTPSA;\n\tWed, 13 Sep 2017 11:39:54 +0200 (CEST)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.7 required=5.0 tests=RCVD_IN_DNSWL_LOW,\n\tRCVD_IN_MSPIKE_H3,\n\tRCVD_IN_MSPIKE_WL autolearn=unavailable autolearn_force=no\n\tversion=3.4.0", "X-Virus-Scanned": "amavisd-new at mnet-online.de", "X-Auth-Info": "21SX8oV53l/9AQ8X+De+LRyyXD9cAxOAFBpFo1ESGtY=", "From": "Lukasz Majewski <lukma@denx.de>", "To": "u-boot@lists.denx.de", "Date": "Wed, 13 Sep 2017 11:39:34 +0200", "Message-Id": "<1505295574-14294-1-git-send-email-lukma@denx.de>", "X-Mailer": "git-send-email 2.1.4", "Cc": "fabio.estevam@nxp.com, Jagan Teki <jagan@openedev.com>", "Subject": "[U-Boot] [PATCH] sf: bar: Clean BA24 Bank Address Register bit\n\tafter read/write/erase operation", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "The content of Bank Address Register (BAR) is volatile. It is cleared\nafter power cycle or reset command (RESET F0h).\n\nSome memories (like e.g. s25fl256s) use it to access memory larger than\n0x1000000 (16 MiB).\n\nThe problem shows up when one:\n\n1. Reads/writes/erases memory > 16 MiB\n2. Calls \"reset\" u-boot command (which is not causing BAR to be cleared)\n\nIn the above scenario, the SoC ROM sends 0x000000 address to read SPL.\nUnfortunately, the BA24 bit is still set and hence it receives content\nfrom 0x1000000 memory address.\nAs a result the SoC aborts and we hang. Only power cycle can take the\nSoC out of this state.\n\nHow to reproduce/test:\n\nsf probe; sf erase 0x1200000 0x800000; reset\nsf probe; sf erase 0x1200000 0x800000; sf write 0x11000000 0x1200000 0x800000; reset\nsf probe; sf read 0x11000000 0x1200000 0x800000; reset\n\nSigned-off-by: Lukasz Majewski <lukma@denx.de>\n---\n drivers/mtd/spi/spi_flash.c | 33 +++++++++++++++++++++++++++++++++\n 1 file changed, 33 insertions(+)", "diff": "diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c\nindex 34f6888..d19d64a 100644\n--- a/drivers/mtd/spi/spi_flash.c\n+++ b/drivers/mtd/spi/spi_flash.c\n@@ -113,6 +113,27 @@ static int write_cr(struct spi_flash *flash, u8 wc)\n #endif\n \n #ifdef CONFIG_SPI_FLASH_BAR\n+/*\n+ * This \"cleanup\" is necessary in a situation when one was accessing\n+ * spi flash memory > 16 MiB by using Bank Address Register's BA24 bit.\n+ *\n+ * After it the BA24 bit shall be cleared to allow access to correct\n+ * memory region after SW reset (by calling \"reset\" command).\n+ *\n+ * Otherwise, the BA24 bit may be left set and then after reset, the\n+ * ROM would seek for SPL from 0x1000000, not 0x0.\n+ */\n+static int cleanup_bar(struct spi_flash *flash)\n+{\n+\tu8 cmd, bank_sel = 0;\n+\n+\tif (flash->bank_curr == 0)\n+\t\treturn 0;\n+\tcmd = flash->bank_write_cmd;\n+\n+\treturn spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);\n+}\n+\n static int write_bar(struct spi_flash *flash, u32 offset)\n {\n \tu8 cmd, bank_sel;\n@@ -339,6 +360,10 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)\n \t\tlen -= erase_size;\n \t}\n \n+#ifdef CONFIG_SPI_FLASH_BAR\n+\tret = cleanup_bar(flash);\n+#endif\n+\n \treturn ret;\n }\n \n@@ -397,6 +422,10 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,\n \t\toffset += chunk_len;\n \t}\n \n+#ifdef CONFIG_SPI_FLASH_BAR\n+\tret = cleanup_bar(flash);\n+#endif\n+\n \treturn ret;\n }\n \n@@ -500,6 +529,10 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,\n \t\tdata += read_len;\n \t}\n \n+#ifdef CONFIG_SPI_FLASH_BAR\n+\tret = cleanup_bar(flash);\n+#endif\n+\n \tfree(cmd);\n \treturn ret;\n }\n", "prefixes": [ "U-Boot" ] }