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GET /api/patches/813235/?format=api
{ "id": 813235, "url": "http://patchwork.ozlabs.org/api/patches/813235/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170913090522.4022-12-Sergio.G.DelReal@gmail.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170913090522.4022-12-Sergio.G.DelReal@gmail.com>", "list_archive_url": null, "date": "2017-09-13T09:05:19", "name": "[v4,11/14] hvf: refactor cpuid code", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "026a434fc8c5c0f4d46ca17fdb0474a16a2b3576", "submitter": { "id": 70675, "url": "http://patchwork.ozlabs.org/api/people/70675/?format=api", "name": "Sergio Andres Gomez Del Real", "email": "sergio.g.delreal@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170913090522.4022-12-Sergio.G.DelReal@gmail.com/mbox/", "series": [ { "id": 2843, "url": "http://patchwork.ozlabs.org/api/series/2843/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2843", "date": "2017-09-13T09:05:08", "name": "add support for Hypervisor.framework in QEMU", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/2843/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/813235/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/813235/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"tqlvpEno\"; dkim-atps=neutral" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xsbQ715B2z9sPs\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 13 Sep 2017 19:06:55 +1000 (AEST)", "from localhost ([::1]:41059 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1ds3dF-0001er-7J\n\tfor incoming@patchwork.ozlabs.org; Wed, 13 Sep 2017 05:06:53 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:34104)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <sergio.g.delreal@gmail.com>) id 1ds3cQ-0001ZY-Oq\n\tfor qemu-devel@nongnu.org; Wed, 13 Sep 2017 05:06:08 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <sergio.g.delreal@gmail.com>) id 1ds3cP-0007Yr-8j\n\tfor qemu-devel@nongnu.org; Wed, 13 Sep 2017 05:06:02 -0400", "from mail-vk0-x242.google.com ([2607:f8b0:400c:c05::242]:34485)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.71) (envelope-from <sergio.g.delreal@gmail.com>)\n\tid 1ds3cP-0007Yd-41\n\tfor qemu-devel@nongnu.org; Wed, 13 Sep 2017 05:06:01 -0400", "by mail-vk0-x242.google.com with SMTP id v203so3321032vkv.1\n\tfor <qemu-devel@nongnu.org>; Wed, 13 Sep 2017 02:06:01 -0700 (PDT)", "from localhost.localdomain ([190.66.154.128])\n\tby smtp.gmail.com with ESMTPSA id\n\tr74sm2677601vkf.19.2017.09.13.02.05.59\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tWed, 13 Sep 2017 02:06:00 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=tQnSQKlXG0dr1lRmd2W7UQZV2rzk/tcg7A9lHegtstE=;\n\tb=tqlvpEnoqYkkWffIYTdZHVbsz4xKCGt6h/tY0YhpzyyZTgq88J7e5UABhL3W9mhP97\n\t3vAiqyMn+jRfcgBqO3M2K1/zClMeyQMt2r0PwgNWg3qiXHDzbKb84bFr8h4GW6ulA44b\n\tMM1pdjwacfsHgWBsYMEjl9hCTPtKZXfDxZ4o5FuTv2maqLrbSBftwsvByUlIsSI7MSWb\n\tZvqXMxF2dAXynsHiw1lN/p7ZkMB0DHmkMiFp2nlwfN3vSfF4VqVkHtNVjACCX1f7Zs/T\n\tU96ldvlox+anyiSoS5KLrvjNuBcbk0ZVeKvlwA68fGUctlSkC6pY3BcCR3l1te04r5ZM\n\tWFAg==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=tQnSQKlXG0dr1lRmd2W7UQZV2rzk/tcg7A9lHegtstE=;\n\tb=IXSjKLsMRov1WxgS8bF+xwlwnZkKAS9xpLwPtV0Vrj+vNgFQXScVbdBcbn5fXhZTu2\n\tjRixmNqMCZMrUAWqP0BZLaZd1WBUH87A+vt0NMl6t1OP74Xq11uje3SDUOkoINuvSNU/\n\tqfs+90O9+U1PvFwVRpBrcAm2ijsFsdh1QOhavaNeM2y01uk7XMmMjw/uzhZ+JZDTzJ8o\n\tfyc89UlnTsFr6saaLJqefx2quwvS6qydhNR/xGGm5tZD/ob+J8PTpJnstXUJUxw3fW3u\n\tRZ8Vs9nDnYuOo/VX3yKDdRz3R+Tu4zYZh6itmpVKrAv7ppmW1xIt/AcxINWxWDA+kI0/\n\tQSIw==", "X-Gm-Message-State": "AHPjjUgIcEPQmMn8JRggIYLpFYnpVt6K/a10yrm9XwqQYr7U3agUMXi0\n\tuDitm6O8/nZoEe8a", "X-Google-Smtp-Source": "AOwi7QAVwt1J9IH7Q9AVBQcIYgvfZ06XuFZBIM7W5cLHBCcSbXiT5aY8Z88eVSXQX8R5QNQAFmqxqQ==", "X-Received": "by 10.31.14.138 with SMTP id 132mr12615473vko.67.1505293560411; \n\tWed, 13 Sep 2017 02:06:00 -0700 (PDT)", "From": "Sergio Andres Gomez Del Real <sergio.g.delreal@gmail.com>", "X-Google-Original-From": "Sergio Andres Gomez Del Real\n\t<Sergio.G.DelReal@gmail.com>", "To": "qemu-devel@nongnu.org", "Date": "Wed, 13 Sep 2017 04:05:19 -0500", "Message-Id": "<20170913090522.4022-12-Sergio.G.DelReal@gmail.com>", "X-Mailer": "git-send-email 2.11.0", "In-Reply-To": "<20170913090522.4022-1-Sergio.G.DelReal@gmail.com>", "References": "<20170913090522.4022-1-Sergio.G.DelReal@gmail.com>", "X-detected-operating-system": "by eggs.gnu.org: Genre and OS details not\n\trecognized.", "X-Received-From": "2607:f8b0:400c:c05::242", "Subject": "[Qemu-devel] [PATCH v4 11/14] hvf: refactor cpuid code", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "Sergio Andres Gomez Del Real <Sergio.G.DelReal@gmail.com>,\n\tpbonzini@redhat.com, stefanha@gmail.com", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "This patch generalizes some code in cpu.c, sharing code and data between\nhvf and kvm. It also begins calling the new hvf_get_supported_cpuid\nwhere appropriate.\n\nSigned-off-by: Sergio Andres Gomez Del Real <Sergio.G.DelReal@gmail.com>\n---\n target/i386/cpu-qom.h | 4 +--\n target/i386/cpu.c | 77 ++++++++++++++++++++++++++++++++++++++-------------\n 2 files changed, 59 insertions(+), 22 deletions(-)", "diff": "diff --git a/target/i386/cpu-qom.h b/target/i386/cpu-qom.h\nindex c2205e6077..22f95eb3a4 100644\n--- a/target/i386/cpu-qom.h\n+++ b/target/i386/cpu-qom.h\n@@ -47,7 +47,7 @@ typedef struct X86CPUDefinition X86CPUDefinition;\n /**\n * X86CPUClass:\n * @cpu_def: CPU model definition\n- * @kvm_required: Whether CPU model requires KVM to be enabled.\n+ * @host_cpuid_required: Whether CPU model requires cpuid from host.\n * @ordering: Ordering on the \"-cpu help\" CPU model list.\n * @migration_safe: See CpuDefinitionInfo::migration_safe\n * @static_model: See CpuDefinitionInfo::static\n@@ -66,7 +66,7 @@ typedef struct X86CPUClass {\n */\n X86CPUDefinition *cpu_def;\n \n- bool kvm_required;\n+ bool host_cpuid_required;\n int ordering;\n bool migration_safe;\n bool static_model;\ndiff --git a/target/i386/cpu.c b/target/i386/cpu.c\nindex ddc45abd70..2bf8c0ce0f 100644\n--- a/target/i386/cpu.c\n+++ b/target/i386/cpu.c\n@@ -22,6 +22,7 @@\n #include \"cpu.h\"\n #include \"exec/exec-all.h\"\n #include \"sysemu/kvm.h\"\n+#include \"sysemu/hvf.h\"\n #include \"sysemu/cpus.h\"\n #include \"kvm_i386.h\"\n \n@@ -613,6 +614,11 @@ static uint32_t xsave_area_size(uint64_t mask)\n return ret;\n }\n \n+static inline bool accel_uses_host_cpuid(void)\n+{\n+ return kvm_enabled() || hvf_enabled();\n+}\n+\n static inline uint64_t x86_cpu_xsave_components(X86CPU *cpu)\n {\n return ((uint64_t)cpu->env.features[FEAT_XSAVE_COMP_HI]) << 32 |\n@@ -1643,10 +1649,15 @@ static void max_x86_cpu_initfn(Object *obj)\n */\n cpu->max_features = true;\n \n- if (kvm_enabled()) {\n+ if (accel_uses_host_cpuid()) {\n char vendor[CPUID_VENDOR_SZ + 1] = { 0 };\n char model_id[CPUID_MODEL_ID_SZ + 1] = { 0 };\n int family, model, stepping;\n+ X86CPUDefinition host_cpudef = { };\n+ uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;\n+\n+ host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);\n+ x86_cpu_vendor_words2str(host_cpudef.vendor, ebx, edx, ecx);\n \n host_vendor_fms(vendor, &family, &model, &stepping);\n \n@@ -1660,12 +1671,21 @@ static void max_x86_cpu_initfn(Object *obj)\n object_property_set_str(OBJECT(cpu), model_id, \"model-id\",\n &error_abort);\n \n- env->cpuid_min_level =\n- kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX);\n- env->cpuid_min_xlevel =\n- kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX);\n- env->cpuid_min_xlevel2 =\n- kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX);\n+ if (kvm_enabled()) {\n+ env->cpuid_min_level =\n+ kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX);\n+ env->cpuid_min_xlevel =\n+ kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX);\n+ env->cpuid_min_xlevel2 =\n+ kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX);\n+ } else {\n+ env->cpuid_min_level =\n+ hvf_get_supported_cpuid(0x0, 0, R_EAX);\n+ env->cpuid_min_xlevel =\n+ hvf_get_supported_cpuid(0x80000000, 0, R_EAX);\n+ env->cpuid_min_xlevel2 =\n+ hvf_get_supported_cpuid(0xC0000000, 0, R_EAX);\n+ }\n \n if (lmce_supported()) {\n object_property_set_bool(OBJECT(cpu), true, \"lmce\", &error_abort);\n@@ -1691,18 +1711,21 @@ static const TypeInfo max_x86_cpu_type_info = {\n .class_init = max_x86_cpu_class_init,\n };\n \n-#ifdef CONFIG_KVM\n-\n+#if defined(CONFIG_KVM) || defined(CONFIG_HVF)\n static void host_x86_cpu_class_init(ObjectClass *oc, void *data)\n {\n X86CPUClass *xcc = X86_CPU_CLASS(oc);\n \n- xcc->kvm_required = true;\n+ xcc->host_cpuid_required = true;\n xcc->ordering = 8;\n \n- xcc->model_description =\n- \"KVM processor with all supported host features \"\n- \"(only available in KVM mode)\";\n+ if (kvm_enabled()) {\n+ xcc->model_description =\n+ \"KVM processor with all supported host features \";\n+ } else if (hvf_enabled()) {\n+ xcc->model_description =\n+ \"HVF processor with all supported host features \";\n+ }\n }\n \n static const TypeInfo host_x86_cpu_type_info = {\n@@ -1724,7 +1747,7 @@ static void report_unavailable_features(FeatureWord w, uint32_t mask)\n assert(reg);\n fprintf(stderr, \"warning: %s doesn't support requested feature: \"\n \"CPUID.%02XH:%s%s%s [bit %d]\\n\",\n- kvm_enabled() ? \"host\" : \"TCG\",\n+ accel_uses_host_cpuid() ? \"host\" : \"TCG\",\n f->cpuid_eax, reg,\n f->feat_names[i] ? \".\" : \"\",\n f->feat_names[i] ? f->feat_names[i] : \"\", i);\n@@ -2175,7 +2198,7 @@ static void x86_cpu_class_check_missing_features(X86CPUClass *xcc,\n Error *err = NULL;\n strList **next = missing_feats;\n \n- if (xcc->kvm_required && !kvm_enabled()) {\n+ if (xcc->host_cpuid_required && !accel_uses_host_cpuid()) {\n strList *new = g_new0(strList, 1);\n new->value = g_strdup(\"kvm\");;\n *missing_feats = new;\n@@ -2337,6 +2360,10 @@ static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w,\n r = kvm_arch_get_supported_cpuid(kvm_state, wi->cpuid_eax,\n wi->cpuid_ecx,\n wi->cpuid_reg);\n+ } else if (hvf_enabled()) {\n+ r = hvf_get_supported_cpuid(wi->cpuid_eax,\n+ wi->cpuid_ecx,\n+ wi->cpuid_reg);\n } else if (tcg_enabled()) {\n r = wi->tcg_features;\n } else {\n@@ -2396,6 +2423,7 @@ static void x86_cpu_load_def(X86CPU *cpu, X86CPUDefinition *def, Error **errp)\n }\n \n /* Special cases not set in the X86CPUDefinition structs: */\n+ /* TODO: in-kernel irqchip for hvf */\n if (kvm_enabled()) {\n if (!kvm_irqchip_in_kernel()) {\n x86_cpu_change_kvm_default(\"x2apic\", \"off\");\n@@ -2416,7 +2444,7 @@ static void x86_cpu_load_def(X86CPU *cpu, X86CPUDefinition *def, Error **errp)\n * when doing cross vendor migration\n */\n vendor = def->vendor;\n- if (kvm_enabled()) {\n+ if (accel_uses_host_cpuid()) {\n uint32_t ebx = 0, ecx = 0, edx = 0;\n host_cpuid(0, 0, NULL, &ebx, &ecx, &edx);\n x86_cpu_vendor_words2str(host_vendor, ebx, edx, ecx);\n@@ -2872,6 +2900,11 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,\n *ebx = kvm_arch_get_supported_cpuid(s, 0xA, count, R_EBX);\n *ecx = kvm_arch_get_supported_cpuid(s, 0xA, count, R_ECX);\n *edx = kvm_arch_get_supported_cpuid(s, 0xA, count, R_EDX);\n+ } else if (hvf_enabled() && cpu->enable_pmu) {\n+ *eax = hvf_get_supported_cpuid(0xA, count, R_EAX);\n+ *ebx = hvf_get_supported_cpuid(0xA, count, R_EBX);\n+ *ecx = hvf_get_supported_cpuid(0xA, count, R_ECX);\n+ *edx = hvf_get_supported_cpuid(0xA, count, R_EDX);\n } else {\n *eax = 0;\n *ebx = 0;\n@@ -3223,6 +3256,9 @@ static void x86_cpu_reset(CPUState *s)\n if (kvm_enabled()) {\n kvm_arch_reset_vcpu(cpu);\n }\n+ else if (hvf_enabled()) {\n+ hvf_reset_vcpu(s);\n+ }\n #endif\n }\n \n@@ -3262,6 +3298,7 @@ APICCommonClass *apic_get_class(void)\n {\n const char *apic_type = \"apic\";\n \n+ /* TODO: in-kernel irqchip for hvf */\n if (kvm_apic_in_kernel()) {\n apic_type = \"kvm-apic\";\n } else if (xen_enabled()) {\n@@ -3575,7 +3612,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)\n Error *local_err = NULL;\n static bool ht_warned;\n \n- if (xcc->kvm_required && !kvm_enabled()) {\n+ if (xcc->host_cpuid_required && !accel_uses_host_cpuid()) {\n char *name = x86_cpu_class_get_model_name(xcc);\n error_setg(&local_err, \"CPU model '%s' requires KVM\", name);\n g_free(name);\n@@ -3597,7 +3634,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)\n x86_cpu_report_filtered_features(cpu);\n if (cpu->enforce_cpuid) {\n error_setg(&local_err,\n- kvm_enabled() ?\n+ accel_uses_host_cpuid() ?\n \"Host doesn't support requested features\" :\n \"TCG doesn't support requested features\");\n goto out;\n@@ -3620,7 +3657,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)\n * consumer AMD devices but nothing else.\n */\n if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) {\n- if (kvm_enabled()) {\n+ if (accel_uses_host_cpuid()) {\n uint32_t host_phys_bits = x86_host_phys_bits();\n static bool warned;\n \n@@ -4207,7 +4244,7 @@ static void x86_cpu_register_types(void)\n }\n type_register_static(&max_x86_cpu_type_info);\n type_register_static(&x86_base_cpu_type_info);\n-#ifdef CONFIG_KVM\n+#if defined(CONFIG_KVM) || defined(CONFIG_HVF)\n type_register_static(&host_x86_cpu_type_info);\n #endif\n }\n", "prefixes": [ "v4", "11/14" ] }