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GET /api/patches/813227/?format=api
{ "id": 813227, "url": "http://patchwork.ozlabs.org/api/patches/813227/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1505292990-22957-3-git-send-email-yamada.masahiro@socionext.com/", "project": { "id": 37, "url": "http://patchwork.ozlabs.org/api/projects/37/?format=api", "name": "Devicetree Bindings", "link_name": "devicetree-bindings", "list_id": "devicetree.vger.kernel.org", "list_email": "devicetree@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1505292990-22957-3-git-send-email-yamada.masahiro@socionext.com>", "list_archive_url": null, "date": "2017-09-13T08:56:29", "name": "[v5,2/3] dt-bindings: gpio: uniphier: add UniPhier GPIO binding", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": true, "hash": "866176ab3a5a10e56be8963a80d204ab21b3fa0e", "submitter": { "id": 65882, "url": "http://patchwork.ozlabs.org/api/people/65882/?format=api", "name": "Masahiro Yamada", "email": "yamada.masahiro@socionext.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1505292990-22957-3-git-send-email-yamada.masahiro@socionext.com/mbox/", "series": [ { "id": 2841, "url": "http://patchwork.ozlabs.org/api/series/2841/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=2841", "date": "2017-09-13T08:56:29", "name": "gpio: uniphier: UniPhier GPIO driver", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/2841/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/813227/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/813227/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<devicetree-owner@vger.kernel.org>", "X-Original-To": "incoming-dt@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-dt@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=nifty.com header.i=@nifty.com\n\theader.b=\"W8vj1DGI\"; dkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xsbDP4f9Xz9sPk\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tWed, 13 Sep 2017 18:58:29 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751738AbdIMI61 (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tWed, 13 Sep 2017 04:58:27 -0400", "from conuserg-09.nifty.com ([210.131.2.76]:64446 \"EHLO\n\tconuserg-09.nifty.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751545AbdIMI60 (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Wed, 13 Sep 2017 04:58:26 -0400", "from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp\n\t[153.142.97.92]) (authenticated)\n\tby conuserg-09.nifty.com with ESMTP id v8D8ugqk027391;\n\tWed, 13 Sep 2017 17:56:45 +0900" ], "DKIM-Filter": "OpenDKIM Filter v2.10.3 conuserg-09.nifty.com v8D8ugqk027391", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com;\n\ts=dec2015msa; t=1505293006;\n\tbh=uqRbxwC4hXNT6RP9MedPBl4zsX5Man5LRcidVTDUkKQ=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=W8vj1DGIEcYVS2BuGp4TJJYt0QkthUe+pO6aJX4zdnvzRcYus+WlB7+N4+axgWxC6\n\tCiQhC3b4xbk12E7bHbDY8t6veV8rAjoMxcqEXrNWMDdfTaXwDDyef7v8os7j/8Nvke\n\tm9dAex2YpAiB8w8wiuOjj7j5931K+smLbc8iYllVEs44AOkJ5Liwjn0Lxz8klJd2aX\n\t2PrYRV2AJX74jshmE0J3yJJC72MESjxstFGSB6L5Io5e+zaxt1jg7BQZ6ziHUGVyjQ\n\t7qMu+T2kCgPlqEnM8/qbmn4AlOZEekZZV0WtCvTBvaq5bf5xDfhLgTD66332cGf4aO\n\tOpEmRcsztkAog==", "X-Nifty-SrcIP": "[153.142.97.92]", "From": "Masahiro Yamada <yamada.masahiro@socionext.com>", "To": "Marc Zyngier <marc.zyngier@arm.com>, linux-gpio@vger.kernel.org", "Cc": "Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>,\n\tRob Herring <robh@kernel.org>, Linus Walleij <linus.walleij@linaro.org>, \n\tDavid Daney <david.daney@cavium.com>,\n\tMasami Hiramatsu <mhiramat@kernel.org>,\n\tJassi Brar <jaswinder.singh@linaro.org>,\n\tMasahiro Yamada <yamada.masahiro@socionext.com>,\n\tdevicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tRob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,\n\tlinux-arm-kernel@lists.infradead.org", "Subject": "[PATCH v5 2/3] dt-bindings: gpio: uniphier: add UniPhier GPIO\n\tbinding", "Date": "Wed, 13 Sep 2017 17:56:29 +0900", "Message-Id": "<1505292990-22957-3-git-send-email-yamada.masahiro@socionext.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1505292990-22957-1-git-send-email-yamada.masahiro@socionext.com>", "References": "<1505292990-22957-1-git-send-email-yamada.masahiro@socionext.com>", "Sender": "devicetree-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<devicetree.vger.kernel.org>", "X-Mailing-List": "devicetree@vger.kernel.org" }, "content": "This GPIO controller is used on UniPhier SoC family.\n\nSigned-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>\nAcked-by: Rob Herring <robh@kernel.org>\n---\n\n\n .../devicetree/bindings/gpio/gpio-uniphier.txt | 43 ++++++++++++++++++++++\n 1 file changed, 43 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/gpio/gpio-uniphier.txt", "diff": "diff --git a/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt b/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt\nnew file mode 100644\nindex 0000000..0a371bdd\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt\n@@ -0,0 +1,43 @@\n+UniPhier GPIO controller\n+\n+Required properties:\n+- compatible: Should be \"socionext,uniphier-gpio\".\n+- reg: Specifies offset and length of the register set for the device.\n+- gpio-controller: Marks the device node as a GPIO controller.\n+- #gpio-cells: Should be 2. The first cell is the pin number and the second\n+ cell is used to specify optional parameters.\n+- interrupt-parent: Specifies the parent interrupt controller.\n+- interrupts: Specifies interrupts connected to the parent interrupt controller.\n+- interrupt-controller: Marks the device node as an interrupt controller.\n+- #interrupt-cells: Should be 2. The first cell defines the interrupt number.\n+ The second cell bits[3:0] is used to specify trigger type as follows:\n+ 1 = low-to-high edge triggered\n+ 2 = high-to-low edge triggered\n+ 4 = active high level-sensitive\n+ 8 = active low level-sensitive\n+ Valid combinations are 1, 2, 3, 4, 8.\n+- ngpios: Specifies the number of GPIO lines.\n+- gpio-ranges: Mapping to pin controller pins (as described in gpio.txt)\n+\n+Optional properties:\n+- gpio-ranges-group-names: Used for named gpio ranges (as described in gpio.txt)\n+\n+Example:\n+\tgpio: gpio@55000000 {\n+\t\tcompatible = \"socionext,uniphier-gpio\";\n+\t\treg = <0x55000000 0x200>;\n+\t\tinterrupt-parent = <&aidet>;\n+\t\tinterrupts = <48 0>, <49 0>, <50 0>, <51 0>,\n+\t\t\t <52 0>, <53 0>, <54 0>, <55 0>,\n+\t\t\t <56 0>, <57 0>, <58 0>, <59 0>,\n+\t\t\t <60 0>, <61 0>, <62 0>, <63 0>,\n+\t\t\t <154 0>, <155 0>, <156 0>, <157 0>,\n+\t\t\t <158 0>;\n+\t\tinterrupt-controller;\n+\t\t#interrupt-cells = <2>;\n+\t\tgpio-controller;\n+\t\t#gpio-cells = <2>;\n+\t\tgpio-ranges = <&pinctrl 0 0 0>;\n+\t\tgpio-ranges-group-names = \"gpio_range\";\n+\t\tngpios = <248>;\n+\t};\n", "prefixes": [ "v5", "2/3" ] }