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GET /api/patches/813111/?format=api
{ "id": 813111, "url": "http://patchwork.ozlabs.org/api/patches/813111/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/150525543616.15988.18238686972036900217.stgit@frigg.lan/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<150525543616.15988.18238686972036900217.stgit@frigg.lan>", "list_archive_url": null, "date": "2017-09-12T22:30:36", "name": "[v5,22/22] instrument: Add API to manipulate guest memory", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d7827e7ecdac6012c276bf5fcfe8d5f59a6a3a5a", "submitter": { "id": 9099, "url": "http://patchwork.ozlabs.org/api/people/9099/?format=api", "name": "Lluís Vilanova", "email": "vilanova@ac.upc.edu" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/150525543616.15988.18238686972036900217.stgit@frigg.lan/mbox/", "series": [ { "id": 2775, "url": "http://patchwork.ozlabs.org/api/series/2775/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2775", "date": "2017-09-12T21:01:42", "name": "instrument: Add basic event instrumentation", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/2775/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/813111/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/813111/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xsKKY5Q5mz9t39\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 13 Sep 2017 08:32:01 +1000 (AEST)", "from localhost ([::1]:39008 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1drtip-0006iP-TV\n\tfor incoming@patchwork.ozlabs.org; Tue, 12 Sep 2017 18:31:59 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:55050)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <vilanova@ac.upc.edu>) id 1drthj-0006De-8M\n\tfor qemu-devel@nongnu.org; Tue, 12 Sep 2017 18:30:52 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <vilanova@ac.upc.edu>) id 1drthf-0000K8-MB\n\tfor qemu-devel@nongnu.org; Tue, 12 Sep 2017 18:30:51 -0400", "from roura.ac.upc.es ([147.83.33.10]:48475)\n\tby eggs.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <vilanova@ac.upc.edu>) id 1drthe-0000Jf-Uz\n\tfor qemu-devel@nongnu.org; Tue, 12 Sep 2017 18:30:47 -0400", "from correu-2.ac.upc.es (correu-2.ac.upc.es [147.83.30.92])\n\tby roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v8CMUhDL023867;\n\tWed, 13 Sep 2017 00:30:43 +0200", "from localhost (unknown [31.210.187.58])\n\tby correu-2.ac.upc.es (Postfix) with ESMTPSA id 1AEEB44C;\n\tWed, 13 Sep 2017 00:30:37 +0200 (CEST)" ], "From": "=?utf-8?b?TGx1w61z?= Vilanova <vilanova@ac.upc.edu>", "To": "qemu-devel@nongnu.org", "Date": "Wed, 13 Sep 2017 01:30:36 +0300", "Message-Id": "<150525543616.15988.18238686972036900217.stgit@frigg.lan>", "X-Mailer": "git-send-email 2.14.1", "In-Reply-To": "<150525010239.15988.8172586618197849619.stgit@frigg.lan>", "References": "<150525010239.15988.8172586618197849619.stgit@frigg.lan>", "User-Agent": "StGit/0.18", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "quoted-printable", "X-MIME-Autoconverted": "from 8bit to quoted-printable by roura.ac.upc.es id\n\tv8CMUhDL023867", "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy]", "X-Received-From": "147.83.33.10", "Subject": "[Qemu-devel] [PATCH v5 22/22] instrument: Add API to manipulate\n\tguest memory", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "\"Emilio G. Cota\" <cota@braap.org>, Markus Armbruster <armbru@redhat.com>,\n\tStefan Hajnoczi <stefanha@redhat.com>, =?utf-8?q?Llu=C3=ADs_Vilanova?=\n\t<vilanova@ac.upc.edu>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "It includes access to the guest's memory and vCPU registers.\n\nSigned-off-by: Lluís Vilanova <vilanova@ac.upc.edu>\n---\n instrument/Makefile.objs | 1 \n instrument/qemu-instr/state.h | 104 +++++++++++++++++++++++++++++++++++++++++\n instrument/state.c | 73 +++++++++++++++++++++++++++++\n 3 files changed, 178 insertions(+)\n create mode 100644 instrument/qemu-instr/state.h\n create mode 100644 instrument/state.c", "diff": "diff --git a/instrument/Makefile.objs b/instrument/Makefile.objs\nindex d7e6c760c3..ee482bdb45 100644\n--- a/instrument/Makefile.objs\n+++ b/instrument/Makefile.objs\n@@ -5,3 +5,4 @@ target-obj-$(CONFIG_INSTRUMENT) += load.o\n target-obj-$(CONFIG_INSTRUMENT) += qmp.o\n target-obj-$(CONFIG_INSTRUMENT) += control.o\n target-obj-$(CONFIG_INSTRUMENT) += trace.o\n+target-obj-$(CONFIG_INSTRUMENT) += state.o\ndiff --git a/instrument/qemu-instr/state.h b/instrument/qemu-instr/state.h\nnew file mode 100644\nindex 0000000000..0ae6255fe5\n--- /dev/null\n+++ b/instrument/qemu-instr/state.h\n@@ -0,0 +1,104 @@\n+/*\n+ * Interface for accessing guest state.\n+ *\n+ * Copyright (C) 2012-2017 Lluís Vilanova <vilanova@ac.upc.edu>\n+ *\n+ * This work is licensed under the terms of the GNU GPL, version 2 or later.\n+ * See the COPYING file in the top-level directory.\n+ */\n+\n+#ifndef QI__STATE_H\n+#define QI__STATE_H\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+#include <qemu-instr/types.h>\n+\n+\n+/**\n+ * qi_mem_read_virt:\n+ * @vcpu: CPU to use for address translation.\n+ * @vaddr: Starting virtual address to read from.\n+ * @size: Number of bytes to read.\n+ * @buf: Buffer to write into.\n+ *\n+ * Read contents from virtual memory.\n+ *\n+ * Returns: Whether the range of virtual addresses to read could be translated.\n+ *\n+ * Warning: Even on error, some of the destination buffer might have been\n+ * modified.\n+ *\n+ * Precondition: The output buffer has at least \"size\" bytes.\n+ */\n+bool qi_mem_read_virt(QICPU vcpu, uint64_t vaddr, size_t size, void *buf);\n+\n+/**\n+ * qi_mem_write_virt:\n+ * @vcpu: CPU to use for address translation.\n+ * @vaddr: Starting virtual address to write into.\n+ * @size: Number of bytes to write.\n+ * @buf: Buffer with the contents to write from.\n+ *\n+ * Write contents into virtual memory.\n+ *\n+ * Returns: Whether the range of virtual addresses to write could be translated.\n+ *\n+ * Warning: Even on error, some of the destination memory might have been\n+ * modified.\n+ * Precondition: The input buffer has at least \"size\" bytes.\n+ */\n+bool qi_mem_write_virt(QICPU vcpu, uint64_t vaddr, size_t size, void *buf);\n+\n+/**\n+ * qi_mem_virt_to_phys:\n+ * @vcpu: CPU to use for address translation.\n+ * @vaddr: Virtual address to translate.\n+ * @paddr: Pointer to output physical address.\n+ *\n+ * Translate a virtual address into a physical address.\n+ *\n+ * Returns: Whether the address could be translated.\n+ */\n+bool qi_mem_virt_to_phys(QICPU vcpu, uint64_t vaddr, uint64_t *paddr);\n+\n+/**\n+ * qi_mem_read_phys:\n+ * @paddr: Starting physical address to read from.\n+ * @size: Number of bytes to read.\n+ * @buf: Buffer to write into.\n+ *\n+ * Read contents from physical memory.\n+ *\n+ * Returns: Whether the range of physical addresses is valid.\n+ *\n+ * Warning: Even on error, some of the destination buffer might have been\n+ * modified.\n+ * Precondition: The output buffer has at least \"size\" bytes.\n+ */\n+bool qi_mem_read_phys(uint64_t paddr, size_t size, void *buf);\n+\n+/**\n+ * qi_mem_write_phys:\n+ * @paddr: Starting physical address to write into.\n+ * @size: Number of bytes to write.\n+ * @buf: Buffer with the contents to write from.\n+ *\n+ * Write contents into virtual memory.\n+ *\n+ * Returns: Whether the range of physical addresses is valid.\n+ *\n+ * Warning: Even on error, some of the destination memory might have been\n+ * modified.\n+ *\n+ * Precondition: The input buffer has at least \"size\" bytes.\n+ */\n+bool qi_mem_write_phys(uint64_t paddr, size_t size, void *buf);\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif /* QI__STATE_H */\ndiff --git a/instrument/state.c b/instrument/state.c\nnew file mode 100644\nindex 0000000000..e76fd5fbcd\n--- /dev/null\n+++ b/instrument/state.c\n@@ -0,0 +1,73 @@\n+/*\n+ * Interface for accessing guest state.\n+ *\n+ * Copyright (C) 2012-2017 Lluís Vilanova <vilanova@ac.upc.edu>\n+ *\n+ * This work is licensed under the terms of the GNU GPL, version 2 or later.\n+ * See the COPYING file in the top-level directory.\n+ */\n+\n+#include \"qemu/osdep.h\"\n+\n+#include \"qemu/compiler.h\"\n+#include \"cpu.h\"\n+#include \"exec/cpu-all.h\"\n+#include \"instrument/control.h\"\n+#include \"instrument/error.h\"\n+#include \"instrument/qemu-instr/state.h\"\n+\n+\n+SYM_PUBLIC bool qi_mem_read_virt(QICPU vcpu, uint64_t vaddr,\n+ size_t size, void *buf)\n+{\n+ CPUState *vcpu_ = instr_cpu_from_qicpu(vcpu);\n+ ERROR_IF_RET(!instr_get_state(), false, \"called outside instrumentation\");\n+ ERROR_IF_RET(!vcpu_, false, \"invalid QICPU\");\n+ return cpu_memory_rw_debug(vcpu_, vaddr, buf, size, 0) == 0;\n+}\n+\n+SYM_PUBLIC bool qi_mem_write_virt(QICPU vcpu, uint64_t vaddr,\n+ size_t size, void *buf)\n+{\n+ CPUState *vcpu_ = instr_cpu_from_qicpu(vcpu);\n+ ERROR_IF_RET(!instr_get_state(), false, \"called outside instrumentation\");\n+ ERROR_IF_RET(!vcpu_, false, \"invalid QICPU\");\n+ return cpu_memory_rw_debug(vcpu_, vaddr, buf, size, 1) == 0;\n+}\n+\n+SYM_PUBLIC bool qi_mem_virt_to_phys(QICPU vcpu, uint64_t vaddr, uint64_t *paddr)\n+{\n+ CPUState *vcpu_ = instr_cpu_from_qicpu(vcpu);\n+ ERROR_IF_RET(!instr_get_state(), false, \"called outside instrumentation\");\n+ ERROR_IF_RET(!vcpu_, false, \"invalid QICPU\");\n+\n+#if defined(CONFIG_USER_ONLY)\n+ *paddr = vaddr;\n+ return true;\n+#else\n+ *paddr = cpu_get_phys_page_debug(vcpu_, vaddr);\n+ return *paddr != -1;\n+#endif\n+}\n+\n+SYM_PUBLIC bool qi_mem_read_phys(uint64_t paddr, size_t size, void *buf)\n+{\n+ ERROR_IF_RET(!instr_get_state(), false, \"called outside instrumentation\");\n+#if defined(CONFIG_USER_ONLY)\n+ return cpu_memory_rw_debug(NULL, paddr, buf, size, 0) == 0;\n+#else\n+ cpu_physical_memory_read(paddr, buf, size);\n+ return true;\n+#endif\n+}\n+\n+SYM_PUBLIC bool qi_mem_write_phys(uint64_t paddr, size_t size, void *buf)\n+{\n+ ERROR_IF_RET(!instr_get_state(), false, \"called outside instrumentation\");\n+#if defined(CONFIG_USER_ONLY)\n+ return cpu_memory_rw_debug(NULL, paddr, buf, size, 1) == 0;\n+#else\n+ cpu_physical_memory_write(paddr, buf, size);\n+ return true;\n+#endif\n+}\n", "prefixes": [ "v5", "22/22" ] }