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GET /api/patches/813099/?format=api
{ "id": 813099, "url": "http://patchwork.ozlabs.org/api/patches/813099/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/25045c72-e951-cc32-38d6-84ab36e8a117@linux.vnet.ibm.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<25045c72-e951-cc32-38d6-84ab36e8a117@linux.vnet.ibm.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/25045c72-e951-cc32-38d6-84ab36e8a117@linux.vnet.ibm.com/", "date": "2017-09-12T21:49:46", "name": "powerpc/kernel: Add 'ibm,thread-groups' property for CPU allocation", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "69f1ae3aa12037b8748be0cb6416013f2ac17183", "submitter": { "id": 65104, "url": "http://patchwork.ozlabs.org/api/people/65104/?format=api", "name": "Michael Bringmann", "email": "mwb@linux.vnet.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/25045c72-e951-cc32-38d6-84ab36e8a117@linux.vnet.ibm.com/mbox/", "series": [ { "id": 2783, "url": "http://patchwork.ozlabs.org/api/series/2783/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=2783", "date": "2017-09-12T21:49:46", "name": "powerpc/kernel: Add 'ibm,thread-groups' property for CPU allocation", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/2783/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/813099/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/813099/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xsJX933vgz9t33\n\tfor <patchwork-incoming@ozlabs.org>;\n\tWed, 13 Sep 2017 07:56:09 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xsJX92DHBzDrnb\n\tfor <patchwork-incoming@ozlabs.org>;\n\tWed, 13 Sep 2017 07:56:09 +1000 (AEST)", "from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com\n\t[148.163.158.5])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xsJNx5zFjzDrNC\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tWed, 13 Sep 2017 07:49:53 +1000 (AEST)", "from pps.filterd (m0098417.ppops.net [127.0.0.1])\n\tby mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8CLmaCw082466\n\tfor <linuxppc-dev@lists.ozlabs.org>; Tue, 12 Sep 2017 17:49:51 -0400", "from e35.co.us.ibm.com (e35.co.us.ibm.com [32.97.110.153])\n\tby mx0a-001b2d01.pphosted.com with ESMTP id 2cxpge3ah0-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor <linuxppc-dev@lists.ozlabs.org>; Tue, 12 Sep 2017 17:49:51 -0400", "from localhost\n\tby e35.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! 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Violators will be prosecuted; \n\tTue, 12 Sep 2017 15:49:48 -0600", "from b03ledav005.gho.boulder.ibm.com\n\t(b03ledav005.gho.boulder.ibm.com [9.17.130.236])\n\tby b03cxnp08025.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with\n\tESMTP id v8CLnlca2752800; Tue, 12 Sep 2017 14:49:47 -0700", "from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 1EE41BE03B;\n\tTue, 12 Sep 2017 15:49:47 -0600 (MDT)", "from oc1554177480.ibm.com (unknown [9.53.92.230])\n\tby b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP id C89F0BE03A;\n\tTue, 12 Sep 2017 15:49:46 -0600 (MDT)" ], "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com\n\t(client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com;\n\tenvelope-from=mwb@linux.vnet.ibm.com; receiver=<UNKNOWN>)", "To": "linuxppc-dev@lists.ozlabs.org", "From": "Michael Bringmann <mwb@linux.vnet.ibm.com>", "Subject": "[PATCH] powerpc/kernel: Add 'ibm,thread-groups' property for CPU\n\tallocation", "Organization": "IBM Linux Technology Center", "Date": "Tue, 12 Sep 2017 16:49:46 -0500", "User-Agent": "Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.0", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=utf-8", "Content-Language": "en-US", "Content-Transfer-Encoding": "7bit", "X-TM-AS-GCONF": "00", "x-cbid": "17091221-0012-0000-0000-000014FF3A06", "X-IBM-SpamModules-Scores": "", "X-IBM-SpamModules-Versions": "BY=3.00007714; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000227; SDB=6.00916120; UDB=6.00460009;\n\tIPR=6.00696351; \n\tBA=6.00005587; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009;\n\tZB=6.00000000; \n\tZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00017130;\n\tXFM=3.00000015; UTC=2017-09-12 21:49:49", "X-IBM-AV-DETECTION": "SAVI=unused REMOTE=unused XFE=unused", "x-cbparentid": "17091221-0013-0000-0000-00004F761F50", "Message-Id": "<25045c72-e951-cc32-38d6-84ab36e8a117@linux.vnet.ibm.com>", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-12_09:, , signatures=0", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=1\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1709120309", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.24", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "nfont@linux.vnet.ibm.com,\n\tMichael Bringmann from Kernel Team <mbringm@us.ibm.com>", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "powerpc/kernel: Add logic to parse the new property 'ibm,thread-groups\"\nwhen it is present. The content of this property explicitly defines the\nnumber of threads per core as well as the PowerPC 'threads_core_mask'.\nThe design provides a common device-tree for both P9 normal core and\nP9 fused core systems. The property updates the kernel to know CPUs\nof each core are actually present, and then use the map when adding\ncores to the system at boot, or during hotplug operations. Previously,\nthis information was inferred solely from embedded code and the\n\"ibm,ppc-interrupt-server#s\" in the system device tree.\n\nSigned-off-by: Michael Bringmann <mwb@linux.vnet.ibm.com>\n---\n arch/powerpc/include/asm/cputhreads.h | 2 +\n arch/powerpc/kernel/prom.c | 76 ++++++++++++++++++++++++++\n arch/powerpc/kernel/setup-common.c | 30 +++++++---\n arch/powerpc/platforms/pseries/hotplug-cpu.c | 13 ++++\n 4 files changed, 109 insertions(+), 12 deletions(-)", "diff": "diff --git a/arch/powerpc/include/asm/cputhreads.h b/arch/powerpc/include/asm/cputhreads.h\nindex 9377bdf..e57f679 100644\n--- a/arch/powerpc/include/asm/cputhreads.h\n+++ b/arch/powerpc/include/asm/cputhreads.h\n@@ -30,6 +30,8 @@\n #define threads_core_mask\t(*get_cpu_mask(0))\n #endif\n \n+extern cpumask_t pseries_thread_group_mask;\n+\n /* cpu_thread_mask_to_cores - Return a cpumask of one per cores\n * hit by the argument\n *\ndiff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c\nindex f830562..eead1e3 100644\n--- a/arch/powerpc/kernel/prom.c\n+++ b/arch/powerpc/kernel/prom.c\n@@ -67,6 +67,9 @@\n #define DBG(fmt...)\n #endif\n \n+cpumask_t pseries_thread_group_mask;\n+EXPORT_SYMBOL(pseries_thread_group_mask);\n+\n #ifdef CONFIG_PPC64\n int __initdata iommu_is_off;\n int __initdata iommu_force_on;\n@@ -302,6 +305,73 @@ static void __init check_cpu_feature_properties(unsigned long node)\n \t}\n }\n \n+static void __init early_init_setup_thread_group_mask(unsigned long node,\n+\t\t\t\t\t\tcpumask_t *thread_group_mask)\n+{\n+\tconst __be32 *thrgrp;\n+\tint len, rc = 0;\n+\n+\tcpumask_clear(thread_group_mask);\n+\n+\tthrgrp = of_get_flat_dt_prop(node, \"ibm,thread-groups\", &len);\n+\tif (thrgrp) {\n+\t\tu32 cc_type = 0, no_split = 0, thr_per_split = 0;\n+\t\tint j, k;\n+\n+\t\t/* Characteristic type per table */\n+\t\tcc_type = of_read_number(thrgrp++, 1);\n+\n+\t\t/*\n+\t\t * 1 : Group shares common L1, translation cache, and\n+\t\t * instruction data flow\n+\t\t * >1 : Reserved\n+\t\t */\n+\t\tif (cc_type != 1) {\n+\t\t\trc = -EINVAL;\n+\t\t\tgoto endit;\n+\t\t}\n+\n+\t\t/* No. splits */\n+\t\tno_split = of_read_number(thrgrp++, 1);\n+\t\tif (no_split == 0) {\n+\t\t\trc = -EINVAL;\n+\t\t\tgoto endit;\n+\t\t}\n+\n+\t\t/* Threads per split */\n+\t\tthr_per_split = of_read_number(thrgrp++, 1);\n+\t\tif (thr_per_split == 0) {\n+\t\t\trc = -EINVAL;\n+\t\t\tgoto endit;\n+\t\t}\n+\n+\t\tDBG(\"INFO: Node %d; ibm,thread-group \"\n+\t\t\t\"(cc_t=%d, no_spl=%d, thr_p_spl=%d)\\n\",\n+\t\t\t(int)node, (int)cc_type, (int)no_split,\n+\t\t\t(int)thr_per_split);\n+\n+\t\tfor (j = 0; j < no_split; j++) {\n+\t\t\tfor (k = 0; k < thr_per_split; k++) {\n+\t\t\t\tu32 t = of_read_number(thrgrp++, 1);\n+\n+\t\t\t\tcpumask_set_cpu(t, thread_group_mask);\n+\t\t\t\tDBG(\"INFO: Node %d; enable thread %d\\n\", (int)node, (int)t);\n+\t\t\t}\n+\t\t}\n+\t} else {\n+\t\tDBG(\"WARNING: Node %d; ibm,thread-group property not found\\n\",\n+\t\t\t(int)node);\n+\t\tcpumask_setall(thread_group_mask);\n+\t}\n+\n+endit:\n+\tif (rc) {\n+\t\tDBG(\"WARNING: Node %d; error processing ibm,thread-group property\\n\",\n+\t\t\t(int)node);\n+\t\tcpumask_setall(thread_group_mask);\n+\t}\n+}\n+\n static int __init early_init_dt_scan_cpus(unsigned long node,\n \t\t\t\t\t const char *uname, int depth,\n \t\t\t\t\t void *data)\n@@ -325,11 +395,17 @@ static int __init early_init_dt_scan_cpus(unsigned long node,\n \n \tnthreads = len / sizeof(int);\n \n+\t/* Figure out the thread subset */\n+\tearly_init_setup_thread_group_mask(node, &pseries_thread_group_mask);\n+\n \t/*\n \t * Now see if any of these threads match our boot cpu.\n \t * NOTE: This must match the parsing done in smp_setup_cpu_maps.\n \t */\n \tfor (i = 0; i < nthreads; i++) {\n+\t\tif (!cpumask_test_cpu(i % nthreads, &pseries_thread_group_mask))\n+\t\t\tcontinue;\n+\n \t\t/*\n \t\t * version 2 of the kexec param format adds the phys cpuid of\n \t\t * booted proc.\ndiff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c\nindex 94a9482..430fe4a 100644\n--- a/arch/powerpc/kernel/setup-common.c\n+++ b/arch/powerpc/kernel/setup-common.c\n@@ -427,13 +427,16 @@ void __init check_for_initrd(void)\n EXPORT_SYMBOL_GPL(threads_shift);\n EXPORT_SYMBOL_GPL(threads_core_mask);\n \n-static void __init cpu_init_thread_core_maps(int tpc)\n+static void __init cpu_init_thread_core_maps(int tpc,\n+\t\t\t\tcpumask_t *thread_group_mask)\n {\n+\tcpumask_t work_mask;\n \tint i;\n \n \tthreads_per_core = tpc;\n \tthreads_per_subcore = tpc;\n \tcpumask_clear(&threads_core_mask);\n+\tcpumask_clear(&work_mask);\n \n \t/* This implementation only supports power of 2 number of threads\n \t * for simplicity and performance\n@@ -442,14 +445,14 @@ static void __init cpu_init_thread_core_maps(int tpc)\n \tBUG_ON(tpc != (1 << threads_shift));\n \n \tfor (i = 0; i < tpc; i++)\n-\t\tcpumask_set_cpu(i, &threads_core_mask);\n+\t\tcpumask_set_cpu(i, &work_mask);\n+\tcpumask_and(&threads_core_mask, &work_mask, thread_group_mask);\n \n \tprintk(KERN_INFO \"CPU maps initialized for %d thread%s per core\\n\",\n \t tpc, tpc > 1 ? \"s\" : \"\");\n \tprintk(KERN_DEBUG \" (thread shift is %d)\\n\", threads_shift);\n }\n \n-\n /**\n * setup_cpu_maps - initialize the following cpu maps:\n * cpu_possible_mask\n@@ -503,17 +506,24 @@ void __init smp_setup_cpu_maps(void)\n \t\tfor (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {\n \t\t\tbool avail;\n \n-\t\t\tDBG(\" thread %d -> cpu %d (hard id %d)\\n\",\n-\t\t\t j, cpu, be32_to_cpu(intserv[j]));\n-\n \t\t\tavail = of_device_is_available(dn);\n \t\t\tif (!avail)\n \t\t\t\tavail = !of_property_match_string(dn,\n \t\t\t\t\t\t\"enable-method\", \"spin-table\");\n \n-\t\t\tset_cpu_present(cpu, avail);\n-\t\t\tset_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j]));\n-\t\t\tset_cpu_possible(cpu, true);\n+\t\t\tDBG(\" thread %d -> cpu %d (hard id %d)\\n\",\n+\t\t\t j, cpu, be32_to_cpu(intserv[j]));\n+\n+\t\t\tif (cpumask_test_cpu(cpu % nthreads,\n+\t\t\t\t\t\t&pseries_thread_group_mask)) {\n+\t\t\t\tset_cpu_present(cpu, avail);\n+\t\t\t\tset_hard_smp_processor_id(cpu,\n+\t\t\t\t\t\tbe32_to_cpu(intserv[j]));\n+\t\t\t\tset_cpu_possible(cpu, true);\n+\t\t\t} else {\n+\t\t\t\tset_cpu_present(cpu, false);\n+\t\t\t\tset_cpu_possible(cpu, false);\n+\t\t\t}\n \t\t\tcpu++;\n \t\t}\n \t}\n@@ -572,7 +582,7 @@ void __init smp_setup_cpu_maps(void)\n \t * every CPU in the system. If that is not the case, then some code\n \t * here will have to be reworked\n \t */\n-\tcpu_init_thread_core_maps(nthreads);\n+\tcpu_init_thread_core_maps(nthreads, &pseries_thread_group_mask);\n \n \t/* Now that possible cpus are set, set nr_cpu_ids for later use */\n \tsetup_nr_cpu_ids();\ndiff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c\nindex 6afd1ef..a714fe2 100644\n--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c\n+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c\n@@ -35,6 +35,7 @@\n #include <asm/vdso_datapage.h>\n #include <asm/xics.h>\n #include <asm/plpar_wrappers.h>\n+#include <asm/cputhreads.h>\n \n #include \"pseries.h\"\n #include \"offline_states.h\"\n@@ -251,8 +252,10 @@ static int pseries_add_processor(struct device_node *np)\n \tzalloc_cpumask_var(&tmp, GFP_KERNEL);\n \n \tnthreads = len / sizeof(u32);\n-\tfor (i = 0; i < nthreads; i++)\n-\t\tcpumask_set_cpu(i, tmp);\n+\tfor (i = 0; i < nthreads; i++) {\n+\t\tif (cpumask_test_cpu(i % nthreads, &pseries_thread_group_mask))\n+\t\t\tcpumask_set_cpu(i, tmp);\n+\t}\n \n \tcpu_maps_update_begin();\n \n@@ -317,6 +320,8 @@ static void pseries_remove_processor(struct device_node *np)\n \n \tcpu_maps_update_begin();\n \tfor (i = 0; i < nthreads; i++) {\n+\t\tif (!cpumask_test_cpu(i % nthreads, &pseries_thread_group_mask))\n+\t\t\tcontinue;\n \t\tthread = be32_to_cpu(intserv[i]);\n \t\tfor_each_present_cpu(cpu) {\n \t\t\tif (get_hard_smp_processor_id(cpu) != thread)\n@@ -349,6 +354,8 @@ static int dlpar_online_cpu(struct device_node *dn)\n \n \tcpu_maps_update_begin();\n \tfor (i = 0; i < nthreads; i++) {\n+\t\tif (!cpumask_test_cpu(i % nthreads, &pseries_thread_group_mask))\n+\t\t\tcontinue;\n \t\tthread = be32_to_cpu(intserv[i]);\n \t\tfor_each_present_cpu(cpu) {\n \t\t\tif (get_hard_smp_processor_id(cpu) != thread)\n@@ -510,6 +517,8 @@ static int dlpar_offline_cpu(struct device_node *dn)\n \n \tcpu_maps_update_begin();\n \tfor (i = 0; i < nthreads; i++) {\n+\t\tif (!cpumask_test_cpu(i % nthreads, &pseries_thread_group_mask))\n+\t\t\tcontinue;\n \t\tthread = be32_to_cpu(intserv[i]);\n \t\tfor_each_present_cpu(cpu) {\n \t\t\tif (get_hard_smp_processor_id(cpu) != thread)\n", "prefixes": [] }