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GET /api/patches/812981/?format=api
{ "id": 812981, "url": "http://patchwork.ozlabs.org/api/patches/812981/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1505237281-9489-1-git-send-email-aford173@gmail.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1505237281-9489-1-git-send-email-aford173@gmail.com>", "list_archive_url": null, "date": "2017-09-12T17:28:01", "name": "[U-Boot] dm: gpio: Add DM compatibilty to GPIO driver for Davinci", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "9b449a269f9730bb20f0f6abca9f85e3cdcbb7ab", "submitter": { "id": 67132, "url": "http://patchwork.ozlabs.org/api/people/67132/?format=api", "name": "Adam Ford", "email": "aford173@gmail.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1505237281-9489-1-git-send-email-aford173@gmail.com/mbox/", "series": [ { "id": 2748, "url": "http://patchwork.ozlabs.org/api/series/2748/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=2748", "date": "2017-09-12T17:28:01", "name": "[U-Boot] dm: gpio: Add DM compatibilty to GPIO driver for Davinci", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/2748/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/812981/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/812981/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"KSvsbz1n\"; dkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xsBb72yfzz9s76\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 13 Sep 2017 03:28:19 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 24E28C2208E; Tue, 12 Sep 2017 17:28:15 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id DEF4DC21D78;\n\tTue, 12 Sep 2017 17:28:11 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 8DDC7C21D78; Tue, 12 Sep 2017 17:28:10 +0000 (UTC)", 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"<1505237281-9489-1-git-send-email-aford173@gmail.com>", "X-Mailer": "git-send-email 2.7.4", "Cc": "nick.thompson@gefanuc.com, sudhakar.raj@ti.com, adam.ford@logicpd.com", "Subject": "[U-Boot] [PATCH] dm: gpio: Add DM compatibilty to GPIO driver for\n\tDavinci", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "This adds DM compatibility for the davinici GPIO driver.\nTested on da850-evm.\n\nSigned-off-by: Adam Ford <aford173@gmail.com>", "diff": "diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h\nindex 7da0060..32cae3a 100644\n--- a/arch/arm/mach-davinci/include/mach/gpio.h\n+++ b/arch/arm/mach-davinci/include/mach/gpio.h\n@@ -40,7 +40,7 @@ struct davinci_gpio_bank {\n \tunsigned int irq_num;\n \tunsigned int irq_mask;\n \tunsigned long *in_use;\n-\tunsigned long base;\n+\tstruct davinci_gpio *base;\n };\n \n #define davinci_gpio_bank01 ((struct davinci_gpio *)DAVINCI_GPIO_BANK01)\n@@ -49,7 +49,9 @@ struct davinci_gpio_bank {\n #define davinci_gpio_bank67 ((struct davinci_gpio *)DAVINCI_GPIO_BANK67)\n #define davinci_gpio_bank8 ((struct davinci_gpio *)DAVINCI_GPIO_BANK8)\n \n+#ifndef CONFIG_DM_GPIO\n #define gpio_status()\t\tgpio_info()\n+#endif\n #define GPIO_NAME_SIZE\t\t20\n #if defined(CONFIG_SOC_DM644X)\n /* GPIO0 to GPIO53, omit the V3.3 volts one */\n@@ -64,4 +66,14 @@ struct davinci_gpio_bank {\n \n void gpio_info(void);\n \n+#ifdef CONFIG_DM_GPIO\n+\n+/* Information about a GPIO bank */\n+struct davinci_gpio_platdata {\n+\tint bank_index;\n+\tulong base;\t/* address of registers in physical memory */\n+\tconst char *port_name;\n+};\n+#endif\n+\n #endif\ndiff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c\nindex 42bc0f4..2a54d0f 100644\n--- a/board/davinci/da8xxevm/da850evm.c\n+++ b/board/davinci/da8xxevm/da850evm.c\n@@ -10,6 +10,7 @@\n */\n \n #include <common.h>\n+#include <dm.h>\n #include <i2c.h>\n #include <net.h>\n #include <netdev.h>\n@@ -24,6 +25,7 @@\n #include <linux/errno.h>\n #include <hwconfig.h>\n #include <asm/mach-types.h>\n+#include <asm/gpio.h>\n \n #ifdef CONFIG_MMC_DAVINCI\n #include <mmc.h>\ndiff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig\nindex b966fa7..24507da 100644\n--- a/configs/da850evm_defconfig\n+++ b/configs/da850evm_defconfig\n@@ -20,14 +20,15 @@ CONFIG_HUSH_PARSER=y\n CONFIG_SYS_PROMPT=\"U-Boot > \"\n # CONFIG_CMD_IMLS is not set\n CONFIG_CRC32_VERIFY=y\n+# CONFIG_CMD_EEPROM is not set\n # CONFIG_CMD_FLASH is not set\n-# CONFIG_CMD_GPIO is not set\n # CONFIG_CMD_SETEXPR is not set\n CONFIG_CMD_MTDPARTS=y\n CONFIG_CMD_DIAG=y\n CONFIG_OF_CONTROL=y\n CONFIG_ENV_IS_IN_SPI_FLASH=y\n CONFIG_DM=y\n+CONFIG_DM_GPIO=y\n CONFIG_DM_I2C=y\n CONFIG_DM_I2C_COMPAT=y\n CONFIG_I2C_SET_DEFAULT_BUS_NUM=y\ndiff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c\nindex fa3a394..0a8b5a4 100644\n--- a/drivers/gpio/da8xx_gpio.c\n+++ b/drivers/gpio/da8xx_gpio.c\n@@ -8,16 +8,20 @@\n */\n \n #include <common.h>\n+#include <dm.h>\n+#include <fdtdec.h>\n #include <asm/io.h>\n #include <asm/gpio.h>\n #include <asm/arch/hardware.h>\n #include <asm/arch/davinci_misc.h>\n \n+#ifndef CONFIG_DM_GPIO\n static struct gpio_registry {\n \tint is_registered;\n \tchar name[GPIO_NAME_SIZE];\n } gpio_registry[MAX_NUM_GPIOS];\n \n+\n #if defined(CONFIG_SOC_DA8XX)\n #define pinmux(x) (&davinci_syscfg_regs->pinmux[x])\n \n@@ -334,42 +338,30 @@ int gpio_free(unsigned gpio)\n \t/* Do not configure as input or change pin mux here */\n \treturn 0;\n }\n+#endif\n \n-int gpio_direction_input(unsigned gpio)\n+static int _gpio_direction_output(struct davinci_gpio *bank, unsigned gpio, int value)\n {\n-\tstruct davinci_gpio *bank;\n-\n-\tbank = GPIO_BANK(gpio);\n-\tsetbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));\n+\tclrbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));\n+\tgpio_set_value(gpio, value);\n \treturn 0;\n }\n \n-int gpio_direction_output(unsigned gpio, int value)\n+static int _gpio_direction_input(struct davinci_gpio *bank, unsigned gpio)\n {\n-\tstruct davinci_gpio *bank;\n-\n-\tbank = GPIO_BANK(gpio);\n-\tclrbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));\n-\tgpio_set_value(gpio, value);\n+\tsetbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));\n \treturn 0;\n }\n \n-int gpio_get_value(unsigned gpio)\n+static int _gpio_get_value(struct davinci_gpio *bank, unsigned gpio)\n {\n-\tstruct davinci_gpio *bank;\n \tunsigned int ip;\n-\n-\tbank = GPIO_BANK(gpio);\n \tip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gpio));\n \treturn ip ? 1 : 0;\n }\n \n-int gpio_set_value(unsigned gpio, int value)\n+static int _gpio_set_value(struct davinci_gpio *bank, unsigned gpio, int value)\n {\n-\tstruct davinci_gpio *bank;\n-\n-\tbank = GPIO_BANK(gpio);\n-\n \tif (value)\n \t\tbank->set_data = 1U << GPIO_BIT(gpio);\n \telse\n@@ -378,6 +370,13 @@ int gpio_set_value(unsigned gpio, int value)\n \treturn 0;\n }\n \n+static int _gpio_get_dir(struct davinci_gpio *bank, unsigned gpio)\n+{\n+\treturn in_le32(&bank->dir) & (1U << GPIO_BIT(gpio));\n+}\n+\n+#ifndef CONFIG_DM_GPIO\n+\n void gpio_info(void)\n {\n \tunsigned gpio, dir, val;\n@@ -385,7 +384,8 @@ void gpio_info(void)\n \n \tfor (gpio = 0; gpio < MAX_NUM_GPIOS; ++gpio) {\n \t\tbank = GPIO_BANK(gpio);\n-\t\tdir = in_le32(&bank->dir) & (1U << GPIO_BIT(gpio));\n+\t\tprintf(\"gpio_info: Bank=%x\\n\", (int) bank);\n+\t\tdir = _gpio_get_dir(bank, gpio);\n \t\tval = gpio_get_value(gpio);\n \n \t\tprintf(\"% 4d: %s: %d [%c] %s\\n\",\n@@ -394,3 +394,171 @@ void gpio_info(void)\n \t\t\tgpio_registry[gpio].name);\n \t}\n }\n+\n+\n+\n+int gpio_direction_input(unsigned gpio)\n+{\n+\tstruct davinci_gpio *bank;\n+\n+\tbank = GPIO_BANK(gpio);\n+\treturn _gpio_direction_input(bank, gpio);\n+}\n+\n+int gpio_direction_output(unsigned gpio, int value)\n+{\n+\tstruct davinci_gpio *bank;\n+\n+\tbank = GPIO_BANK(gpio);\n+\treturn _gpio_direction_output(bank, gpio, value);\n+}\n+\n+int gpio_get_value(unsigned gpio)\n+{\n+\tstruct davinci_gpio *bank;\n+\n+\tbank = GPIO_BANK(gpio);\n+\treturn _gpio_get_value(bank, gpio);\n+}\n+\n+int gpio_set_value(unsigned gpio, int value)\n+{\n+\tstruct davinci_gpio *bank;\n+\n+\tbank = GPIO_BANK(gpio);\n+\treturn _gpio_set_value(bank, gpio, value);\n+}\n+\n+\n+#else /* CONFIG_DM_GPIO */\n+/* set GPIO pin 'gpio' as an input */\n+\n+static struct davinci_gpio *davinci_get_gpio_bank(struct udevice *dev, unsigned offset)\n+{\n+\tstruct davinci_gpio_bank *bank = dev_get_priv(dev);\n+\n+\t/* The device tree is not broken into banks but the infrastructure is\n+\t * expecting it this way, so we'll first include the 0x10 offset, then\n+\t * calculate the bank manually based on the offset.\n+\t */\n+\n+\treturn ((struct davinci_gpio *)bank->base) + 0x10 + (offset >> 5);\n+}\n+\n+static int davinci_gpio_direction_input(struct udevice *dev, unsigned offset)\n+{\n+\tstruct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);\n+\n+\t_gpio_direction_input(base, offset);\n+\treturn 0;\n+}\n+\n+/* set GPIO pin 'gpio' as an output, with polarity 'value' */\n+static int davinci_gpio_direction_output(struct udevice *dev, unsigned offset,\n+\t\t\t\t int value)\n+{\n+\tstruct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);\n+\n+\t_gpio_direction_output(base, offset, value);\n+\treturn 0;\n+}\n+\n+/* read GPIO IN value of pin 'gpio' */\n+static int davinci_gpio_get_value(struct udevice *dev, unsigned offset)\n+{\n+\tstruct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);\n+\n+\treturn _gpio_get_value(base, offset);\n+}\n+\n+/* write GPIO OUT value to pin 'gpio' */\n+static int davinci_gpio_set_value(struct udevice *dev, unsigned offset,\n+\t\t\t\t int value)\n+{\n+\tstruct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);\n+\n+\t_gpio_set_value(base, offset, value);\n+\n+\treturn 0;\n+}\n+\n+static int davinci_gpio_get_function(struct udevice *dev, unsigned offset)\n+{\n+\tunsigned int dir;\n+\tstruct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);\n+\n+\tdir = _gpio_get_dir(base, offset);\n+\n+\tif (dir)\n+\t\treturn GPIOF_INPUT;\n+\n+\treturn GPIOF_OUTPUT;\n+}\n+\n+static const struct dm_gpio_ops gpio_davinci_ops = {\n+\t.direction_input\t= davinci_gpio_direction_input,\n+\t.direction_output\t= davinci_gpio_direction_output,\n+\t.get_value\t\t= davinci_gpio_get_value,\n+\t.set_value\t\t= davinci_gpio_set_value,\n+\t.get_function\t\t= davinci_gpio_get_function,\n+};\n+\n+static int davinci_gpio_probe(struct udevice *dev)\n+{\n+\tstruct davinci_gpio_bank *bank = dev_get_priv(dev);\n+\tstruct davinci_gpio_platdata *plat = dev_get_platdata(dev);\n+\tstruct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);\n+\tconst void *fdt = gd->fdt_blob;\n+\tint node = dev_of_offset(dev);\n+\n+\tuc_priv->bank_name = plat->port_name;\n+\tuc_priv->gpio_count = fdtdec_get_int(fdt, node, \"ti,ngpio\", -1);\n+\tbank->base = (struct davinci_gpio *)plat->base;\n+\treturn 0;\n+}\n+\n+static int davinci_gpio_bind(struct udevice *dev)\n+{\n+\tstruct davinci_gpio_platdata *plat = dev->platdata;\n+\tfdt_addr_t base_addr;\n+\n+\tif (plat)\n+\t\treturn 0;\n+\n+\tbase_addr = devfdt_get_addr(dev);\n+\tif (base_addr == FDT_ADDR_T_NONE)\n+\t\treturn -ENODEV;\n+\n+\t/*\n+\t* TODO:\n+\t* When every board is converted to driver model and DT is\n+\t* supported, this can be done by auto-alloc feature, but\n+\t* not using calloc to alloc memory for platdata.\n+\t*/\n+\tplat = calloc(1, sizeof(*plat));\n+\tif (!plat)\n+\t\treturn -ENOMEM;\n+\n+\tplat->base = base_addr;\n+\tplat->port_name = fdt_get_name(gd->fdt_blob, dev_of_offset(dev), NULL);\n+\tdev->platdata = plat;\n+\n+\treturn 0;\n+}\n+\n+static const struct udevice_id davinci_gpio_ids[] = {\n+\t{ .compatible = \"ti,dm6441-gpio\" },\n+\t{ }\n+};\n+\n+U_BOOT_DRIVER(gpio_davinci) = {\n+\t.name\t= \"gpio_davinci\",\n+\t.id\t= UCLASS_GPIO,\n+\t.ops\t= &gpio_davinci_ops,\n+\t.of_match = davinci_gpio_ids,\n+\t.bind\t= davinci_gpio_bind,\n+\t.probe\t= davinci_gpio_probe,\n+\t.priv_auto_alloc_size = sizeof(struct davinci_gpio_bank),\n+};\n+\n+#endif\ndiff --git a/include/configs/da850evm.h b/include/configs/da850evm.h\nindex ab2e6ae..ea8c441 100644\n--- a/include/configs/da850evm.h\n+++ b/include/configs/da850evm.h\n@@ -262,6 +262,7 @@\n #define CONFIG_ENV_SECT_SIZE\t\t(64 << 10)\n #endif\n \n+#define CONFIG_DA8XX_GPIO\n /*\n * U-Boot general configuration\n */\n", "prefixes": [ "U-Boot" ] }