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GET /api/patches/812669/?format=api
{ "id": 812669, "url": "http://patchwork.ozlabs.org/api/patches/812669/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-mtd/patch/1505183851-29355-2-git-send-email-yamada.masahiro@socionext.com/", "project": { "id": 3, "url": "http://patchwork.ozlabs.org/api/projects/3/?format=api", "name": "Linux MTD development", "link_name": "linux-mtd", "list_id": "linux-mtd.lists.infradead.org", "list_email": "linux-mtd@lists.infradead.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1505183851-29355-2-git-send-email-yamada.masahiro@socionext.com>", "list_archive_url": null, "date": "2017-09-12T02:37:30", "name": "[1/2] mtd: nand: introduce NAND_ROW_ADDR_3 flag", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "e994f17d7cae00c4d8838c7d460b47661b8fe171", "submitter": { "id": 65882, "url": "http://patchwork.ozlabs.org/api/people/65882/?format=api", "name": "Masahiro Yamada", "email": "yamada.masahiro@socionext.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-mtd/patch/1505183851-29355-2-git-send-email-yamada.masahiro@socionext.com/mbox/", "series": [ { "id": 2602, "url": "http://patchwork.ozlabs.org/api/series/2602/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-mtd/list/?series=2602", "date": "2017-09-12T02:37:31", "name": "mtd: nand: introduce NAND_ROW_ADDR_3 flag and improve Denali driver", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/2602/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/812669/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/812669/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org; spf=none (mailfrom)\n\tsmtp.mailfrom=lists.infradead.org (client-ip=65.50.211.133;\n\thelo=bombadil.infradead.org;\n\tenvelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"oEryZ+EC\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=nifty.com header.i=@nifty.com\n\theader.b=\"Fd/rpjfo\"; dkim-atps=neutral" ], "Received": [ "from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xrptN3tFSz9s7F\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 12 Sep 2017 12:40:12 +1000 (AEST)", "from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1drb7K-0005ie-VL; Tue, 12 Sep 2017 02:40:03 +0000", "from conuserg-12.nifty.com ([210.131.2.79])\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1drb62-00050V-9n; Tue, 12 Sep 2017 02:38:45 +0000", "from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp\n\t[153.142.97.92]) (authenticated)\n\tby conuserg-12.nifty.com with ESMTP id v8C2buJX001020;\n\tTue, 12 Sep 2017 11:37:57 +0900" ], "DKIM-Signature": [ "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe:\n\tList-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References:\n\tIn-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID:\n\tContent-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc\n\t:Resent-Message-ID:List-Owner;\n\tbh=K+XgmQHPvCQ3a02mqvXWKoX+1OD7Tpwo+3mbdTSLNoc=;\n\tb=oEryZ+ECE+iwJS+KlaNfR6gzAi\n\tP36cJYzW+WUpDYN/6xrxGo9wovwVyVDGCNWPgWfpN7mV38DEp+Uvhm7T7X9DcN1j7pblbG4o8ujrE\n\tJnPVIXA7KDIiZgnwRryrY8ts4D6PbNDI0I7HwRHEi4INr86elgqgNdEmHmCeSTSZjUZXXv4F/NC9o\n\t/rEVgJXXQPXVWZSnUkBs91ARMEqpLxRH4vFDKlg43ZGmxBmNXDetXuyBtyncNDvLGCYcXhddvEmjw\n\tLuW+/EIHEcDYuFvwRiArD+x6PoSRlyA/ShGSAiaAtnKO/Y0hOmf8xBYIGWBwzB/nggccufctpRVT9\n\toq9V/PMA==;", "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com;\n\ts=dec2015msa; t=1505183878;\n\tbh=a3qmuMfAOfcs2K+SHxQFrqWW8o+UnWrInoxcBA8yusw=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=Fd/rpjfoX8pqEWuZp7I3q5365r0QO6aMBDwPwbRIP4Lzra/1+nsM1oPtkZgo1smRV\n\tcbKNQlQM//tyED+icJnwKDfcW7JdIZZBVKnOnxPjpsOuNAtt91UjKbMK/S/qqMW7yc\n\tm3ZcK+YhCjlKf6l8ghzJ76sdMkD44rpYk6aRtxSuxNEHUXhfdtpX3t3exSfmml/6QC\n\tdbZCmOBrUg8qo/SX1mgfi/K4D06+S5jzdcQmxSPJkxZ0h5nQIWA+hV0J856104RUO3\n\tANSlWNgeUYDe5JM9SyqRHTHFeytHK5Z4UyhSmLhjlwBGmqCDT0wi1RGlgYYCNXUd2Z\n\t6SBrFSVLhH5HA==" ], "DKIM-Filter": "OpenDKIM Filter v2.10.3 conuserg-12.nifty.com v8C2buJX001020", "X-Nifty-SrcIP": "[153.142.97.92]", "From": "Masahiro Yamada <yamada.masahiro@socionext.com>", "To": "linux-mtd@lists.infradead.org", "Subject": "[PATCH 1/2] mtd: nand: introduce NAND_ROW_ADDR_3 flag", "Date": "Tue, 12 Sep 2017 11:37:30 +0900", "Message-Id": "<1505183851-29355-2-git-send-email-yamada.masahiro@socionext.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1505183851-29355-1-git-send-email-yamada.masahiro@socionext.com>", "References": "<1505183851-29355-1-git-send-email-yamada.masahiro@socionext.com>", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20170911_193842_757415_6B33789D ", "X-CRM114-Status": "GOOD ( 13.62 )", "X-Spam-Score": "-1.2 (-)", "X-Spam-Report": "SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-1.2 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t0.7 SPF_SOFTFAIL SPF: sender does not match SPF record (softfail)\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid", "X-BeenThere": "linux-mtd@lists.infradead.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "Linux MTD discussion mailing list <linux-mtd.lists.infradead.org>", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-mtd>,\n\t<mailto:linux-mtd-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-mtd/>", "List-Post": "<mailto:linux-mtd@lists.infradead.org>", "List-Help": "<mailto:linux-mtd-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-mtd>,\n\t<mailto:linux-mtd-request@lists.infradead.org?subject=subscribe>", "Cc": "Boris Brezillon <boris.brezillon@free-electrons.com>,\n\tRichard Weinberger <richard@nod.at>, Wan ZongShun <mcuos.com@gmail.com>, \n\tMarek Vasut <marek.vasut@gmail.com>, Josh Wu <rainyfeeling@outlook.com>, \n\tlinux-kernel@vger.kernel.org, Wenyou Yang <wenyou.yang@atmel.com>,\n\tMasahiro Yamada <yamada.masahiro@socionext.com>,\n\tCyrille Pitchen <cyrille.pitchen@wedev4u.fr>,\n\tBrian Norris <computersforpeace@gmail.com>,\n\tDavid Woodhouse <dwmw2@infradead.org>,\n\tlinux-arm-kernel@lists.infradead.org", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"linux-mtd\" <linux-mtd-bounces@lists.infradead.org>", "Errors-To": "linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org" }, "content": "Several drivers check ->chipsize to see if the third row address cycle\nis needed. Instead of embedding magic sizes such as 32MB, 128MB in\ndrivers, introduce a new flag NAND_ROW_ADDR_3 for clean-up. Since\nnand_scan_ident() knows well about the device, it can handle this\nproperly. The flag is set if the row address bit width is greater\nthan 16.\n\nDelete comments such as \"One more address cycle for ...\" because\nintention is now clear enough from the code.\n\nSigned-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>\n---\n\n drivers/mtd/nand/atmel/nand-controller.c | 3 +--\n drivers/mtd/nand/au1550nd.c | 3 +--\n drivers/mtd/nand/diskonchip.c | 3 +--\n drivers/mtd/nand/hisi504_nand.c | 3 +--\n drivers/mtd/nand/mxc_nand.c | 3 +--\n drivers/mtd/nand/nand_base.c | 9 +++++----\n drivers/mtd/nand/nuc900_nand.c | 2 +-\n include/linux/mtd/rawnand.h | 3 +++\n 8 files changed, 14 insertions(+), 15 deletions(-)", "diff": "diff --git a/drivers/mtd/nand/atmel/nand-controller.c b/drivers/mtd/nand/atmel/nand-controller.c\nindex f25eca7..7bc8d20 100644\n--- a/drivers/mtd/nand/atmel/nand-controller.c\n+++ b/drivers/mtd/nand/atmel/nand-controller.c\n@@ -718,8 +718,7 @@ static void atmel_nfc_set_op_addr(struct nand_chip *chip, int page, int column)\n \t\tnc->op.addrs[nc->op.naddrs++] = page;\n \t\tnc->op.addrs[nc->op.naddrs++] = page >> 8;\n \n-\t\tif ((mtd->writesize > 512 && chip->chipsize > SZ_128M) ||\n-\t\t (mtd->writesize <= 512 && chip->chipsize > SZ_32M))\n+\t\tif (chip->options & NAND_ROW_ADDR_3)\n \t\t\tnc->op.addrs[nc->op.naddrs++] = page >> 16;\n \t}\n }\ndiff --git a/drivers/mtd/nand/au1550nd.c b/drivers/mtd/nand/au1550nd.c\nindex 9d4a28f..8ab827e 100644\n--- a/drivers/mtd/nand/au1550nd.c\n+++ b/drivers/mtd/nand/au1550nd.c\n@@ -331,8 +331,7 @@ static void au1550_command(struct mtd_info *mtd, unsigned command, int column, i\n \n \t\t\tctx->write_byte(mtd, (u8)(page_addr >> 8));\n \n-\t\t\t/* One more address cycle for devices > 32MiB */\n-\t\t\tif (this->chipsize > (32 << 20))\n+\t\t\tif (this->options & NAND_ROW_ADDR_3)\n \t\t\t\tctx->write_byte(mtd,\n \t\t\t\t\t\t((page_addr >> 16) & 0x0f));\n \t\t}\ndiff --git a/drivers/mtd/nand/diskonchip.c b/drivers/mtd/nand/diskonchip.c\nindex c3aa53c..72671dc 100644\n--- a/drivers/mtd/nand/diskonchip.c\n+++ b/drivers/mtd/nand/diskonchip.c\n@@ -705,8 +705,7 @@ static void doc2001plus_command(struct mtd_info *mtd, unsigned command, int colu\n \t\tif (page_addr != -1) {\n \t\t\tWriteDOC((unsigned char)(page_addr & 0xff), docptr, Mplus_FlashAddress);\n \t\t\tWriteDOC((unsigned char)((page_addr >> 8) & 0xff), docptr, Mplus_FlashAddress);\n-\t\t\t/* One more address cycle for higher density devices */\n-\t\t\tif (this->chipsize & 0x0c000000) {\n+\t\t\tif (this->options & NAND_ROW_ADDR_3) {\n \t\t\t\tWriteDOC((unsigned char)((page_addr >> 16) & 0x0f), docptr, Mplus_FlashAddress);\n \t\t\t\tprintk(\"high density\\n\");\n \t\t\t}\ndiff --git a/drivers/mtd/nand/hisi504_nand.c b/drivers/mtd/nand/hisi504_nand.c\nindex d9ee1a7..0ded7f4 100644\n--- a/drivers/mtd/nand/hisi504_nand.c\n+++ b/drivers/mtd/nand/hisi504_nand.c\n@@ -432,8 +432,7 @@ static void set_addr(struct mtd_info *mtd, int column, int page_addr)\n \t\thost->addr_value[0] |= (page_addr & 0xffff)\n \t\t\t<< (host->addr_cycle * 8);\n \t\thost->addr_cycle += 2;\n-\t\t/* One more address cycle for devices > 128MiB */\n-\t\tif (chip->chipsize > (128 << 20)) {\n+\t\tif (chip->->options & NAND_ROW_ADDR_3) {\n \t\t\thost->addr_cycle += 1;\n \t\t\tif (host->command == NAND_CMD_ERASE1)\n \t\t\t\thost->addr_value[0] |= ((page_addr >> 16) & 0xff) << 16;\ndiff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c\nindex 53e5e03..bacdd04 100644\n--- a/drivers/mtd/nand/mxc_nand.c\n+++ b/drivers/mtd/nand/mxc_nand.c\n@@ -859,8 +859,7 @@ static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr)\n \t\t\t\thost->devtype_data->send_addr(host,\n \t\t\t\t\t\t(page_addr >> 8) & 0xff, true);\n \t\t} else {\n-\t\t\t/* One more address cycle for higher density devices */\n-\t\t\tif (mtd->size >= 0x4000000) {\n+\t\t\tif (nand_chip->options & NAND_ROW_ADDR_3) {\n \t\t\t\t/* paddr_8 - paddr_15 */\n \t\t\t\thost->devtype_data->send_addr(host,\n \t\t\t\t\t\t(page_addr >> 8) & 0xff,\ndiff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c\nindex bcc8cef1..3bc4404 100644\n--- a/drivers/mtd/nand/nand_base.c\n+++ b/drivers/mtd/nand/nand_base.c\n@@ -727,8 +727,7 @@ static void nand_command(struct mtd_info *mtd, unsigned int command,\n \t\tchip->cmd_ctrl(mtd, page_addr, ctrl);\n \t\tctrl &= ~NAND_CTRL_CHANGE;\n \t\tchip->cmd_ctrl(mtd, page_addr >> 8, ctrl);\n-\t\t/* One more address cycle for devices > 32MiB */\n-\t\tif (chip->chipsize > (32 << 20))\n+\t\tif (chip->options & NAND_ROW_ADDR_3)\n \t\t\tchip->cmd_ctrl(mtd, page_addr >> 16, ctrl);\n \t}\n \tchip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);\n@@ -854,8 +853,7 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command,\n \t\t\tchip->cmd_ctrl(mtd, page_addr, ctrl);\n \t\t\tchip->cmd_ctrl(mtd, page_addr >> 8,\n \t\t\t\t NAND_NCE | NAND_ALE);\n-\t\t\t/* One more address cycle for devices > 128MiB */\n-\t\t\tif (chip->chipsize > (128 << 20))\n+\t\t\tif (chip->options & NAND_ROW_ADDR_3)\n \t\t\t\tchip->cmd_ctrl(mtd, page_addr >> 16,\n \t\t\t\t\t NAND_NCE | NAND_ALE);\n \t\t}\n@@ -4000,6 +3998,9 @@ static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type)\n \t\tchip->chip_shift += 32 - 1;\n \t}\n \n+\tif (chip->chip_shift - chip->page_shift > 16)\n+\t\tchip->options |= NAND_ROW_ADDR_3;\n+\n \tchip->badblockbits = 8;\n \tchip->erase = single_erase;\n \ndiff --git a/drivers/mtd/nand/nuc900_nand.c b/drivers/mtd/nand/nuc900_nand.c\nindex 7bb4d2e..af5b32c9 100644\n--- a/drivers/mtd/nand/nuc900_nand.c\n+++ b/drivers/mtd/nand/nuc900_nand.c\n@@ -154,7 +154,7 @@ static void nuc900_nand_command_lp(struct mtd_info *mtd, unsigned int command,\n \t\tif (page_addr != -1) {\n \t\t\twrite_addr_reg(nand, page_addr);\n \n-\t\t\tif (chip->chipsize > (128 << 20)) {\n+\t\t\tif (chip->options & NAND_ROW_ADDR_3) {\n \t\t\t\twrite_addr_reg(nand, page_addr >> 8);\n \t\t\t\twrite_addr_reg(nand, page_addr >> 16 | ENDADDR);\n \t\t\t} else {\ndiff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h\nindex 2b05f42..749bb08 100644\n--- a/include/linux/mtd/rawnand.h\n+++ b/include/linux/mtd/rawnand.h\n@@ -177,6 +177,9 @@ enum nand_ecc_algo {\n */\n #define NAND_NEED_SCRAMBLING\t0x00002000\n \n+/* Device needs 3rd row address cycle */\n+#define NAND_ROW_ADDR_3\t\t0x00004000\n+\n /* Options valid for Samsung large page devices */\n #define NAND_SAMSUNG_LP_OPTIONS NAND_CACHEPRG\n \n", "prefixes": [ "1/2" ] }