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GET /api/patches/812454/?format=api
{ "id": 812454, "url": "http://patchwork.ozlabs.org/api/patches/812454/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170911171235.29331-5-clg@kaod.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170911171235.29331-5-clg@kaod.org>", "list_archive_url": null, "date": "2017-09-11T17:12:18", "name": "[RFC,v2,04/21] ppc/xive: provide a link to the sPAPR ICS object under XIVE", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "e89b2e6a5bafe9da0a2da35614477269c6096f80", "submitter": { "id": 68548, "url": "http://patchwork.ozlabs.org/api/people/68548/?format=api", "name": "Cédric Le Goater", "email": "clg@kaod.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170911171235.29331-5-clg@kaod.org/mbox/", "series": [ { "id": 2526, "url": "http://patchwork.ozlabs.org/api/series/2526/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2526", "date": "2017-09-11T17:12:14", "name": "Guest exploitation of the XIVE interrupt controller (POWER9)", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/2526/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/812454/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/812454/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xrZKq6KZmz9s83\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 12 Sep 2017 03:14:39 +1000 (AEST)", "from localhost ([::1]:59261 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1drSI9-00011h-Qr\n\tfor incoming@patchwork.ozlabs.org; Mon, 11 Sep 2017 13:14:37 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:34740)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <clg@kaod.org>) id 1drSGx-0000UK-61\n\tfor qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:13:27 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <clg@kaod.org>) id 1drSGs-0003qB-M7\n\tfor qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:13:23 -0400", "from 6.mo2.mail-out.ovh.net ([87.98.165.38]:40367)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <clg@kaod.org>) id 1drSGs-0003pu-FY\n\tfor qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:13:18 -0400", "from player770.ha.ovh.net (b6.ovh.net [213.186.33.56])\n\tby mo2.mail-out.ovh.net (Postfix) with ESMTP id 879B7AACCD\n\tfor <qemu-devel@nongnu.org>; Mon, 11 Sep 2017 19:13:17 +0200 (CEST)", "from zorba.kaod.org.com (LFbn-1-2231-173.w90-76.abo.wanadoo.fr\n\t[90.76.52.173]) (Authenticated sender: clg@kaod.org)\n\tby player770.ha.ovh.net (Postfix) with ESMTPSA id 585BE3C007E;\n\tMon, 11 Sep 2017 19:13:10 +0200 (CEST)" ], "From": "=?utf-8?q?C=C3=A9dric_Le_Goater?= <clg@kaod.org>", "To": "qemu-ppc@nongnu.org, qemu-devel@nongnu.org,\n\tDavid Gibson <david@gibson.dropbear.id.au>,\n\tBenjamin Herrenschmidt <benh@kernel.crashing.org>,\n\tAlexey Kardashevskiy <aik@ozlabs.ru>, Alexander Graf <agraf@suse.de>", "Date": "Mon, 11 Sep 2017 19:12:18 +0200", "Message-Id": "<20170911171235.29331-5-clg@kaod.org>", "X-Mailer": "git-send-email 2.13.5", "In-Reply-To": "<20170911171235.29331-1-clg@kaod.org>", "References": "<20170911171235.29331-1-clg@kaod.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "X-Ovh-Tracer-Id": "14135954807111322451", "X-VR-SPAMSTATE": "OK", "X-VR-SPAMSCORE": "-100", "X-VR-SPAMCAUSE": "gggruggvucftvghtrhhoucdtuddrfeelledrgedtgdduudehucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm", "Content-Transfer-Encoding": "quoted-printable", "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]", "X-Received-From": "87.98.165.38", "Subject": "[Qemu-devel] [RFC PATCH v2 04/21] ppc/xive: provide a link to the\n\tsPAPR ICS object under XIVE", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "=?utf-8?q?C=C3=A9dric_Le_Goater?= <clg@kaod.org>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "The sPAPR machine first starts with a XICS interrupt model and\ndepending on the guest capabilities, the XIVE exploitation mode is\nnegotiated during CAS. A reset should then be performed to rebuild the\ndevice tree but the same IRQ numbers which were allocated by the\ndevices prior to reset, when the XICS model was operating, are still\nin use.\n\nFor this purpose, we need a common IRQ number allocator for both the\ninterrupt models: XICS legacy or XIVE exploitation. This is what the\nICSIRQState array of the XICS interrupt source is used for. It also\ncontains the LSI/MSI flag of an interrupt which will we need later on.\n\nSo, let's provide a link to the sPAPR ICS object under XIVE to make\nuse of it.\n\nSigned-off-by: Cédric Le Goater <clg@kaod.org>\n---\n hw/intc/spapr_xive.c | 12 ++++++++++++\n include/hw/ppc/spapr_xive.h | 4 ++++\n 2 files changed, 16 insertions(+)", "diff": "diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c\nindex 6d98528fae68..1681affb0848 100644\n--- a/hw/intc/spapr_xive.c\n+++ b/hw/intc/spapr_xive.c\n@@ -56,6 +56,8 @@ void spapr_xive_reset(void *dev)\n static void spapr_xive_realize(DeviceState *dev, Error **errp)\n {\n sPAPRXive *xive = SPAPR_XIVE(dev);\n+ Object *obj;\n+ Error *err = NULL;\n \n if (!xive->nr_targets) {\n error_setg(errp, \"Number of interrupt targets needs to be greater 0\");\n@@ -68,6 +70,16 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp)\n return;\n }\n \n+ /* Retrieve SPAPR ICS source to share the IRQ number allocator */\n+ obj = object_property_get_link(OBJECT(dev), \"ics\", &err);\n+ if (!obj) {\n+ error_setg(errp, \"%s: required link 'ics' not found: %s\",\n+ __func__, error_get_pretty(err));\n+ return;\n+ }\n+\n+ xive->ics = ICS_BASE(obj);\n+\n /* Allocate SBEs (State Bit Entry). 2 bits, so 4 entries per byte */\n xive->sbe_size = DIV_ROUND_UP(xive->nr_irqs, 4);\n xive->sbe = g_malloc0(xive->sbe_size);\ndiff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h\nindex b17dd4f17b0b..29112589b37f 100644\n--- a/include/hw/ppc/spapr_xive.h\n+++ b/include/hw/ppc/spapr_xive.h\n@@ -24,6 +24,7 @@\n typedef struct sPAPRXive sPAPRXive;\n typedef struct XiveIVE XiveIVE;\n typedef struct XiveEQ XiveEQ;\n+typedef struct ICSState ICSState;\n \n #define TYPE_SPAPR_XIVE \"spapr-xive\"\n #define SPAPR_XIVE(obj) OBJECT_CHECK(sPAPRXive, (obj), TYPE_SPAPR_XIVE)\n@@ -35,6 +36,9 @@ struct sPAPRXive {\n uint32_t nr_targets;\n uint32_t nr_irqs;\n \n+ /* IRQ */\n+ ICSState *ics; /* XICS source inherited from the SPAPR machine */\n+\n /* XIVE internal tables */\n uint8_t *sbe;\n uint32_t sbe_size;\n", "prefixes": [ "RFC", "v2", "04/21" ] }