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GET /api/patches/812304/?format=api
{ "id": 812304, "url": "http://patchwork.ozlabs.org/api/patches/812304/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1505126644-18396-5-git-send-email-jacob-chen@iotwrt.com/", "project": { "id": 37, "url": "http://patchwork.ozlabs.org/api/projects/37/?format=api", "name": "Devicetree Bindings", "link_name": "devicetree-bindings", "list_id": "devicetree.vger.kernel.org", "list_email": "devicetree@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1505126644-18396-5-git-send-email-jacob-chen@iotwrt.com>", "list_archive_url": null, "date": "2017-09-11T10:44:04", "name": "[v8,4/4] dt-bindings: Document the Rockchip RGA bindings", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": true, "hash": "b1d708255a006ec3465be951e77afce3932bb1b6", "submitter": { "id": 68530, "url": "http://patchwork.ozlabs.org/api/people/68530/?format=api", "name": "Jacob Chen", "email": "jacob-chen@iotwrt.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1505126644-18396-5-git-send-email-jacob-chen@iotwrt.com/mbox/", "series": [ { "id": 2473, "url": "http://patchwork.ozlabs.org/api/series/2473/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=2473", "date": "2017-09-11T10:44:00", "name": "Add Rockchip RGA V4l2 support", "version": 8, "mbox": "http://patchwork.ozlabs.org/series/2473/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/812304/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/812304/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<devicetree-owner@vger.kernel.org>", "X-Original-To": "incoming-dt@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-dt@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xrPh51q7Qz9t2Q\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tMon, 11 Sep 2017 20:44:53 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751478AbdIKKof (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tMon, 11 Sep 2017 06:44:35 -0400", "from mail-pg0-f66.google.com ([74.125.83.66]:33282 \"EHLO\n\tmail-pg0-f66.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751472AbdIKKob (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Mon, 11 Sep 2017 06:44:31 -0400", "by mail-pg0-f66.google.com with SMTP id i130so2451003pgc.0;\n\tMon, 11 Sep 2017 03:44:31 -0700 (PDT)", "from localhost.localdomain ([103.29.142.67])\n\tby smtp.gmail.com with ESMTPSA id\n\tg5sm13214843pgo.66.2017.09.11.03.44.27\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tMon, 11 Sep 2017 03:44:30 -0700 (PDT)" ], "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=c0BLHcgmGP8BOJQUzF6sN/wWs4eLRIOZXu02O+hR3eE=;\n\tb=WxZ/37l9GvZNpZCtTeTkwftVALU5Wdx3a3gokVZm/rucpN/c6hFxhGfwNVBHmI37cU\n\t6NYgmEcoDuL/+eYI8roWfu5EsrNchPLsVbkrPe0tcOZoqGSVM+rVihQ7w6PNpZD5c7ka\n\ty4GJFEqrf+mT8yhodYDiX5gCHyGCfVvvddDq+BG7Dp0K4Okt372OiLs1hgHbnyMMnbAH\n\tqdfslv+GcBZR9+9Ci91Sv0Ml1yMbLs6RdgxdBl+QP+D9amyJaaV3+uF77nHJkjGfxwiS\n\tTwGjAdi9axEH0uaXfnhsdS6Ugc4ErCcwZ9ZGvTlxkVHg2ZR32SgwglggSMoevIlAGpVK\n\tkPuQ==", "X-Gm-Message-State": "AHPjjUjAWOCP5AY/h5CIg6Lxz2gTME3tobhNuCmJvjEk8+m0jdyRDI66\n\txwv2MdrmiarUAA==", "X-Google-Smtp-Source": "ADKCNb7uBLeQSTBvaaGDeWZZdTyW7KkeaMu6g5gDSsDVJvWfasBp5mrblXoP9EYfKU8XjY9078GW6g==", "X-Received": "by 10.98.131.141 with SMTP id h135mr9479455pfe.204.1505126671307;\n\tMon, 11 Sep 2017 03:44:31 -0700 (PDT)", "From": "Jacob Chen <jacob-chen@iotwrt.com>", "To": "linux-rockchip@lists.infradead.org", "Cc": "linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org, heiko@sntech.de, robh+dt@kernel.org,\n\tmchehab@kernel.org, linux-media@vger.kernel.org,\n\tlaurent.pinchart+renesas@ideasonboard.com, hans.verkuil@cisco.com,\n\ttfiga@chromium.org, nicolas@ndufresne.ca,\n\tJacob Chen <jacob-chen@iotwrt.com>, Yakir Yang <ykk@rock-chips.com>", "Subject": "[PATCH v8 4/4] dt-bindings: Document the Rockchip RGA bindings", "Date": "Mon, 11 Sep 2017 18:44:04 +0800", "Message-Id": "<1505126644-18396-5-git-send-email-jacob-chen@iotwrt.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1505126644-18396-1-git-send-email-jacob-chen@iotwrt.com>", "References": "<1505126644-18396-1-git-send-email-jacob-chen@iotwrt.com>", "Sender": "devicetree-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<devicetree.vger.kernel.org>", "X-Mailing-List": "devicetree@vger.kernel.org" }, "content": "Add DT bindings documentation for Rockchip RGA\n\nSigned-off-by: Jacob Chen <jacob-chen@iotwrt.com>\nSigned-off-by: Yakir Yang <ykk@rock-chips.com>\nAcked-by: Rob Herring <robh@kernel.org>\n---\n .../devicetree/bindings/media/rockchip-rga.txt | 33 ++++++++++++++++++++++\n 1 file changed, 33 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/media/rockchip-rga.txt", "diff": "diff --git a/Documentation/devicetree/bindings/media/rockchip-rga.txt b/Documentation/devicetree/bindings/media/rockchip-rga.txt\nnew file mode 100644\nindex 0000000..fd5276a\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/media/rockchip-rga.txt\n@@ -0,0 +1,33 @@\n+device-tree bindings for rockchip 2D raster graphic acceleration controller (RGA)\n+\n+RGA is a standalone 2D raster graphic acceleration unit. It accelerates 2D\n+graphics operations, such as point/line drawing, image scaling, rotation,\n+BitBLT, alpha blending and image blur/sharpness.\n+\n+Required properties:\n+- compatible: value should be one of the following\n+\t\t\"rockchip,rk3288-rga\";\n+\t\t\"rockchip,rk3399-rga\";\n+\n+- interrupts: RGA interrupt specifier.\n+\n+- clocks: phandle to RGA sclk/hclk/aclk clocks\n+\n+- clock-names: should be \"aclk\", \"hclk\" and \"sclk\"\n+\n+- resets: Must contain an entry for each entry in reset-names.\n+ See ../reset/reset.txt for details.\n+- reset-names: should be \"core\", \"axi\" and \"ahb\"\n+\n+Example:\n+SoC-specific DT entry:\n+\trga: rga@ff680000 {\n+\t\tcompatible = \"rockchip,rk3399-rga\";\n+\t\treg = <0xff680000 0x10000>;\n+\t\tinterrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;\n+\t\tclocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>;\n+\t\tclock-names = \"aclk\", \"hclk\", \"sclk\";\n+\n+\t\tresets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru SRST_H_RGA>;\n+\t\treset-names = \"core, \"axi\", \"ahb\";\n+\t};\n", "prefixes": [ "v8", "4/4" ] }