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GET /api/patches/811892/?format=api
{ "id": 811892, "url": "http://patchwork.ozlabs.org/api/patches/811892/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1504910713-7094-34-git-send-email-linuxram@us.ibm.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<1504910713-7094-34-git-send-email-linuxram@us.ibm.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/1504910713-7094-34-git-send-email-linuxram@us.ibm.com/", "date": "2017-09-08T22:45:13", "name": "[25/25] powerpc: Enable pkey subsystem", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "bc114669ab0b9d150be2a74a4037659fce5ac61b", "submitter": { "id": 2667, "url": "http://patchwork.ozlabs.org/api/people/2667/?format=api", "name": "Ram Pai", "email": "linuxram@us.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1504910713-7094-34-git-send-email-linuxram@us.ibm.com/mbox/", "series": [ { "id": 2303, "url": "http://patchwork.ozlabs.org/api/series/2303/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=2303", "date": "2017-09-08T22:44:40", "name": "powerpc: Free up RPAGE_RSV bits", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/2303/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/811892/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/811892/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xpvF2178nz9sBZ\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSat, 9 Sep 2017 09:49:42 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xpvF16zXMzDrJj\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSat, 9 Sep 2017 09:49:41 +1000 (AEST)", "from mail-qt0-x244.google.com (mail-qt0-x244.google.com\n\t[IPv6:2607:f8b0:400d:c0d::244])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xpssC66nWzDrcr\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tSat, 9 Sep 2017 08:47:27 +1000 (AEST)", "by mail-qt0-x244.google.com with SMTP id q8so2360567qtb.1\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tFri, 08 Sep 2017 15:47:27 -0700 (PDT)", "from localhost.localdomain (50-39-103-96.bvtn.or.frontiernet.net.\n\t[50.39.103.96]) by smtp.gmail.com with ESMTPSA id\n\tx124sm2033726qka.85.2017.09.08.15.47.24\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tFri, 08 Sep 2017 15:47:25 -0700 (PDT)" ], "Authentication-Results": [ "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"m66jOis5\"; dkim-atps=neutral", "lists.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"m66jOis5\"; dkim-atps=neutral", "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gmail.com\n\t(client-ip=2607:f8b0:400d:c0d::244; helo=mail-qt0-x244.google.com;\n\tenvelope-from=ram.n.pai@gmail.com; receiver=<UNKNOWN>)", "lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"m66jOis5\"; dkim-atps=neutral" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=sender:from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=1alc4UXLDpxmRqhsGTk/QqG8MqG2c6RMcnDzfpZrtKU=;\n\tb=m66jOis52jktAKaU2Ye3BY/VB+ZsvsOFFlO125nwbcdCmBXdQFTW537uzuleNtKdMB\n\t1R5gBMKWLLQnIsDQNm/pixpudpCqOtHFgGAXbuJyINkowqAxqhA4UfUZfn+1LvQQqOkw\n\tlBUnUi/1qoiqM9sAdpajPtWiIyPmX9uKrnTmTsHL4HaA17Z0u3SPpiPBk0NeAgfUGIb1\n\tK7MJy3uufFvrDtJKWRHJ6dmn2ClhVkcFojBV9qVUHjCA61umk/2E+dXFU+Qq0BVXQ7OX\n\ts4j41Hp8ObPe1GmV1HwIYYVVrufu4+nWo9bOEYiixfYPY7dosMmOxeaGGGn2I4NOxRk5\n\ta+mw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:sender:from:to:cc:subject:date:message-id\n\t:in-reply-to:references;\n\tbh=1alc4UXLDpxmRqhsGTk/QqG8MqG2c6RMcnDzfpZrtKU=;\n\tb=qjYBiu/Vkmz5v0pGean9y/XE54/VafcibwQ8eb4HYsl/PdgHldZzS8AakZ2fC6MfCG\n\tcXzHMuPGPUY2W6BsnJ2KQGvx6prGCf08e7y2IqwYgwMdpbvDYm2quQN5qJnEuD8FuH+X\n\tQxkq4KleAaHRXllYNpV/18B07VFI/wQMVI0XHZFM585YkmR8EP3CySES6cgNsZxUZQW0\n\tQPbN/IVRZnPx2ZMswQAfU1FnyFA0ocvFVrG7nzJPK7YZPFeYmyQC8E49s9qYN/1chTOx\n\t9xNcB/724YJiBaOHZx9o0GoipsagDxQ2m5SdMQ7+Vt3j5fT4ZtLIV8iQPSpF165sMNa9\n\tgdjA==", "X-Gm-Message-State": "AHPjjUg1Wx+CFtEqPtOM+r9+cKw+xRJ51foF6XEzBCdAqqfv2MOpqFNQ\n\tF5AAWiiSPAw42ZXb", "X-Google-Smtp-Source": "AOwi7QBE576mGb+3oD7toTicAIuKoKZjMydy/9GTpmWCJIun44N0hNvxLQAohCo53Jd8bEvwKJHSkg==", "X-Received": "by 10.237.33.102 with SMTP id 93mr6646701qtc.267.1504910845898; \n\tFri, 08 Sep 2017 15:47:25 -0700 (PDT)", "From": "Ram Pai <linuxram@us.ibm.com>", "To": "mpe@ellerman.id.au,\n\tlinuxppc-dev@lists.ozlabs.org", "Subject": "[PATCH 25/25] powerpc: Enable pkey subsystem", "Date": "Fri, 8 Sep 2017 15:45:13 -0700", "Message-Id": "<1504910713-7094-34-git-send-email-linuxram@us.ibm.com>", "X-Mailer": "git-send-email 1.7.1", "In-Reply-To": "<1504910713-7094-1-git-send-email-linuxram@us.ibm.com>", "References": "<1504910713-7094-1-git-send-email-linuxram@us.ibm.com>", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "ebiederm@xmission.com, linuxram@us.ibm.com, mhocko@kernel.org,\n\tpaulus@samba.org, aneesh.kumar@linux.vnet.ibm.com,\n\tbauerman@linux.vnet.ibm.com, khandual@linux.vnet.ibm.com", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "PAPR defines 'ibm,processor-storage-keys' property. It exports\ntwo values.The first value indicates the number of data-access\nkeys and the second indicates the number of instruction-access\nkeys. Though this hints that keys can be either data access\nor instruction access only,that is not the case in reality.Any\nkey can be of any kind. This patch adds all the keys and uses\nthat as the total number of keys available to us.\n\nNon PAPR platforms do not define this property in the device\ntree yet. Here, we hardcode CPUs that support pkey by\nconsulting PowerISA3.0\n\nSigned-off-by: Ram Pai <linuxram@us.ibm.com>\n---\n arch/powerpc/include/asm/cputable.h | 15 ++++++++++-----\n arch/powerpc/include/asm/mmu_context.h | 1 +\n arch/powerpc/include/asm/pkeys.h | 21 +++++++++++++++++++++\n arch/powerpc/kernel/prom.c | 19 +++++++++++++++++++\n arch/powerpc/mm/pkeys.c | 19 ++++++++++++++-----\n 5 files changed, 65 insertions(+), 10 deletions(-)", "diff": "diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h\nindex a9bf921..31ed1d2 100644\n--- a/arch/powerpc/include/asm/cputable.h\n+++ b/arch/powerpc/include/asm/cputable.h\n@@ -214,7 +214,9 @@ enum {\n #define CPU_FTR_DAWR\t\t\tLONG_ASM_CONST(0x0400000000000000)\n #define CPU_FTR_DABRX\t\t\tLONG_ASM_CONST(0x0800000000000000)\n #define CPU_FTR_PMAO_BUG\t\tLONG_ASM_CONST(0x1000000000000000)\n+#define CPU_FTR_PKEY\t\t\tLONG_ASM_CONST(0x2000000000000000)\n #define CPU_FTR_POWER9_DD1\t\tLONG_ASM_CONST(0x4000000000000000)\n+#define CPU_FTR_PKEY_EXECUTE\t\tLONG_ASM_CONST(0x8000000000000000)\n \n #ifndef __ASSEMBLY__\n \n@@ -435,7 +437,8 @@ enum {\n \t CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \\\n \t CPU_FTR_MMCRA | CPU_FTR_SMT | \\\n \t CPU_FTR_COHERENT_ICACHE | CPU_FTR_PURR | \\\n-\t CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_DABRX)\n+\t CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_DABRX | \\\n+\t CPU_FTR_PKEY)\n #define CPU_FTRS_POWER6 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \\\n \t CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \\\n \t CPU_FTR_MMCRA | CPU_FTR_SMT | \\\n@@ -443,7 +446,7 @@ enum {\n \t CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \\\n \t CPU_FTR_DSCR | CPU_FTR_UNALIGNED_LD_STD | \\\n \t CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_CFAR | \\\n-\t CPU_FTR_DABRX)\n+\t CPU_FTR_DABRX | CPU_FTR_PKEY)\n #define CPU_FTRS_POWER7 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \\\n \t CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_ARCH_206 |\\\n \t CPU_FTR_MMCRA | CPU_FTR_SMT | \\\n@@ -452,7 +455,7 @@ enum {\n \t CPU_FTR_DSCR | CPU_FTR_SAO | CPU_FTR_ASYM_SMT | \\\n \t CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \\\n \t CPU_FTR_ICSWX | CPU_FTR_CFAR | CPU_FTR_HVMODE | \\\n-\t CPU_FTR_VMX_COPY | CPU_FTR_HAS_PPR | CPU_FTR_DABRX)\n+\t CPU_FTR_VMX_COPY | CPU_FTR_HAS_PPR | CPU_FTR_DABRX | CPU_FTR_PKEY)\n #define CPU_FTRS_POWER8 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \\\n \t CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_ARCH_206 |\\\n \t CPU_FTR_MMCRA | CPU_FTR_SMT | \\\n@@ -462,7 +465,8 @@ enum {\n \t CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \\\n \t CPU_FTR_ICSWX | CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \\\n \t CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_DAWR | \\\n-\t CPU_FTR_ARCH_207S | CPU_FTR_TM_COMP)\n+\t CPU_FTR_ARCH_207S | CPU_FTR_TM_COMP | CPU_FTR_PKEY |\\\n+\t CPU_FTR_PKEY_EXECUTE)\n #define CPU_FTRS_POWER8E (CPU_FTRS_POWER8 | CPU_FTR_PMAO_BUG)\n #define CPU_FTRS_POWER8_DD1 (CPU_FTRS_POWER8 & ~CPU_FTR_DBELL)\n #define CPU_FTRS_POWER9 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \\\n@@ -474,7 +478,8 @@ enum {\n \t CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \\\n \t CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \\\n \t CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_DAWR | \\\n-\t CPU_FTR_ARCH_207S | CPU_FTR_TM_COMP | CPU_FTR_ARCH_300)\n+\t CPU_FTR_ARCH_207S | CPU_FTR_TM_COMP | CPU_FTR_ARCH_300 | \\\n+\t CPU_FTR_PKEY | CPU_FTR_PKEY_EXECUTE)\n #define CPU_FTRS_POWER9_DD1 ((CPU_FTRS_POWER9 | CPU_FTR_POWER9_DD1) & \\\n \t\t\t (~CPU_FTR_SAO))\n #define CPU_FTRS_CELL\t(CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \\\ndiff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h\nindex 9a56355..98ac713 100644\n--- a/arch/powerpc/include/asm/mmu_context.h\n+++ b/arch/powerpc/include/asm/mmu_context.h\n@@ -148,6 +148,7 @@ static inline bool arch_vma_access_permitted(struct vm_area_struct *vma,\n \n #define pkey_initialize()\n #define pkey_mm_init(mm)\n+#define pkey_mmu_values(total_data, total_execute)\n \n static inline int vma_pkey(struct vm_area_struct *vma)\n {\ndiff --git a/arch/powerpc/include/asm/pkeys.h b/arch/powerpc/include/asm/pkeys.h\nindex a0111de..baac435 100644\n--- a/arch/powerpc/include/asm/pkeys.h\n+++ b/arch/powerpc/include/asm/pkeys.h\n@@ -1,9 +1,12 @@\n #ifndef _ASM_PPC64_PKEYS_H\n #define _ASM_PPC64_PKEYS_H\n \n+#include <asm/firmware.h>\n+\n extern bool pkey_inited;\n extern bool pkey_execute_disable_support;\n extern int pkeys_total; /* total pkeys as per device tree */\n+extern int pkey_total_execute; /* total execute pkeys as per device tree */\n extern u32 initial_allocation_mask;/* bits set for reserved keys */\n \n /*\n@@ -223,6 +226,24 @@ static inline void pkey_mm_init(struct mm_struct *mm)\n \tmm->context.execute_only_pkey = -1;\n }\n \n+static inline void pkey_mmu_values(int total_data, int total_execute)\n+{\n+\t/*\n+\t * since any pkey can be used for data or execute, we\n+\t * will just treat all keys as equal and track them\n+\t * as one entity.\n+\t */\n+\tpkeys_total = total_data;\n+}\n+\n+static inline bool pkey_mmu_enabled(void)\n+{\n+\tif (firmware_has_feature(FW_FEATURE_LPAR))\n+\t\treturn pkeys_total;\n+\telse\n+\t\treturn cpu_has_feature(CPU_FTR_PKEY);\n+}\n+\n extern void thread_pkey_regs_save(struct thread_struct *thread);\n extern void thread_pkey_regs_restore(struct thread_struct *new_thread,\n \t\t\tstruct thread_struct *old_thread);\ndiff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c\nindex f830562..f61da26 100644\n--- a/arch/powerpc/kernel/prom.c\n+++ b/arch/powerpc/kernel/prom.c\n@@ -35,6 +35,7 @@\n #include <linux/of_fdt.h>\n #include <linux/libfdt.h>\n #include <linux/cpu.h>\n+#include <linux/pkeys.h>\n \n #include <asm/prom.h>\n #include <asm/rtas.h>\n@@ -228,6 +229,23 @@ static void __init check_cpu_pa_features(unsigned long node)\n \t\t ibm_pa_features, ARRAY_SIZE(ibm_pa_features));\n }\n \n+static void __init check_cpu_pkey_feature(unsigned long node)\n+{\n+\tconst __be32 *ftrs;\n+\tint len, total_data, total_execute;\n+\n+\tftrs = of_get_flat_dt_prop(node,\n+\t\t\"ibm,processor-storage-keys\", &len);\n+\tif (ftrs == NULL)\n+\t\treturn;\n+\n+\tlen /= sizeof(int);\n+\ttotal_execute = (len >= 2) ? be32_to_cpu(ftrs[1]) : 0;\n+\ttotal_data = (len >= 1) ? be32_to_cpu(ftrs[0]) : 0;\n+\tpkey_mmu_values(total_data, total_execute);\n+}\n+\n+\n #ifdef CONFIG_PPC_STD_MMU_64\n static void __init init_mmu_slb_size(unsigned long node)\n {\n@@ -391,6 +409,7 @@ static int __init early_init_dt_scan_cpus(unsigned long node,\n \n \t\tcheck_cpu_feature_properties(node);\n \t\tcheck_cpu_pa_features(node);\n+\t\tcheck_cpu_pkey_feature(node);\n \t}\n \n \tidentical_pvr_fixup(node);\ndiff --git a/arch/powerpc/mm/pkeys.c b/arch/powerpc/mm/pkeys.c\nindex 21c3b42..c3ed473 100644\n--- a/arch/powerpc/mm/pkeys.c\n+++ b/arch/powerpc/mm/pkeys.c\n@@ -37,15 +37,24 @@ void __init pkey_initialize(void)\n \t * line will enable it.\n \t */\n \tpkey_inited = false;\n+\tif (pkey_mmu_enabled())\n+\t\tpkey_inited = !radix_enabled();\n+\tif (!pkey_inited)\n+\t\treturn;\n \n \t/*\n-\t * disable execute_disable support for now.\n-\t * A patch further down will enable it.\n+\t * the device tree cannot be relied on for \n+\t * execute_disable support. Hence we depend\n+\t * on CPU FTR.\n \t */\n-\tpkey_execute_disable_support = false;\n+\tpkey_execute_disable_support = cpu_has_feature(CPU_FTR_PKEY_EXECUTE);\n \n-\t/* Lets assume 32 keys */\n-\tpkeys_total = 32;\n+\t/*\n+\t * Lets assume 32 keys if we are not told\n+\t * the number of pkeys.\n+\t */\n+\tif (!pkeys_total)\n+\t\tpkeys_total = 32;\n \n #ifdef CONFIG_PPC_4K_PAGES\n \t/*\n", "prefixes": [ "25/25" ] }