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{
    "id": 811553,
    "url": "http://patchwork.ozlabs.org/api/patches/811553/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/1504873388-29195-3-git-send-email-vjonnal@xilinx.com/",
    "project": {
        "id": 28,
        "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api",
        "name": "Linux PCI development",
        "link_name": "linux-pci",
        "list_id": "linux-pci.vger.kernel.org",
        "list_email": "linux-pci@vger.kernel.org",
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    "msgid": "<1504873388-29195-3-git-send-email-vjonnal@xilinx.com>",
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    "date": "2017-09-08T12:23:04",
    "name": "[v2,2/5] PCI:xilinx-nwl: Correcting Styling checks",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": false,
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    "submitter": {
        "id": 72127,
        "url": "http://patchwork.ozlabs.org/api/people/72127/?format=api",
        "name": "Ravi Shankar Jonnalagadda",
        "email": "venkata.ravi.jonnalagadda@xilinx.com"
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    "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/1504873388-29195-3-git-send-email-vjonnal@xilinx.com/mbox/",
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            "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=2190",
            "date": "2017-09-08T12:23:04",
            "name": "dmaengine: ZynqMP PS PCIe DMA driver",
            "version": 2,
            "mbox": "http://patchwork.ozlabs.org/series/2190/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/811553/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/811553/checks/",
    "tags": {},
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        "From": "Ravi Shankar Jonnalagadda <venkata.ravi.jonnalagadda@xilinx.com>",
        "To": "<vinod.koul@intel.com>, <robh+dt@kernel.org>,\n\t<mark.rutland@arm.com>, <michal.simek@xilinx.com>,\n\t<soren.brinkmann@xilinx.com>, <dan.j.williams@intel.com>,\n\t<bhelgaas@google.com>, <vjonnal@xilinx.com>,\n\t<lorenzo.pieralisi@arm.com>, <bharat.kumar.gogada@xilinx.com>,\n\t<dmaengine@vger.kernel.org>, <devicetree@vger.kernel.org>,\n\t<linux-arm-kernel@lists.infradead.org>,\n\t<linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,\n\t<rgummal@xilinx.com>",
        "Subject": "[PATCH v2 2/5] PCI:xilinx-nwl: Correcting Styling checks",
        "Date": "Fri, 8 Sep 2017 17:53:04 +0530",
        "Message-ID": "<1504873388-29195-3-git-send-email-vjonnal@xilinx.com>",
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    },
    "content": "Correcting Style checks thrown by checkpatch scripts\n\nSigned-off-by: Ravi Shankar Jonnalagadda <vjonnal@xilinx.com>\nSigned-off-by: RaviKiran Gummaluri <rgummal@xilinx.com>\n---\n drivers/pci/host/pcie-xilinx-nwl.c | 8 ++++----\n 1 file changed, 4 insertions(+), 4 deletions(-)",
    "diff": "diff --git a/drivers/pci/host/pcie-xilinx-nwl.c b/drivers/pci/host/pcie-xilinx-nwl.c\nindex 5766582..3c62e3d 100644\n--- a/drivers/pci/host/pcie-xilinx-nwl.c\n+++ b/drivers/pci/host/pcie-xilinx-nwl.c\n@@ -506,15 +506,15 @@ static int nwl_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,\n \n \tfor (i = 0; i < nr_irqs; i++) {\n \t\tirq_domain_set_info(domain, virq + i, bit + i, &nwl_irq_chip,\n-\t\t\t\tdomain->host_data, handle_simple_irq,\n-\t\t\t\tNULL, NULL);\n+\t\t\t\t    domain->host_data, handle_simple_irq,\n+\t\t\t\t    NULL, NULL);\n \t}\n \tmutex_unlock(&msi->lock);\n \treturn 0;\n }\n \n static void nwl_irq_domain_free(struct irq_domain *domain, unsigned int virq,\n-\t\t\t\t\tunsigned int nr_irqs)\n+\t\t\t\tunsigned int nr_irqs)\n {\n \tstruct irq_data *data = irq_domain_get_irq_data(domain, virq);\n \tstruct nwl_pcie *pcie = irq_data_get_irq_chip_data(data);\n@@ -767,7 +767,6 @@ static int nwl_pcie_bridge_init(struct nwl_pcie *pcie)\n \t/* Enable all misc interrupts */\n \tnwl_bridge_writel(pcie, MSGF_MISC_SR_MASKALL, MSGF_MISC_MASK);\n \n-\n \t/* Disable all legacy interrupts */\n \tnwl_bridge_writel(pcie, (u32)~MSGF_LEG_SR_MASKALL, MSGF_LEG_MASK);\n \n@@ -932,4 +931,5 @@ static struct platform_driver nwl_pcie_driver = {\n \t},\n \t.probe = nwl_pcie_probe,\n };\n+\n builtin_platform_driver(nwl_pcie_driver);\n",
    "prefixes": [
        "v2",
        "2/5"
    ]
}