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GET /api/patches/811065/?format=api
{ "id": 811065, "url": "http://patchwork.ozlabs.org/api/patches/811065/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170907145148.24398-7-npiggin@gmail.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20170907145148.24398-7-npiggin@gmail.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20170907145148.24398-7-npiggin@gmail.com/", "date": "2017-09-07T14:51:46", "name": "[RFC,6/8] powerpc/64s/radix: Optimize flush_tlb_range", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "276853230823f9df529669fbbcc7f99641eb049b", "submitter": { "id": 69518, "url": "http://patchwork.ozlabs.org/api/people/69518/?format=api", "name": "Nicholas Piggin", "email": "npiggin@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170907145148.24398-7-npiggin@gmail.com/mbox/", "series": [ { "id": 2010, "url": "http://patchwork.ozlabs.org/api/series/2010/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=2010", "date": "2017-09-07T14:51:40", "name": "Further radix TLB flush optimisations", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/2010/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/811065/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/811065/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xp3fM43cqz9s7c\n\tfor <patchwork-incoming@ozlabs.org>;\n\tFri, 8 Sep 2017 01:05:15 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xp3fM2WHpzDrWZ\n\tfor <patchwork-incoming@ozlabs.org>;\n\tFri, 8 Sep 2017 01:05:15 +1000 (AEST)", "from mail-pg0-x242.google.com (mail-pg0-x242.google.com\n\t[IPv6:2607:f8b0:400e:c05::242])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xp3Mm4CdWzDrXN\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tFri, 8 Sep 2017 00:52:36 +1000 (AEST)", "by mail-pg0-x242.google.com with SMTP id m9so5058194pgd.0\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tThu, 07 Sep 2017 07:52:36 -0700 (PDT)", "from roar.au.ibm.com (203-219-56-202.tpgi.com.au. [203.219.56.202])\n\tby smtp.gmail.com with ESMTPSA id\n\ta6sm4642791pfa.76.2017.09.07.07.52.31\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tThu, 07 Sep 2017 07:52:33 -0700 (PDT)" ], "Authentication-Results": [ "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"tRw+04Oz\"; dkim-atps=neutral", "lists.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"tRw+04Oz\"; dkim-atps=neutral", "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gmail.com\n\t(client-ip=2607:f8b0:400e:c05::242; helo=mail-pg0-x242.google.com;\n\tenvelope-from=npiggin@gmail.com; receiver=<UNKNOWN>)", "lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"tRw+04Oz\"; dkim-atps=neutral" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=iYSP55WzqfkovJb0arC7l1Ra5u10EnLIgc6ntlZmHLw=;\n\tb=tRw+04Oz6SPlAA2J/BRUBrT37UBzN7DQaPZn+Cr4VkqiTUkPY8p/l2zG6yQZIIHdbx\n\tqhFGALxdrUjVlpZAqMLn0FVRKg/JeIvVbcQox+2C1ibPTmXLN9v9alj5OG/TfCHAEyJZ\n\t1T/i6JNIfc8b6c01j70j7UZG+XoTssJt9OFMBLJVPwPx2/vwnyXQXAGDDc9PbXHjulai\n\t0BD9z3dlq3ChEMzjZTS2DdXapBn/IoyziaKuDfj5ya1RibTIKG3KxyyIrpgaqxHuqWhA\n\tPxh1ZCX+++5ggF++ieKN9qFWxBQvlimODnTj6gqbgmW0k81PBSYC+LXKdz7PAPUGOtXc\n\t4L2Q==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=iYSP55WzqfkovJb0arC7l1Ra5u10EnLIgc6ntlZmHLw=;\n\tb=TSEatdqDZxBvlVWkS1sPBNHNgMwBdKyoNM+Z7cWc7GjnxeizFc7fGx3zS1/ZUpYYOH\n\tWC79z0mR0/45PMi2Nl3TjlL0bsOl4kxilzSdlvE/jmpB7smcWo4mi0UDiY9wd7+UkL6O\n\tpB3RcELn0yKNsHGZ91Mi4995unI3npKHOl1KDJxNZeqfAUO0rOCfFN1y9CbU7XH3DLPh\n\txXVmBPa7vSTRyWebIODgMxl+OAcXMLiAAE0EzwPt1t4CD9lAAbF1+lD3h6TwYjK8ad4i\n\tSd8KZq0Jyzmw689p7cWntHqvo8VXjVZLiBO/+Yo9jNTc1UVP+yGtt6zHZ5x8d0yWdBG6\n\tQYww==", "X-Gm-Message-State": "AHPjjUhdc+m7J3t/rgYQOjY3Tz4Xe0hIN3cJOHt7GkrlNX8QMlvKyrdg\n\t2r2sw61dAC9saqjR", "X-Google-Smtp-Source": "ADKCNb4/og7gX1hz0BEtiY3AyhWi2zOu/IqFScLeU64tRLPWaVSHbYW5GA/kD+rd/DejxTLoWAL8dg==", "X-Received": "by 10.99.127.78 with SMTP id p14mr2932428pgn.159.1504795954348; \n\tThu, 07 Sep 2017 07:52:34 -0700 (PDT)", "From": "Nicholas Piggin <npiggin@gmail.com>", "To": "linuxppc-dev@lists.ozlabs.org", "Subject": "[RFC PATCH 6/8] powerpc/64s/radix: Optimize flush_tlb_range", "Date": "Fri, 8 Sep 2017 00:51:46 +1000", "Message-Id": "<20170907145148.24398-7-npiggin@gmail.com>", "X-Mailer": "git-send-email 2.13.3", "In-Reply-To": "<20170907145148.24398-1-npiggin@gmail.com>", "References": "<20170907145148.24398-1-npiggin@gmail.com>", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "\"Aneesh Kumar K . V\" <aneesh.kumar@linux.vnet.ibm.com>,\n\tNicholas Piggin <npiggin@gmail.com>, Anton Blanchard <anton@samba.org>", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "Currently for radix, flush_tlb_range flushes the entire PID, because\nwe don't know about THP vs regular pages. This is quite sub-optimal\nfor small mremap/mprotect/change_protection.\n\nInstead, implement this with two range flush passes, one for each\npage size. If the small page range flush ended up doing the full PID\ninvalidation, then avoid the second flush. If not, the second flush\nis an order of magnitude or two fewer operations than the first, so\nit's relatively insignificant.\n\nThere is still room for improvement here with some changes to generic\nAPIs, particularly if there are a lot of huge pages in place.\n\nSigned-off-by: Nicholas Piggin <npiggin@gmail.com>\n---\n .../powerpc/include/asm/book3s/64/tlbflush-radix.h | 2 +-\n arch/powerpc/mm/tlb-radix.c | 52 +++++++++++++++++-----\n 2 files changed, 42 insertions(+), 12 deletions(-)", "diff": "diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h\nindex 9b433a624bf3..b12460b306a7 100644\n--- a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h\n+++ b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h\n@@ -12,7 +12,7 @@ static inline int mmu_get_ap(int psize)\n \n extern void radix__flush_hugetlb_tlb_range(struct vm_area_struct *vma,\n \t\t\t\t\t unsigned long start, unsigned long end);\n-extern void radix__flush_tlb_range_psize(struct mm_struct *mm, unsigned long start,\n+extern bool radix__flush_tlb_range_psize(struct mm_struct *mm, unsigned long start,\n \t\t\t\t\t unsigned long end, int psize);\n extern void radix__flush_pmd_tlb_range(struct vm_area_struct *vma,\n \t\t\t\t unsigned long start, unsigned long end);\ndiff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c\nindex 8ec59b57d46c..1b0cac656680 100644\n--- a/arch/powerpc/mm/tlb-radix.c\n+++ b/arch/powerpc/mm/tlb-radix.c\n@@ -299,17 +299,40 @@ void radix__flush_tlb_kernel_range(unsigned long start, unsigned long end)\n }\n EXPORT_SYMBOL(radix__flush_tlb_kernel_range);\n \n-/*\n- * Currently, for range flushing, we just do a full mm flush. Because\n- * we use this in code path where we don' track the page size.\n- */\n void radix__flush_tlb_range(struct vm_area_struct *vma, unsigned long start,\n \t\t unsigned long end)\n \n {\n \tstruct mm_struct *mm = vma->vm_mm;\n+\tbool full;\n \n-\tradix__flush_tlb_mm(mm);\n+#ifdef CONFIG_HUGETLB_PAGE\n+\tif (is_vm_hugetlb_page(vma))\n+\t\treturn radix__flush_hugetlb_tlb_range(vma, start, end);\n+#endif\n+\tfull = radix__flush_tlb_range_psize(mm, start, end, mmu_virtual_psize);\n+#ifdef CONFIG_TRANSPARENT_HUGEPAGE\n+\tif (!full) {\n+\t\t/*\n+\t\t * If the small page flush was not a full PID flush, we have\n+\t\t * to do a second pass to flush transparent huge pages. This\n+\t\t * will be a far smaller number of invalidates, so it's not\n+\t\t * worth calculating.\n+\t\t *\n+\t\t * Range flushes are still sub-optimal for cases of all or\n+\t\t * no hugepages (moreso the former), which should be improved\n+\t\t * by changing the flush API.\n+\t\t */\n+\t\tunsigned long hstart, hend;\n+\t\thstart = (start + HPAGE_PMD_SIZE - 1) >> HPAGE_PMD_SHIFT;\n+\t\thend = end >> HPAGE_PMD_SHIFT;\n+\t\tif (hstart != hend) {\n+\t\t\thstart <<= HPAGE_PMD_SHIFT;\n+\t\t\thend <<= HPAGE_PMD_SHIFT;\n+\t\t\tradix__flush_tlb_range_psize(mm, hstart, hend, MMU_PAGE_2M);\n+\t\t}\n+\t}\n+#endif\n }\n EXPORT_SYMBOL(radix__flush_tlb_range);\n \n@@ -361,32 +384,39 @@ void radix__tlb_flush(struct mmu_gather *tlb)\n static unsigned long tlb_single_page_flush_ceiling __read_mostly = 33;\n static unsigned long tlb_local_single_page_flush_ceiling __read_mostly = POWER9_TLB_SETS_RADIX * 2;\n \n-void radix__flush_tlb_range_psize(struct mm_struct *mm, unsigned long start,\n+bool radix__flush_tlb_range_psize(struct mm_struct *mm, unsigned long start,\n \t\t\t\t unsigned long end, int psize)\n {\n \tunsigned long pid;\n \tunsigned int page_shift = mmu_psize_defs[psize].shift;\n \tunsigned long page_size = 1UL << page_shift;\n+\tbool full = false;\n \n \tpid = mm ? mm->context.id : 0;\n \tif (unlikely(pid == MMU_NO_CONTEXT))\n-\t\treturn;\n+\t\treturn full;\n \n \tpreempt_disable();\n \tif (mm_is_thread_local(mm)) {\n \t\tif (end == TLB_FLUSH_ALL || ((end - start) >> page_shift) >\n-\t\t\t\t\ttlb_local_single_page_flush_ceiling)\n+\t\t\t\t\ttlb_local_single_page_flush_ceiling) {\n+\t\t\tfull = true;\n \t\t\t_tlbiel_pid(pid, RIC_FLUSH_TLB);\n-\t\telse\n+\t\t} else {\n \t\t\t_tlbiel_va_range(start, end, pid, page_size, psize);\n+\t\t}\n \t} else {\n \t\tif (end == TLB_FLUSH_ALL || ((end - start) >> page_shift) >\n-\t\t\t\t\ttlb_single_page_flush_ceiling)\n+\t\t\t\t\ttlb_single_page_flush_ceiling) {\n+\t\t\tfull = true;\n \t\t\t_tlbie_pid(pid, RIC_FLUSH_TLB);\n-\t\telse\n+\t\t} else {\n \t\t\t_tlbie_va_range(start, end, pid, page_size, psize);\n+\t\t}\n \t}\n \tpreempt_enable();\n+\n+\treturn full;\n }\n \n #ifdef CONFIG_TRANSPARENT_HUGEPAGE\n", "prefixes": [ "RFC", "6/8" ] }