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GET /api/patches/811064/?format=api
{ "id": 811064, "url": "http://patchwork.ozlabs.org/api/patches/811064/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170907145148.24398-6-npiggin@gmail.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<20170907145148.24398-6-npiggin@gmail.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/20170907145148.24398-6-npiggin@gmail.com/", "date": "2017-09-07T14:51:45", "name": "[RFC,5/8] powerpc/64s/radix: Introduce local single page ceiling for TLB range flush", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "bd5a3595ba7073eaeafea33ac605304f34ff4931", "submitter": { "id": 69518, "url": "http://patchwork.ozlabs.org/api/people/69518/?format=api", "name": "Nicholas Piggin", "email": "npiggin@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170907145148.24398-6-npiggin@gmail.com/mbox/", "series": [ { "id": 2010, "url": "http://patchwork.ozlabs.org/api/series/2010/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=2010", "date": "2017-09-07T14:51:40", "name": "Further radix TLB flush optimisations", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/2010/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/811064/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/811064/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xp3c10vSWz9t2R\n\tfor <patchwork-incoming@ozlabs.org>;\n\tFri, 8 Sep 2017 01:03:13 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xp3c06nclzDqF4\n\tfor <patchwork-incoming@ozlabs.org>;\n\tFri, 8 Sep 2017 01:03:12 +1000 (AEST)", "from mail-pf0-x244.google.com (mail-pf0-x244.google.com\n\t[IPv6:2607:f8b0:400e:c00::244])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xp3Mh6KRzzDrX5\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tFri, 8 Sep 2017 00:52:32 +1000 (AEST)", "by mail-pf0-x244.google.com with SMTP id g13so4277569pfm.2\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tThu, 07 Sep 2017 07:52:32 -0700 (PDT)", "from roar.au.ibm.com (203-219-56-202.tpgi.com.au. [203.219.56.202])\n\tby smtp.gmail.com with ESMTPSA id\n\ta6sm4642791pfa.76.2017.09.07.07.52.27\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tThu, 07 Sep 2017 07:52:29 -0700 (PDT)" ], "Authentication-Results": [ "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"sibHLZrc\"; dkim-atps=neutral", "lists.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"sibHLZrc\"; dkim-atps=neutral", "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gmail.com\n\t(client-ip=2607:f8b0:400e:c00::244; helo=mail-pf0-x244.google.com;\n\tenvelope-from=npiggin@gmail.com; receiver=<UNKNOWN>)", "lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"sibHLZrc\"; dkim-atps=neutral" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=KLOK9UO01Ygd9O7yKf9WUdV9tD7wOX+INybDZQKY+qo=;\n\tb=sibHLZrch5mcd0iuPro+7SoUVc+ErbIDZPMUOGIokuOlBQWfqqBlbOEKhvFXJ6j3Mu\n\ttjdXXBNi5W4iVVd/trEG6fl+iqAaplTcG1zs5Lp99DHEp36NpjrtWO1lvwnq36VjwmcR\n\tHwqMR90r+46zLMz07Lsb5hKgEZXHXivg329jB5Su2PCa/BEKZz5Zk4UiuEEcSRB7I5uO\n\tfn7l8ofMEOyxIWwzUhLkbDJggivZtDFuiEeNnSLQmJojjfIBx981DFqRZyTysJ6eutsR\n\trJBIvOi16ezMwd8lk6BUcY2UFS2gSc165rY5qnQGeVx5JGSL3/fNOYo9FMZ0jtxTbS2Y\n\tK54A==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=KLOK9UO01Ygd9O7yKf9WUdV9tD7wOX+INybDZQKY+qo=;\n\tb=QOI92BHtZ3g9421YAmBKWUPaQmp96fDU1YKmOprppa6zsBcx8CCsZhdZJdEWsINB7P\n\t6MOJGrLZvhzGX/LLejluBB/33QcjCn9B0fyySRTCp07fwzvoTMpTyu6EMG6kXU0yH7Gn\n\tvMD5xvrQFhoyOkYIdOKl2QjgNiW4bhUVlDFU+ecPKkqSfm62EEAdvGBLNIEw0rM+55Zd\n\tWeAp5ASmqMBz1xmdqve2YJDIiL9UGnS+SemwTqRolucgYvXxkM9x9r4Ybzz30ezwD8mm\n\tO6zMH8zcHREoeTw2ci+sUydsm4ZKSYhbs9EYqTqmKT4+br/Cj7awOUKTunFEB5j3cMwU\n\t8RJw==", "X-Gm-Message-State": "AHPjjUgSI62Q7skS7T/QDJ4TfW68d+L7F4WVjI8ycn9dd9N2urskT1E3\n\tFrtJasV4OnQZjbrA", "X-Google-Smtp-Source": "ADKCNb7Jq0c8DRArLtQPG7nw/XQ/TC+scT8c2OrnZyAjgijlKIaRGKyQbRspSgMoVrB+5YRYfES75g==", "X-Received": "by 10.84.194.131 with SMTP id h3mr3251495pld.250.1504795950668; \n\tThu, 07 Sep 2017 07:52:30 -0700 (PDT)", "From": "Nicholas Piggin <npiggin@gmail.com>", "To": "linuxppc-dev@lists.ozlabs.org", "Subject": "[RFC PATCH 5/8] powerpc/64s/radix: Introduce local single page\n\tceiling for TLB range flush", "Date": "Fri, 8 Sep 2017 00:51:45 +1000", "Message-Id": "<20170907145148.24398-6-npiggin@gmail.com>", "X-Mailer": "git-send-email 2.13.3", "In-Reply-To": "<20170907145148.24398-1-npiggin@gmail.com>", "References": "<20170907145148.24398-1-npiggin@gmail.com>", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "\"Aneesh Kumar K . V\" <aneesh.kumar@linux.vnet.ibm.com>,\n\tNicholas Piggin <npiggin@gmail.com>, Anton Blanchard <anton@samba.org>", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "The single page flush ceiling is the cut-off point at which we switch\nfrom invalidating individual pages, to invalidating the entire process\naddress space in response to a range flush.\n\nIntroduce a local variant of this heuristic because local and global\ntlbie have significantly different properties:\n- Local tlbiel requires 128 instructions to invalidate a PID, global\n tlbie only 1 instruction.\n- Global tlbie instructions are expensive broadcast operations.\n\nThe local ceiling has been made much higher, 2x the number of\ninstructions required to invalidate the entire PID (this has not\nyet been benchmarked in detail).\n---\n arch/powerpc/mm/tlb-radix.c | 49 +++++++++++++++++++++++----------------------\n 1 file changed, 25 insertions(+), 24 deletions(-)", "diff": "diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c\nindex 1d3cbc01596d..8ec59b57d46c 100644\n--- a/arch/powerpc/mm/tlb-radix.c\n+++ b/arch/powerpc/mm/tlb-radix.c\n@@ -348,35 +348,41 @@ void radix__tlb_flush(struct mmu_gather *tlb)\n }\n \n #define TLB_FLUSH_ALL -1UL\n+\n /*\n- * Number of pages above which we will do a bcast tlbie. Just a\n- * number at this point copied from x86\n+ * Number of pages above which we invalidate the entire PID rather than\n+ * flush individual pages, for local and global flushes respectively.\n+ *\n+ * tlbie goes out to the interconnect and individual ops are more costly.\n+ * It also does not iterate over sets like the local tlbiel variant when\n+ * invalidating a full PID, so it has a far lower threshold to change from\n+ * individual page flushes to full-pid flushes.\n */\n static unsigned long tlb_single_page_flush_ceiling __read_mostly = 33;\n+static unsigned long tlb_local_single_page_flush_ceiling __read_mostly = POWER9_TLB_SETS_RADIX * 2;\n \n void radix__flush_tlb_range_psize(struct mm_struct *mm, unsigned long start,\n \t\t\t\t unsigned long end, int psize)\n {\n \tunsigned long pid;\n-\tbool local;\n-\tunsigned long page_size = 1UL << mmu_psize_defs[psize].shift;\n+\tunsigned int page_shift = mmu_psize_defs[psize].shift;\n+\tunsigned long page_size = 1UL << page_shift;\n \n \tpid = mm ? mm->context.id : 0;\n \tif (unlikely(pid == MMU_NO_CONTEXT))\n \t\treturn;\n \n \tpreempt_disable();\n-\tlocal = mm_is_thread_local(mm);\n-\tif (end == TLB_FLUSH_ALL ||\n-\t (end - start) > tlb_single_page_flush_ceiling * page_size) {\n-\t\tif (local)\n+\tif (mm_is_thread_local(mm)) {\n+\t\tif (end == TLB_FLUSH_ALL || ((end - start) >> page_shift) >\n+\t\t\t\t\ttlb_local_single_page_flush_ceiling)\n \t\t\t_tlbiel_pid(pid, RIC_FLUSH_TLB);\n \t\telse\n-\t\t\t_tlbie_pid(pid, RIC_FLUSH_TLB);\n-\n-\t} else {\n-\t\tif (local)\n \t\t\t_tlbiel_va_range(start, end, pid, page_size, psize);\n+\t} else {\n+\t\tif (end == TLB_FLUSH_ALL || ((end - start) >> page_shift) >\n+\t\t\t\t\ttlb_single_page_flush_ceiling)\n+\t\t\t_tlbie_pid(pid, RIC_FLUSH_TLB);\n \t\telse\n \t\t\t_tlbie_va_range(start, end, pid, page_size, psize);\n \t}\n@@ -387,7 +393,6 @@ void radix__flush_tlb_range_psize(struct mm_struct *mm, unsigned long start,\n void radix__flush_tlb_collapsed_pmd(struct mm_struct *mm, unsigned long addr)\n {\n \tunsigned long pid, end;\n-\tbool local;\n \n \tpid = mm ? mm->context.id : 0;\n \tif (unlikely(pid == MMU_NO_CONTEXT))\n@@ -399,21 +404,17 @@ void radix__flush_tlb_collapsed_pmd(struct mm_struct *mm, unsigned long addr)\n \t\treturn;\n \t}\n \n-\tpreempt_disable();\n-\tlocal = mm_is_thread_local(mm);\n-\t/* Otherwise first do the PWC */\n-\tif (local)\n-\t\t_tlbiel_pid(pid, RIC_FLUSH_PWC);\n-\telse\n-\t\t_tlbie_pid(pid, RIC_FLUSH_PWC);\n-\n-\t/* Then iterate the pages */\n \tend = addr + HPAGE_PMD_SIZE;\n \n-\tif (local)\n+\t/* Otherwise first do the PWC, then iterate the pages. */\n+\tpreempt_disable();\n+\tif (mm_is_thread_local(mm)) {\n+\t\t_tlbiel_pid(pid, RIC_FLUSH_PWC);\n \t\t_tlbiel_va_range(addr, end, pid, PAGE_SIZE, mmu_virtual_psize);\n-\telse\n+\t} else {\n+\t\t_tlbie_pid(pid, RIC_FLUSH_PWC);\n \t\t_tlbie_va_range(addr, end, pid, PAGE_SIZE, mmu_virtual_psize);\n+\t}\n \tpreempt_enable();\n }\n #endif /* CONFIG_TRANSPARENT_HUGEPAGE */\n", "prefixes": [ "RFC", "5/8" ] }