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GET /api/patches/810968/?format=api
{ "id": 810968, "url": "http://patchwork.ozlabs.org/api/patches/810968/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/150478202229.24662.13170185123985209854.stgit@anamdev.jf.intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<150478202229.24662.13170185123985209854.stgit@anamdev.jf.intel.com>", "list_archive_url": null, "date": "2017-09-07T11:00:22", "name": "[RFC,v3,4/6] i40e: Enable 'channel' mode in mqprio for TC configs", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "f0d2779538a9cbd706ad888774295e3c588113a7", "submitter": { "id": 68504, "url": "http://patchwork.ozlabs.org/api/people/68504/?format=api", "name": "Nambiar, Amritha", "email": "amritha.nambiar@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/150478202229.24662.13170185123985209854.stgit@anamdev.jf.intel.com/mbox/", "series": [ { "id": 1979, "url": "http://patchwork.ozlabs.org/api/series/1979/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=1979", "date": "2017-09-07T11:00:01", "name": "Configuring traffic classes via new hardware offload mechanism in tc/mqprio", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/1979/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/810968/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/810968/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.136; helo=silver.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xnyFB6P19z9s9Y\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 7 Sep 2017 21:01:34 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 60A6A2F97A;\n\tThu, 7 Sep 2017 11:01:33 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id OwWY9zFsGnT4; Thu, 7 Sep 2017 11:01:31 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id F07942F807;\n\tThu, 7 Sep 2017 11:01:30 +0000 (UTC)", "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\tby ash.osuosl.org (Postfix) with ESMTP id 0374D1C2121\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 7 Sep 2017 11:01:30 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id ECC742F807\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 7 Sep 2017 11:01:29 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id ZvU25k6HR+BZ for <intel-wired-lan@lists.osuosl.org>;\n\tThu, 7 Sep 2017 11:01:28 +0000 (UTC)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n\tby silver.osuosl.org (Postfix) with ESMTPS id 684E2239B5\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 7 Sep 2017 11:01:28 +0000 (UTC)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t07 Sep 2017 04:01:27 -0700", "from anamdev.jf.intel.com ([10.166.29.110])\n\tby orsmga002.jf.intel.com with ESMTP; 07 Sep 2017 04:01:27 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.42,357,1500966000\"; d=\"scan'208\";a=\"132750448\"", "From": "Amritha Nambiar <amritha.nambiar@intel.com>", "To": "intel-wired-lan@lists.osuosl.org, jeffrey.t.kirsher@intel.com", "Date": "Thu, 07 Sep 2017 04:00:22 -0700", "Message-ID": "<150478202229.24662.13170185123985209854.stgit@anamdev.jf.intel.com>", "In-Reply-To": "<150478158684.24662.17975701233699487888.stgit@anamdev.jf.intel.com>", "References": "<150478158684.24662.17975701233699487888.stgit@anamdev.jf.intel.com>", "User-Agent": "StGit/0.17.1-dirty", "MIME-Version": "1.0", "Cc": "netdev@vger.kernel.org", "Subject": "[Intel-wired-lan] [RFC PATCH v3 4/6] i40e: Enable 'channel' mode in\n\tmqprio for TC configs", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "The i40e driver is modified to enable the new mqprio hardware\noffload mode and factor the TCs and queue configuration by\ncreating channel VSIs. In this mode, the priority to traffic\nclass mapping and the user specified queue ranges are used\nto configure the traffic classes by setting the mode option to\n'channel'.\n\nExample:\n# tc qdisc add dev eth0 root mqprio num_tc 4\\\n map 0 0 0 0 1 2 2 3 queues 2@0 2@2 1@4 1@5\\\n hw 1 mode channel\n\n# tc qdisc show dev eth0\n\nqdisc mqprio 8038: root tc 4 map 0 0 0 0 1 2 2 3 0 0 0 0 0 0 0 0\n queues:(0:1) (2:3) (4:4) (5:5)\n mode:channel\n shaper:dcb\n\nThe HW channels created are removed and all the queue configuration\nis set to default when the qdisc is detached from the root of the\ndevice.\n\n# tc qdisc del dev eth0 root\n\nThis patch also disables setting up channels via ethtool (ethtool -L)\nwhen the TCs are configured using mqprio scheduler.\n\nThe patch also limits setting ethtool Rx flow hash indirection\n(ethtool -X eth0 equal N) to max queues configured via mqprio.\nThe Rx flow hash indirection input through ethtool should be\nvalidated so that it is within in the queue range configured via\ntc/mqprio. The bound checking is achieved by reporting the current\nrss size to the kernel when queues are configured via mqprio.\n\nExample:\n# tc qdisc add dev eth0 root mqprio num_tc 4\\\n map 0 0 0 1 0 2 3 0 queues 2@0 4@2 8@6 11@14\\\n hw 1 mode channel\n\n# ethtool -X eth0 equal 12\nCannot set RX flow hash configuration: Invalid argument\n\nv3: Changes to incorporate new mqprio mode option. Minor clean\nup of setup_tc error handling based on Shannon's comments.\nv2: Clean up __i40e_setup_tc() and i40e_setup_tc() to work\nwith Jiri's changes to the ndo_setup_tc interface which\nnow takes a type and the type_data for the offload.\nNo need to disable ATR in MQPRIO mode.\n\nSigned-off-by: Amritha Nambiar <amritha.nambiar@intel.com>\n---\n drivers/net/ethernet/intel/i40e/i40e.h | 3 \n drivers/net/ethernet/intel/i40e/i40e_ethtool.c | 8 \n drivers/net/ethernet/intel/i40e/i40e_main.c | 457 ++++++++++++++++++------\n 3 files changed, 362 insertions(+), 106 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h\nindex 2401931..ddb7292 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e.h\n@@ -54,6 +54,7 @@\n #include <linux/clocksource.h>\n #include <linux/net_tstamp.h>\n #include <linux/ptp_clock_kernel.h>\n+#include <net/pkt_cls.h>\n #include \"i40e_type.h\"\n #include \"i40e_prototype.h\"\n #include \"i40e_client.h\"\n@@ -700,6 +701,7 @@ struct i40e_vsi {\n \tenum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */\n \ts16 vf_id;\t\t/* Virtual function ID for SRIOV VSIs */\n \n+\tstruct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */\n \tstruct i40e_tc_configuration tc_config;\n \tstruct i40e_aqc_vsi_properties_data info;\n \n@@ -725,6 +727,7 @@ struct i40e_vsi {\n \tu16 cnt_q_avail;\t/* num of queues available for channel usage */\n \tu16 orig_rss_size;\n \tu16 current_rss_size;\n+\tbool reconfig_rss;\n \n \tu16 next_base_queue;\t/* next queue to be used for channel setup */\n \ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c\nindex b531aa3..3fa90a6 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c\n@@ -2652,7 +2652,7 @@ static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,\n \n \tswitch (cmd->cmd) {\n \tcase ETHTOOL_GRXRINGS:\n-\t\tcmd->data = vsi->num_queue_pairs;\n+\t\tcmd->data = vsi->rss_size;\n \t\tret = 0;\n \t\tbreak;\n \tcase ETHTOOL_GRXFH:\n@@ -3897,6 +3897,12 @@ static int i40e_set_channels(struct net_device *dev,\n \tif (vsi->type != I40E_VSI_MAIN)\n \t\treturn -EINVAL;\n \n+\t/* We do not support setting channels via ethtool when TCs are\n+\t * configured through mqprio\n+\t */\n+\tif (pf->flags & I40E_FLAG_TC_MQPRIO)\n+\t\treturn -EINVAL;\n+\n \t/* verify they are not requesting separate vectors */\n \tif (!count || ch->rx_count || ch->tx_count)\n \t\treturn -EINVAL;\ndiff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c\nindex a5b164d..a953c2e 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e_main.c\n+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c\n@@ -1589,6 +1589,170 @@ static int i40e_set_mac(struct net_device *netdev, void *p)\n }\n \n /**\n+ * i40e_config_rss_aq - Prepare for RSS using AQ commands\n+ * @vsi: vsi structure\n+ * @seed: RSS hash seed\n+ **/\n+static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,\n+\t\t\t u8 *lut, u16 lut_size)\n+{\n+\tstruct i40e_pf *pf = vsi->back;\n+\tstruct i40e_hw *hw = &pf->hw;\n+\tint ret = 0;\n+\n+\tif (seed) {\n+\t\tstruct i40e_aqc_get_set_rss_key_data *seed_dw =\n+\t\t\t(struct i40e_aqc_get_set_rss_key_data *)seed;\n+\t\tret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);\n+\t\tif (ret) {\n+\t\t\tdev_info(&pf->pdev->dev,\n+\t\t\t\t \"Cannot set RSS key, err %s aq_err %s\\n\",\n+\t\t\t\t i40e_stat_str(hw, ret),\n+\t\t\t\t i40e_aq_str(hw, hw->aq.asq_last_status));\n+\t\t\treturn ret;\n+\t\t}\n+\t}\n+\tif (lut) {\n+\t\tbool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;\n+\n+\t\tret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);\n+\t\tif (ret) {\n+\t\t\tdev_info(&pf->pdev->dev,\n+\t\t\t\t \"Cannot set RSS lut, err %s aq_err %s\\n\",\n+\t\t\t\t i40e_stat_str(hw, ret),\n+\t\t\t\t i40e_aq_str(hw, hw->aq.asq_last_status));\n+\t\t\treturn ret;\n+\t\t}\n+\t}\n+\treturn ret;\n+}\n+\n+/**\n+ * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used\n+ * @vsi: VSI structure\n+ **/\n+static int i40e_vsi_config_rss(struct i40e_vsi *vsi)\n+{\n+\tu8 seed[I40E_HKEY_ARRAY_SIZE];\n+\tstruct i40e_pf *pf = vsi->back;\n+\tu8 *lut;\n+\tint ret;\n+\n+\tif (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE))\n+\t\treturn 0;\n+\tif (!vsi->rss_size)\n+\t\tvsi->rss_size = min_t(int, pf->alloc_rss_size,\n+\t\t\t\t vsi->num_queue_pairs);\n+\tif (!vsi->rss_size)\n+\t\treturn -EINVAL;\n+\tlut = kzalloc(vsi->rss_table_size, GFP_KERNEL);\n+\tif (!lut)\n+\t\treturn -ENOMEM;\n+\n+\t/* Use the user configured hash keys and lookup table if there is one,\n+\t * otherwise use default\n+\t */\n+\tif (vsi->rss_lut_user)\n+\t\tmemcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);\n+\telse\n+\t\ti40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);\n+\tif (vsi->rss_hkey_user)\n+\t\tmemcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);\n+\telse\n+\t\tnetdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);\n+\tret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);\n+\tkfree(lut);\n+\treturn ret;\n+}\n+\n+/**\n+ * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config\n+ * @vsi: the VSI being configured,\n+ * @ctxt: VSI context structure\n+ * @enabled_tc: number of traffic classes to enable\n+ *\n+ * Prepares VSI tc_config to have queue configurations based on MQPRIO options.\n+ **/\n+static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi,\n+\t\t\t\t\t struct i40e_vsi_context *ctxt,\n+\t\t\t\t\t u8 enabled_tc)\n+{\n+\tu16 qcount = 0, max_qcount, qmap, sections = 0;\n+\tint i, override_q, pow, num_qps, ret;\n+\tu8 netdev_tc = 0, offset = 0;\n+\n+\tif (vsi->type != I40E_VSI_MAIN)\n+\t\treturn -EINVAL;\n+\tsections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;\n+\tsections |= I40E_AQ_VSI_PROP_SCHED_VALID;\n+\tvsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc;\n+\tvsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;\n+\tnum_qps = vsi->mqprio_qopt.qopt.count[0];\n+\n+\t/* find the next higher power-of-2 of num queue pairs */\n+\tpow = ilog2(num_qps);\n+\tif (!is_power_of_2(num_qps))\n+\t\tpow++;\n+\tqmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |\n+\t\t(pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);\n+\n+\t/* Setup queue offset/count for all TCs for given VSI */\n+\tmax_qcount = vsi->mqprio_qopt.qopt.count[0];\n+\tfor (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {\n+\t\t/* See if the given TC is enabled for the given VSI */\n+\t\tif (vsi->tc_config.enabled_tc & BIT(i)) {\n+\t\t\toffset = vsi->mqprio_qopt.qopt.offset[i];\n+\t\t\tqcount = vsi->mqprio_qopt.qopt.count[i];\n+\t\t\tif (qcount > max_qcount)\n+\t\t\t\tmax_qcount = qcount;\n+\t\t\tvsi->tc_config.tc_info[i].qoffset = offset;\n+\t\t\tvsi->tc_config.tc_info[i].qcount = qcount;\n+\t\t\tvsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;\n+\t\t} else {\n+\t\t\t/* TC is not enabled so set the offset to\n+\t\t\t * default queue and allocate one queue\n+\t\t\t * for the given TC.\n+\t\t\t */\n+\t\t\tvsi->tc_config.tc_info[i].qoffset = 0;\n+\t\t\tvsi->tc_config.tc_info[i].qcount = 1;\n+\t\t\tvsi->tc_config.tc_info[i].netdev_tc = 0;\n+\t\t}\n+\t}\n+\n+\t/* Set actual Tx/Rx queue pairs */\n+\tvsi->num_queue_pairs = offset + qcount;\n+\n+\t/* Setup queue TC[0].qmap for given VSI context */\n+\tctxt->info.tc_mapping[0] = cpu_to_le16(qmap);\n+\tctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);\n+\tctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);\n+\tctxt->info.valid_sections |= cpu_to_le16(sections);\n+\n+\t/* Reconfigure RSS for main VSI with max queue count */\n+\tvsi->rss_size = max_qcount;\n+\tret = i40e_vsi_config_rss(vsi);\n+\tif (ret) {\n+\t\tdev_info(&vsi->back->pdev->dev,\n+\t\t\t \"Failed to reconfig rss for num_queues (%u)\\n\",\n+\t\t\t max_qcount);\n+\t\treturn ret;\n+\t}\n+\tvsi->reconfig_rss = true;\n+\tdev_dbg(&vsi->back->pdev->dev,\n+\t\t\"Reconfigured rss with num_queues (%u)\\n\", max_qcount);\n+\n+\t/* Find queue count available for channel VSIs and starting offset\n+\t * for channel VSIs\n+\t */\n+\toverride_q = vsi->mqprio_qopt.qopt.count[0];\n+\tif (override_q && (override_q < vsi->num_queue_pairs)) {\n+\t\tvsi->cnt_q_avail = vsi->num_queue_pairs - override_q;\n+\t\tvsi->next_base_queue = override_q;\n+\t}\n+\treturn 0;\n+}\n+\n+/**\n * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc\n * @vsi: the VSI being setup\n * @ctxt: VSI context structure\n@@ -1626,7 +1790,7 @@ static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,\n \t\t\tnumtc = 1;\n \t\t}\n \t} else {\n-\t\t/* At least TC0 is enabled in case of non-DCB case */\n+\t\t/* At least TC0 is enabled in non-DCB, non-MQPRIO case */\n \t\tnumtc = 1;\n \t}\n \n@@ -3163,6 +3327,7 @@ static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)\n \t\t\trx_ring->dcb_tc = 0;\n \t\t\ttx_ring->dcb_tc = 0;\n \t\t}\n+\t\treturn;\n \t}\n \n \tfor (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {\n@@ -4880,6 +5045,24 @@ static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)\n }\n \n /**\n+ * i40e_mqprio_get_enabled_tc - Get enabled traffic classes\n+ * @pf: PF being queried\n+ *\n+ * Query the current MQPRIO configuration and return the number of\n+ * traffic classes enabled.\n+ **/\n+static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf)\n+{\n+\tstruct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];\n+\tu8 num_tc = vsi->mqprio_qopt.qopt.num_tc;\n+\tu8 enabled_tc = 1, i;\n+\n+\tfor (i = 1; i < num_tc; i++)\n+\t\tenabled_tc |= BIT(i);\n+\treturn enabled_tc;\n+}\n+\n+/**\n * i40e_pf_get_num_tc - Get enabled traffic classes for PF\n * @pf: PF being queried\n *\n@@ -4892,7 +5075,10 @@ static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)\n \tu8 num_tc = 0;\n \tstruct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;\n \n-\t/* If DCB is not enabled then always in single TC */\n+\tif (pf->flags & I40E_FLAG_TC_MQPRIO)\n+\t\treturn pf->vsi[pf->lan_vsi]->mqprio_qopt.qopt.num_tc;\n+\n+\t/* If neither MQPRIO nor DCB is enabled, then always use single TC */\n \tif (!(pf->flags & I40E_FLAG_DCB_ENABLED))\n \t\treturn 1;\n \n@@ -4921,7 +5107,12 @@ static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)\n **/\n static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)\n {\n-\t/* If DCB is not enabled for this PF then just return default TC */\n+\tif (pf->flags & I40E_FLAG_TC_MQPRIO)\n+\t\treturn i40e_mqprio_get_enabled_tc(pf);\n+\n+\t/* If neither MQPRIO nor DCB is enabled for this PF then just return\n+\t * default TC\n+\t */\n \tif (!(pf->flags & I40E_FLAG_DCB_ENABLED))\n \t\treturn I40E_DEFAULT_TRAFFIC_CLASS;\n \n@@ -5011,6 +5202,9 @@ static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,\n \ti40e_status ret;\n \tint i;\n \n+\tif ((vsi->back->flags & I40E_FLAG_TC_MQPRIO) ||\n+\t !vsi->mqprio_qopt.qopt.hw)\n+\t\treturn 0;\n \tbw_data.tc_valid_bits = enabled_tc;\n \tfor (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)\n \t\tbw_data.tc_bw_credits[i] = bw_share[i];\n@@ -5073,6 +5267,9 @@ static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)\n \t\t\t\t\tvsi->tc_config.tc_info[i].qoffset);\n \t}\n \n+\tif (pf->flags & I40E_FLAG_TC_MQPRIO)\n+\t\treturn;\n+\n \t/* Assign UP2TC map for the VSI */\n \tfor (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {\n \t\t/* Get the actual TC# for the UP */\n@@ -5123,7 +5320,8 @@ static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)\n \tint i;\n \n \t/* Check if enabled_tc is same as existing or new TCs */\n-\tif (vsi->tc_config.enabled_tc == enabled_tc)\n+\tif (vsi->tc_config.enabled_tc == enabled_tc &&\n+\t vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)\n \t\treturn ret;\n \n \t/* Enable ETS TCs with equal BW Share for now across all VSIs */\n@@ -5146,15 +5344,37 @@ static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)\n \tctxt.vf_num = 0;\n \tctxt.uplink_seid = vsi->uplink_seid;\n \tctxt.info = vsi->info;\n-\ti40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);\n+\tif (vsi->back->flags & I40E_FLAG_TC_MQPRIO) {\n+\t\tret = i40e_vsi_setup_queue_map_mqprio(vsi, &ctxt, enabled_tc);\n+\t\tif (ret)\n+\t\t\tgoto out;\n+\t} else {\n+\t\ti40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);\n+\t}\n \n+\t/* On destroying the qdisc, reset vsi->rss_size, as number of enabled\n+\t * queues changed.\n+\t */\n+\tif (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) {\n+\t\tvsi->rss_size = min_t(int, vsi->back->alloc_rss_size,\n+\t\t\t\t vsi->num_queue_pairs);\n+\t\tret = i40e_vsi_config_rss(vsi);\n+\t\tif (ret) {\n+\t\t\tdev_info(&vsi->back->pdev->dev,\n+\t\t\t\t \"Failed to reconfig rss for num_queues\\n\");\n+\t\t\treturn ret;\n+\t\t}\n+\t\tvsi->reconfig_rss = false;\n+\t}\n \tif (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {\n \t\tctxt.info.valid_sections |=\n \t\t\t\tcpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);\n \t\tctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;\n \t}\n \n-\t/* Update the VSI after updating the VSI queue-mapping information */\n+\t/* Update the VSI after updating the VSI queue-mapping\n+\t * information\n+\t */\n \tret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);\n \tif (ret) {\n \t\tdev_info(&vsi->back->pdev->dev,\n@@ -6223,53 +6443,156 @@ void i40e_down(struct i40e_vsi *vsi)\n }\n \n /**\n+ * i40e_validate_mqprio_qopt- validate queue mapping info\n+ * @vsi: the VSI being configured\n+ * @mqprio_qopt: queue parametrs\n+ **/\n+static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi,\n+\t\t\t\t struct tc_mqprio_qopt_offload *mqprio_qopt)\n+{\n+\tint i;\n+\n+\tif ((mqprio_qopt->qopt.offset[0] != 0) ||\n+\t (mqprio_qopt->qopt.num_tc < 1) ||\n+\t (mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS))\n+\t\treturn -EINVAL;\n+\tfor (i = 0; ; i++) {\n+\t\tif (!mqprio_qopt->qopt.count[i])\n+\t\t\treturn -EINVAL;\n+\t\tif (mqprio_qopt->min_rate[i] || mqprio_qopt->max_rate[i])\n+\t\t\treturn -EINVAL;\n+\t\tif (i >= mqprio_qopt->qopt.num_tc - 1)\n+\t\t\tbreak;\n+\t\tif (mqprio_qopt->qopt.offset[i + 1] !=\n+\t\t (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i]))\n+\t\t\treturn -EINVAL;\n+\t}\n+\tif (vsi->num_queue_pairs <\n+\t (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) {\n+\t\treturn -EINVAL;\n+\t}\n+\treturn 0;\n+}\n+\n+/**\n+ * i40e_vsi_set_default_tc_config - set default values for tc configuration\n+ * @vsi: the VSI being configured\n+ **/\n+static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi)\n+{\n+\tu16 qcount;\n+\tint i;\n+\n+\t/* Only TC0 is enabled */\n+\tvsi->tc_config.numtc = 1;\n+\tvsi->tc_config.enabled_tc = 1;\n+\tqcount = min_t(int, vsi->alloc_queue_pairs,\n+\t\t i40e_pf_get_max_q_per_tc(vsi->back));\n+\tfor (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {\n+\t\t/* For the TC that is not enabled set the offset to to default\n+\t\t * queue and allocate one queue for the given TC.\n+\t\t */\n+\t\tvsi->tc_config.tc_info[i].qoffset = 0;\n+\t\tif (i == 0)\n+\t\t\tvsi->tc_config.tc_info[i].qcount = qcount;\n+\t\telse\n+\t\t\tvsi->tc_config.tc_info[i].qcount = 1;\n+\t\tvsi->tc_config.tc_info[i].netdev_tc = 0;\n+\t}\n+}\n+\n+/**\n * i40e_setup_tc - configure multiple traffic classes\n * @netdev: net device to configure\n- * @tc: number of traffic classes to enable\n+ * @type_data: tc offload data\n **/\n-static int i40e_setup_tc(struct net_device *netdev, u8 tc)\n+static int i40e_setup_tc(struct net_device *netdev, void *type_data)\n {\n+\tstruct tc_mqprio_qopt_offload *mqprio_qopt = type_data;\n \tstruct i40e_netdev_priv *np = netdev_priv(netdev);\n \tstruct i40e_vsi *vsi = np->vsi;\n \tstruct i40e_pf *pf = vsi->back;\n-\tu8 enabled_tc = 0;\n+\tu8 enabled_tc = 0, num_tc, hw;\n+\tbool need_reset = false;\n \tint ret = -EINVAL;\n+\tu16 mode;\n \tint i;\n \n-\t/* Check if DCB enabled to continue */\n-\tif (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {\n-\t\tnetdev_info(netdev, \"DCB is not enabled for adapter\\n\");\n-\t\tgoto exit;\n+\tnum_tc = mqprio_qopt->qopt.num_tc;\n+\thw = mqprio_qopt->qopt.hw;\n+\tmode = mqprio_qopt->mode;\n+\tif (!hw) {\n+\t\tpf->flags &= ~I40E_FLAG_TC_MQPRIO;\n+\t\tmemcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt));\n+\t\tgoto config_tc;\n \t}\n \n \t/* Check if MFP enabled */\n \tif (pf->flags & I40E_FLAG_MFP_ENABLED) {\n-\t\tnetdev_info(netdev, \"Configuring TC not supported in MFP mode\\n\");\n-\t\tgoto exit;\n+\t\tnetdev_info(netdev,\n+\t\t\t \"Configuring TC not supported in MFP mode\\n\");\n+\t\treturn ret;\n \t}\n+\tswitch (mode) {\n+\tcase TC_MQPRIO_MODE_DCB:\n+\t\tpf->flags &= ~I40E_FLAG_TC_MQPRIO;\n \n-\t/* Check whether tc count is within enabled limit */\n-\tif (tc > i40e_pf_get_num_tc(pf)) {\n-\t\tnetdev_info(netdev, \"TC count greater than enabled on link for adapter\\n\");\n-\t\tgoto exit;\n+\t\t/* Check if DCB enabled to continue */\n+\t\tif (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {\n+\t\t\tnetdev_info(netdev,\n+\t\t\t\t \"DCB is not enabled for adapter\\n\");\n+\t\t\treturn ret;\n+\t\t}\n+\n+\t\t/* Check whether tc count is within enabled limit */\n+\t\tif (num_tc > i40e_pf_get_num_tc(pf)) {\n+\t\t\tnetdev_info(netdev,\n+\t\t\t\t \"TC count greater than enabled on link for adapter\\n\");\n+\t\t\treturn ret;\n+\t\t}\n+\t\tbreak;\n+\tcase TC_MQPRIO_MODE_CHANNEL:\n+\t\tif (pf->flags & I40E_FLAG_DCB_ENABLED) {\n+\t\t\tnetdev_info(netdev,\n+\t\t\t\t \"Full offload of TC Mqprio options is not supported when DCB is enabled\\n\");\n+\t\t\treturn ret;\n+\t\t}\n+\t\tif (!(pf->flags & I40E_FLAG_MSIX_ENABLED))\n+\t\t\treturn ret;\n+\t\tret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t\tmemcpy(&vsi->mqprio_qopt, mqprio_qopt,\n+\t\t sizeof(*mqprio_qopt));\n+\t\tpf->flags |= I40E_FLAG_TC_MQPRIO;\n+\t\tpf->flags &= ~I40E_FLAG_DCB_ENABLED;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EINVAL;\n \t}\n \n+config_tc:\n \t/* Generate TC map for number of tc requested */\n-\tfor (i = 0; i < tc; i++)\n+\tfor (i = 0; i < num_tc; i++)\n \t\tenabled_tc |= BIT(i);\n \n \t/* Requesting same TC configuration as already enabled */\n-\tif (enabled_tc == vsi->tc_config.enabled_tc)\n+\tif (enabled_tc == vsi->tc_config.enabled_tc &&\n+\t mode != TC_MQPRIO_MODE_CHANNEL)\n \t\treturn 0;\n \n \t/* Quiesce VSI queues */\n \ti40e_quiesce_vsi(vsi);\n \n+\tif (!hw && !(pf->flags & I40E_FLAG_TC_MQPRIO))\n+\t\ti40e_remove_queue_channels(vsi);\n+\n \t/* Configure VSI for enabled TCs */\n \tret = i40e_vsi_config_tc(vsi, enabled_tc);\n \tif (ret) {\n \t\tnetdev_info(netdev, \"Failed configuring TC for VSI seid=%d\\n\",\n \t\t\t vsi->seid);\n+\t\tneed_reset = true;\n \t\tgoto exit;\n \t}\n \n@@ -6278,11 +6601,18 @@ static int i40e_setup_tc(struct net_device *netdev, u8 tc)\n \t\tif (ret) {\n \t\t\tnetdev_info(netdev,\n \t\t\t\t \"Failed configuring queue channels\\n\");\n+\t\t\tneed_reset = true;\n \t\t\tgoto exit;\n \t\t}\n \t}\n \n exit:\n+\t/* Reset the configuration data to defaults, only TC0 is enabled */\n+\tif (need_reset) {\n+\t\ti40e_vsi_set_default_tc_config(vsi);\n+\t\tneed_reset = false;\n+\t}\n+\n \t/* Unquiesce VSI */\n \ti40e_unquiesce_vsi(vsi);\n \treturn ret;\n@@ -6291,14 +6621,10 @@ static int i40e_setup_tc(struct net_device *netdev, u8 tc)\n static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type,\n \t\t\t void *type_data)\n {\n-\tstruct tc_mqprio_qopt *mqprio = type_data;\n-\n \tif (type != TC_SETUP_MQPRIO)\n \t\treturn -EOPNOTSUPP;\n \n-\tmqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;\n-\n-\treturn i40e_setup_tc(netdev, mqprio->num_tc);\n+\treturn i40e_setup_tc(netdev, type_data);\n }\n \n /**\n@@ -9160,45 +9486,6 @@ static int i40e_setup_misc_vector(struct i40e_pf *pf)\n }\n \n /**\n- * i40e_config_rss_aq - Prepare for RSS using AQ commands\n- * @vsi: vsi structure\n- * @seed: RSS hash seed\n- **/\n-static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,\n-\t\t\t u8 *lut, u16 lut_size)\n-{\n-\tstruct i40e_pf *pf = vsi->back;\n-\tstruct i40e_hw *hw = &pf->hw;\n-\tint ret = 0;\n-\n-\tif (seed) {\n-\t\tstruct i40e_aqc_get_set_rss_key_data *seed_dw =\n-\t\t\t(struct i40e_aqc_get_set_rss_key_data *)seed;\n-\t\tret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);\n-\t\tif (ret) {\n-\t\t\tdev_info(&pf->pdev->dev,\n-\t\t\t\t \"Cannot set RSS key, err %s aq_err %s\\n\",\n-\t\t\t\t i40e_stat_str(hw, ret),\n-\t\t\t\t i40e_aq_str(hw, hw->aq.asq_last_status));\n-\t\t\treturn ret;\n-\t\t}\n-\t}\n-\tif (lut) {\n-\t\tbool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;\n-\n-\t\tret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);\n-\t\tif (ret) {\n-\t\t\tdev_info(&pf->pdev->dev,\n-\t\t\t\t \"Cannot set RSS lut, err %s aq_err %s\\n\",\n-\t\t\t\t i40e_stat_str(hw, ret),\n-\t\t\t\t i40e_aq_str(hw, hw->aq.asq_last_status));\n-\t\t\treturn ret;\n-\t\t}\n-\t}\n-\treturn ret;\n-}\n-\n-/**\n * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands\n * @vsi: Pointer to vsi structure\n * @seed: Buffter to store the hash keys\n@@ -9245,46 +9532,6 @@ static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,\n }\n \n /**\n- * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used\n- * @vsi: VSI structure\n- **/\n-static int i40e_vsi_config_rss(struct i40e_vsi *vsi)\n-{\n-\tu8 seed[I40E_HKEY_ARRAY_SIZE];\n-\tstruct i40e_pf *pf = vsi->back;\n-\tu8 *lut;\n-\tint ret;\n-\n-\tif (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE))\n-\t\treturn 0;\n-\n-\tif (!vsi->rss_size)\n-\t\tvsi->rss_size = min_t(int, pf->alloc_rss_size,\n-\t\t\t\t vsi->num_queue_pairs);\n-\tif (!vsi->rss_size)\n-\t\treturn -EINVAL;\n-\n-\tlut = kzalloc(vsi->rss_table_size, GFP_KERNEL);\n-\tif (!lut)\n-\t\treturn -ENOMEM;\n-\t/* Use the user configured hash keys and lookup table if there is one,\n-\t * otherwise use default\n-\t */\n-\tif (vsi->rss_lut_user)\n-\t\tmemcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);\n-\telse\n-\t\ti40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);\n-\tif (vsi->rss_hkey_user)\n-\t\tmemcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);\n-\telse\n-\t\tnetdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);\n-\tret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);\n-\tkfree(lut);\n-\n-\treturn ret;\n-}\n-\n-/**\n * i40e_config_rss_reg - Configure RSS keys and lut by writing registers\n * @vsi: Pointer to vsi structure\n * @seed: RSS hash seed\n", "prefixes": [ "RFC", "v3", "4/6" ] }