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GET /api/patches/810935/?format=api
{ "id": 810935, "url": "http://patchwork.ozlabs.org/api/patches/810935/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/patch/c349d38a8cb1d00a4dc11d6aa286fb392017bc8c.1504776489.git.talho@nvidia.com/", "project": { "id": 21, "url": "http://patchwork.ozlabs.org/api/projects/21/?format=api", "name": "Linux Tegra Development", "link_name": "linux-tegra", "list_id": "linux-tegra.vger.kernel.org", "list_email": "linux-tegra@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<c349d38a8cb1d00a4dc11d6aa286fb392017bc8c.1504776489.git.talho@nvidia.com>", "list_archive_url": null, "date": "2017-09-07T09:31:01", "name": "[1/4] firmware: tegra: propagate error code to caller", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "e71aa67aab1a51b271ed74177fc431f8aa4e3510", "submitter": { "id": 72177, "url": "http://patchwork.ozlabs.org/api/people/72177/?format=api", "name": "Timo Alho", "email": "talho@nvidia.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-tegra/patch/c349d38a8cb1d00a4dc11d6aa286fb392017bc8c.1504776489.git.talho@nvidia.com/mbox/", "series": [ { "id": 1959, "url": "http://patchwork.ozlabs.org/api/series/1959/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/list/?series=1959", "date": "2017-09-07T09:31:00", "name": "firmware: tegra: add checks for BPMP error return code", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/1959/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/810935/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/810935/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-tegra-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-tegra-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xnwHx4mWrz9sNV\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 7 Sep 2017 19:33:49 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1754917AbdIGJds (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tThu, 7 Sep 2017 05:33:48 -0400", "from hqemgate14.nvidia.com ([216.228.121.143]:4746 \"EHLO\n\thqemgate14.nvidia.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1754779AbdIGJdr (ORCPT\n\t<rfc822; linux-tegra@vger.kernel.org>); Thu, 7 Sep 2017 05:33:47 -0400", "from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by\n\thqemgate14.nvidia.com\n\tid <B59b112750001>; Thu, 07 Sep 2017 02:33:41 -0700", "from HQMAIL103.nvidia.com ([172.20.161.6])\n\tby hqpgpgate102.nvidia.com (PGP Universal service);\n\tThu, 07 Sep 2017 02:33:36 -0700", "from HQMAIL104.nvidia.com (172.18.146.11) by HQMAIL103.nvidia.com\n\t(172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1293.2;\n\tThu, 7 Sep 2017 09:31:24 +0000", "from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL104.nvidia.com\n\t(172.18.146.11) with Microsoft SMTP Server id 15.0.1293.2 via\n\tFrontend Transport; Thu, 7 Sep 2017 09:31:23 +0000", "from talho-ln2.nvidia.com (Not Verified[10.21.24.139]) by\n\thqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 5, 8150)\n\tid <B59b111eb0000>; Thu, 07 Sep 2017 02:31:23 -0700" ], "X-PGP-Universal": "processed;\n\tby hqpgpgate102.nvidia.com on Thu, 07 Sep 2017 02:33:36 -0700", "From": "Timo Alho <talho@nvidia.com>", "To": "<thierry.reding@gmail.com>", "CC": "<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,\n\tTimo Alho <talho@nvidia.com>", "Subject": "[PATCH 1/4] firmware: tegra: propagate error code to caller", "Date": "Thu, 7 Sep 2017 12:31:01 +0300", "Message-ID": "<c349d38a8cb1d00a4dc11d6aa286fb392017bc8c.1504776489.git.talho@nvidia.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<cover.1504776489.git.talho@nvidia.com>", "References": "<cover.1504776489.git.talho@nvidia.com>", "X-NVConfidentiality": "public", "MIME-Version": "1.0", "Content-Type": "text/plain", "Sender": "linux-tegra-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-tegra.vger.kernel.org>", "X-Mailing-List": "linux-tegra@vger.kernel.org" }, "content": "Response messages from Tegra BPMP firmware contain an error return\ncode as the first word of payload. The error code is used to indicate\nincorrectly formatted request message or use of non-existing resource\n(clk, reset, powergate) identifier. Current implementation of\ntegra_bpmp_transfer() ignores this code and does not pass it to\ncaller. Fix this by adding an extra struct member to\ntegra_bpmp_message and populate that with return code.\n\nSigned-off-by: Timo Alho <talho@nvidia.com>\n---\n drivers/firmware/tegra/bpmp.c | 22 ++++++++++++++++------\n include/soc/tegra/bpmp.h | 1 +\n 2 files changed, 17 insertions(+), 6 deletions(-)", "diff": "diff --git a/drivers/firmware/tegra/bpmp.c b/drivers/firmware/tegra/bpmp.c\nindex 73ca55b..33683b5 100644\n--- a/drivers/firmware/tegra/bpmp.c\n+++ b/drivers/firmware/tegra/bpmp.c\n@@ -194,16 +194,24 @@ static int tegra_bpmp_wait_master_free(struct tegra_bpmp_channel *channel)\n }\n \n static ssize_t __tegra_bpmp_channel_read(struct tegra_bpmp_channel *channel,\n-\t\t\t\t\t void *data, size_t size)\n+\t\t\t\t\t void *data, size_t size, int *ret)\n {\n+\tint err;\n+\n \tif (data && size > 0)\n \t\tmemcpy(data, channel->ib->data, size);\n \n-\treturn tegra_ivc_read_advance(channel->ivc);\n+\terr = tegra_ivc_read_advance(channel->ivc);\n+\tif (err < 0)\n+\t\treturn err;\n+\n+\t*ret = channel->ib->code;\n+\n+\treturn 0;\n }\n \n static ssize_t tegra_bpmp_channel_read(struct tegra_bpmp_channel *channel,\n-\t\t\t\t void *data, size_t size)\n+\t\t\t\t void *data, size_t size, int *ret)\n {\n \tstruct tegra_bpmp *bpmp = channel->bpmp;\n \tunsigned long flags;\n@@ -217,7 +225,7 @@ static ssize_t tegra_bpmp_channel_read(struct tegra_bpmp_channel *channel,\n \t}\n \n \tspin_lock_irqsave(&bpmp->lock, flags);\n-\terr = __tegra_bpmp_channel_read(channel, data, size);\n+\terr = __tegra_bpmp_channel_read(channel, data, size, ret);\n \tclear_bit(index, bpmp->threaded.allocated);\n \tspin_unlock_irqrestore(&bpmp->lock, flags);\n \n@@ -337,7 +345,8 @@ int tegra_bpmp_transfer_atomic(struct tegra_bpmp *bpmp,\n \tif (err < 0)\n \t\treturn err;\n \n-\treturn __tegra_bpmp_channel_read(channel, msg->rx.data, msg->rx.size);\n+\treturn __tegra_bpmp_channel_read(channel, msg->rx.data, msg->rx.size,\n+\t\t\t\t\t &msg->rx.ret);\n }\n EXPORT_SYMBOL_GPL(tegra_bpmp_transfer_atomic);\n \n@@ -371,7 +380,8 @@ int tegra_bpmp_transfer(struct tegra_bpmp *bpmp,\n \tif (err == 0)\n \t\treturn -ETIMEDOUT;\n \n-\treturn tegra_bpmp_channel_read(channel, msg->rx.data, msg->rx.size);\n+\treturn tegra_bpmp_channel_read(channel, msg->rx.data, msg->rx.size,\n+\t\t\t\t &msg->rx.ret);\n }\n EXPORT_SYMBOL_GPL(tegra_bpmp_transfer);\n \ndiff --git a/include/soc/tegra/bpmp.h b/include/soc/tegra/bpmp.h\nindex 9ba6522..57519f4 100644\n--- a/include/soc/tegra/bpmp.h\n+++ b/include/soc/tegra/bpmp.h\n@@ -110,6 +110,7 @@ struct tegra_bpmp_message {\n \tstruct {\n \t\tvoid *data;\n \t\tsize_t size;\n+\t\tint ret;\n \t} rx;\n };\n \n", "prefixes": [ "1/4" ] }