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GET /api/patches/810702/?format=api
{ "id": 810702, "url": "http://patchwork.ozlabs.org/api/patches/810702/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170906160612.22769-26-richard.henderson@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170906160612.22769-26-richard.henderson@linaro.org>", "list_archive_url": null, "date": "2017-09-06T16:06:05", "name": "[PULL,25/32] target/arm: [tcg,a64] Port to tb_stop", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f4cf88443104612cafdb4e4edc65df51a4ef490f", "submitter": { "id": 72104, "url": "http://patchwork.ozlabs.org/api/people/72104/?format=api", "name": "Richard Henderson", "email": "richard.henderson@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170906160612.22769-26-richard.henderson@linaro.org/mbox/", "series": [ { "id": 1847, "url": "http://patchwork.ozlabs.org/api/series/1847/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=1847", "date": "2017-09-06T16:05:41", "name": "[PULL,01/32] tcg: Add generic DISAS_NORETURN", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/1847/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/810702/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/810702/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"ScF8CEj+\"; dkim-atps=neutral" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xnTD56T4Pz9sRV\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 7 Sep 2017 02:13:57 +1000 (AEST)", "from localhost ([::1]:36982 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dpcxg-000655-0X\n\tfor incoming@patchwork.ozlabs.org; Wed, 06 Sep 2017 12:13:56 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:41936)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <richard.henderson@linaro.org>) id 1dpcqo-0000PB-M3\n\tfor qemu-devel@nongnu.org; Wed, 06 Sep 2017 12:06:51 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <richard.henderson@linaro.org>) id 1dpcqn-0002pU-Hn\n\tfor qemu-devel@nongnu.org; Wed, 06 Sep 2017 12:06:50 -0400", "from mail-pg0-x236.google.com ([2607:f8b0:400e:c05::236]:38907)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.71) (envelope-from <richard.henderson@linaro.org>)\n\tid 1dpcqn-0002kd-9X\n\tfor qemu-devel@nongnu.org; Wed, 06 Sep 2017 12:06:49 -0400", "by mail-pg0-x236.google.com with SMTP id v66so15892327pgb.5\n\tfor <qemu-devel@nongnu.org>; Wed, 06 Sep 2017 09:06:49 -0700 (PDT)", "from bigtime.twiddle.net (97-126-108-236.tukw.qwest.net.\n\t[97.126.108.236]) by smtp.gmail.com with ESMTPSA id\n\tt65sm262863pfk.59.2017.09.06.09.06.46\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tWed, 06 Sep 2017 09:06:46 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:mime-version:content-transfer-encoding;\n\tbh=Kl1r5WRPXIH5biKfH0poWfuspGHN5gu/mN6HurZuXOA=;\n\tb=ScF8CEj+/7PwoGDDP5512SqRznakWZEUO0qi54V1orAcI63rCTdn/BXwZ+94/vwuqO\n\tSsh7EBDWI5FRxYHYiJEehMonjqWMszQRmFALny8oOeGXucpm8nRfKzUyryrmf9+XPsOC\n\tJ9A/kni8zKB5nspuGW6OCC635v9Mmsky2AVN4=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-transfer-encoding;\n\tbh=Kl1r5WRPXIH5biKfH0poWfuspGHN5gu/mN6HurZuXOA=;\n\tb=VxzQE7yuhcxLaoB2sq9DtAxkJgSCy2qOwI52bnalCFJCPMhdT1Ba+pEkFQQrSwyag3\n\tgvqgAOHONEboCWJIy3hQgCxbIZtghswtcA0OYPHDNhrNQ3H51l9nnr6aeN/04EZJce6t\n\tGyNPtVbTBbGObSpsdHB4QTPLI/r+/MTktlu8D1uqrY84mU0LpwjtoEgoXbVNHJOlNLB1\n\t3Ka0ee8lbZdKIQUJdjx9+YsmspmdrhuOhj134P0He52f0/iUl4ZjqzpsjNUpyCKaFMT5\n\toEpGL+ZoRM24kZLI5AJ2Wa/PyEAqtcggOuxTjSH6f6bF2123gMuUS+sbqTuYUOSMY9Wj\n\tofEg==", "X-Gm-Message-State": "AHPjjUhgIGsaRvTMY2sEUQ9Jo5StInDe0vATX3LBcIrjKa7PM5HY1cP+\n\teRU+rPOuZCKvovNS8dEKCw==", "X-Google-Smtp-Source": "ADKCNb4hiHMct9SHgkQ27TgPBx2XSl5IKRiFEJcTNFjZM0QU8I6YNN1rBGfty5c3/Td73qtXE1+3PA==", "X-Received": "by 10.84.211.106 with SMTP id b97mr8799686pli.148.1504714008014; \n\tWed, 06 Sep 2017 09:06:48 -0700 (PDT)", "From": "Richard Henderson <richard.henderson@linaro.org>", "To": "qemu-devel@nongnu.org", "Date": "Wed, 6 Sep 2017 09:06:05 -0700", "Message-Id": "<20170906160612.22769-26-richard.henderson@linaro.org>", "X-Mailer": "git-send-email 2.13.5", "In-Reply-To": "<20170906160612.22769-1-richard.henderson@linaro.org>", "References": "<20170906160612.22769-1-richard.henderson@linaro.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-detected-operating-system": "by eggs.gnu.org: Genre and OS details not\n\trecognized.", "X-Received-From": "2607:f8b0:400e:c05::236", "Subject": "[Qemu-devel] [PULL 25/32] target/arm: [tcg,a64] Port to tb_stop", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "peter.maydell@linaro.org, =?utf-8?q?Llu=C3=ADs_Vilanova?=\n\t<vilanova@ac.upc.edu>, \tRichard Henderson <rth@twiddle.net>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "From: Lluís Vilanova <vilanova@ac.upc.edu>\n\nIncrementally paves the way towards using the generic instruction translation\nloop.\n\nReviewed-by: Emilio G. Cota <cota@braap.org>\nReviewed-by: Richard Henderson <rth@twiddle.net>\nSigned-off-by: Lluís Vilanova <vilanova@ac.upc.edu>\nMessage-Id: <150002558503.22386.1149037590886263349.stgit@frigg.lan>\nSigned-off-by: Richard Henderson <rth@twiddle.net>\n---\n target/arm/translate-a64.c | 127 ++++++++++++++++++++++++---------------------\n 1 file changed, 67 insertions(+), 60 deletions(-)", "diff": "diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c\nindex f959f4469a..723e86c976 100644\n--- a/target/arm/translate-a64.c\n+++ b/target/arm/translate-a64.c\n@@ -11327,6 +11327,72 @@ static void aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)\n dc->base.pc_next = dc->pc;\n }\n \n+static void aarch64_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)\n+{\n+ DisasContext *dc = container_of(dcbase, DisasContext, base);\n+\n+ if (unlikely(dc->base.singlestep_enabled || dc->ss_active)) {\n+ /* Note that this means single stepping WFI doesn't halt the CPU.\n+ * For conditional branch insns this is harmless unreachable code as\n+ * gen_goto_tb() has already handled emitting the debug exception\n+ * (and thus a tb-jump is not possible when singlestepping).\n+ */\n+ switch (dc->base.is_jmp) {\n+ default:\n+ gen_a64_set_pc_im(dc->pc);\n+ /* fall through */\n+ case DISAS_JUMP:\n+ if (dc->base.singlestep_enabled) {\n+ gen_exception_internal(EXCP_DEBUG);\n+ } else {\n+ gen_step_complete_exception(dc);\n+ }\n+ break;\n+ case DISAS_NORETURN:\n+ break;\n+ }\n+ } else {\n+ switch (dc->base.is_jmp) {\n+ case DISAS_NEXT:\n+ case DISAS_TOO_MANY:\n+ gen_goto_tb(dc, 1, dc->pc);\n+ break;\n+ default:\n+ case DISAS_UPDATE:\n+ gen_a64_set_pc_im(dc->pc);\n+ /* fall through */\n+ case DISAS_JUMP:\n+ tcg_gen_lookup_and_goto_ptr(cpu_pc);\n+ break;\n+ case DISAS_EXIT:\n+ tcg_gen_exit_tb(0);\n+ break;\n+ case DISAS_NORETURN:\n+ case DISAS_SWI:\n+ break;\n+ case DISAS_WFE:\n+ gen_a64_set_pc_im(dc->pc);\n+ gen_helper_wfe(cpu_env);\n+ break;\n+ case DISAS_YIELD:\n+ gen_a64_set_pc_im(dc->pc);\n+ gen_helper_yield(cpu_env);\n+ break;\n+ case DISAS_WFI:\n+ /* This is a special case because we don't want to just halt the CPU\n+ * if trying to debug across a WFI.\n+ */\n+ gen_a64_set_pc_im(dc->pc);\n+ gen_helper_wfi(cpu_env);\n+ /* The helper doesn't necessarily throw an exception, but we\n+ * must go back to the main loop to check for interrupts anyway.\n+ */\n+ tcg_gen_exit_tb(0);\n+ break;\n+ }\n+ }\n+}\n+\n void gen_intermediate_code_a64(DisasContextBase *dcbase, CPUState *cs,\n TranslationBlock *tb)\n {\n@@ -11398,66 +11464,7 @@ void gen_intermediate_code_a64(DisasContextBase *dcbase, CPUState *cs,\n gen_io_end();\n }\n \n- if (unlikely(cs->singlestep_enabled || dc->ss_active)) {\n- /* Note that this means single stepping WFI doesn't halt the CPU.\n- * For conditional branch insns this is harmless unreachable code as\n- * gen_goto_tb() has already handled emitting the debug exception\n- * (and thus a tb-jump is not possible when singlestepping).\n- */\n- switch (dc->base.is_jmp) {\n- default:\n- gen_a64_set_pc_im(dc->pc);\n- /* fall through */\n- case DISAS_JUMP:\n- if (cs->singlestep_enabled) {\n- gen_exception_internal(EXCP_DEBUG);\n- } else {\n- gen_step_complete_exception(dc);\n- }\n- break;\n- case DISAS_NORETURN:\n- break;\n- }\n- } else {\n- switch (dc->base.is_jmp) {\n- case DISAS_NEXT:\n- case DISAS_TOO_MANY:\n- gen_goto_tb(dc, 1, dc->pc);\n- break;\n- case DISAS_JUMP:\n- tcg_gen_lookup_and_goto_ptr(cpu_pc);\n- break;\n- case DISAS_NORETURN:\n- case DISAS_SWI:\n- break;\n- case DISAS_WFE:\n- gen_a64_set_pc_im(dc->pc);\n- gen_helper_wfe(cpu_env);\n- break;\n- case DISAS_YIELD:\n- gen_a64_set_pc_im(dc->pc);\n- gen_helper_yield(cpu_env);\n- break;\n- case DISAS_WFI:\n- /* This is a special case because we don't want to just halt the CPU\n- * if trying to debug across a WFI.\n- */\n- gen_a64_set_pc_im(dc->pc);\n- gen_helper_wfi(cpu_env);\n- /* The helper doesn't necessarily throw an exception, but we\n- * must go back to the main loop to check for interrupts anyway.\n- */\n- tcg_gen_exit_tb(0);\n- break;\n- case DISAS_UPDATE:\n- gen_a64_set_pc_im(dc->pc);\n- /* fall through */\n- case DISAS_EXIT:\n- default:\n- tcg_gen_exit_tb(0);\n- break;\n- }\n- }\n+ aarch64_tr_tb_stop(&dc->base, cs);\n \n gen_tb_end(tb, dc->base.num_insns);\n \n", "prefixes": [ "PULL", "25/32" ] }