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GET /api/patches/810701/?format=api
{ "id": 810701, "url": "http://patchwork.ozlabs.org/api/patches/810701/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170906160612.22769-11-richard.henderson@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170906160612.22769-11-richard.henderson@linaro.org>", "list_archive_url": null, "date": "2017-09-06T16:05:50", "name": "[PULL,10/32] target/i386: [tcg] Port to breakpoint_check", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "82e777e63cca3e2160bca77c02282a0635959ff5", "submitter": { "id": 72104, "url": "http://patchwork.ozlabs.org/api/people/72104/?format=api", "name": "Richard Henderson", "email": "richard.henderson@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170906160612.22769-11-richard.henderson@linaro.org/mbox/", "series": [ { "id": 1847, "url": "http://patchwork.ozlabs.org/api/series/1847/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=1847", "date": "2017-09-06T16:05:41", "name": "[PULL,01/32] tcg: Add generic DISAS_NORETURN", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/1847/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/810701/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/810701/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"kicp4aic\"; dkim-atps=neutral" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xnTBz0rfNz9s7F\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 7 Sep 2017 02:12:59 +1000 (AEST)", "from localhost ([::1]:36979 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dpcwj-00055V-4o\n\tfor incoming@patchwork.ozlabs.org; Wed, 06 Sep 2017 12:12:57 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:41665)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <richard.henderson@linaro.org>) id 1dpcqX-0008Sd-KS\n\tfor qemu-devel@nongnu.org; Wed, 06 Sep 2017 12:06:38 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <richard.henderson@linaro.org>) id 1dpcqT-0001xj-Lv\n\tfor qemu-devel@nongnu.org; Wed, 06 Sep 2017 12:06:33 -0400", "from mail-pf0-x233.google.com ([2607:f8b0:400e:c00::233]:36480)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.71) (envelope-from <richard.henderson@linaro.org>)\n\tid 1dpcqT-0001tQ-GT\n\tfor qemu-devel@nongnu.org; Wed, 06 Sep 2017 12:06:29 -0400", "by mail-pf0-x233.google.com with SMTP id e199so13452448pfh.3\n\tfor <qemu-devel@nongnu.org>; Wed, 06 Sep 2017 09:06:29 -0700 (PDT)", "from bigtime.twiddle.net (97-126-108-236.tukw.qwest.net.\n\t[97.126.108.236]) by smtp.gmail.com with ESMTPSA id\n\tt65sm262863pfk.59.2017.09.06.09.06.26\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tWed, 06 Sep 2017 09:06:27 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:mime-version:content-transfer-encoding;\n\tbh=JBnESfPgluCNjUoEQc0wVDgPrUzhAwV+Ja6vru/3p1M=;\n\tb=kicp4aicUPjK7UYk/jlnG1tj7L73e5Kten9U4b8eUxsggKt1quOQkGr8o5/N9Slr22\n\ttkkaptN1a3eLTnXfsIPmoz4t+B7P4TFhyE9elp9TCn2WmWD8mqpRvd2q/L36G8g2zN6N\n\tvZpw8DEZ2T4mNuTXJ9sswMr25k07zceZG7or0=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:mime-version:content-transfer-encoding;\n\tbh=JBnESfPgluCNjUoEQc0wVDgPrUzhAwV+Ja6vru/3p1M=;\n\tb=fzlbRiNX4NekHIjnAGdvXbAcoK/bClpnW5ypFRvYwLdGOkOy4F8AIGo7UoaKUWC7Vy\n\tqHsaVLIazv7N92J99ywz9Xzyw6C2E2NURax6FKP5JFcjfQANEduYt6RdgyTFON8NJB9u\n\tI25G8u7Tx8WG3J/mlTqBYJ0VYDuDJGhf1aJ4pDwJ9ENYvqUoctF7gpzsd+ZoqY9ekfhV\n\t3faPS8kCYty3DUtkAFrATLXb8eA6LoYDlKZ6Y99WjG9h8hSHdZs+H5Qx1Ldis4ZULuJr\n\tS3iijYtd473Ahld0FH1tzAVqSy5154BHQMD+cQl0krg9F4Z+8fxMCUf1RT/Eq892wsia\n\tOBCQ==", "X-Gm-Message-State": "AHPjjUgMXE8x36ZMSVejXz31TNTjIQ/aVuc6cgU0BP3VPC1WRk3oQHON\n\tXAtHzRku2Qy2zMUg7heDQw==", "X-Google-Smtp-Source": "ADKCNb5ClKmw2bA9ZI8FnbdoGRv3I5ZK0oTlYXWGTYZyvi22eLPPBef0WROQ64ql96BMTkChHyhFNA==", "X-Received": "by 10.98.14.213 with SMTP id 82mr8030353pfo.274.1504713988119;\n\tWed, 06 Sep 2017 09:06:28 -0700 (PDT)", "From": "Richard Henderson <richard.henderson@linaro.org>", "To": "qemu-devel@nongnu.org", "Date": "Wed, 6 Sep 2017 09:05:50 -0700", "Message-Id": "<20170906160612.22769-11-richard.henderson@linaro.org>", "X-Mailer": "git-send-email 2.13.5", "In-Reply-To": "<20170906160612.22769-1-richard.henderson@linaro.org>", "References": "<20170906160612.22769-1-richard.henderson@linaro.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-detected-operating-system": "by eggs.gnu.org: Genre and OS details not\n\trecognized.", "X-Received-From": "2607:f8b0:400e:c00::233", "Subject": "[Qemu-devel] [PULL 10/32] target/i386: [tcg] Port to\n\tbreakpoint_check", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "peter.maydell@linaro.org, =?utf-8?q?Llu=C3=ADs_Vilanova?=\n\t<vilanova@ac.upc.edu>, \tRichard Henderson <rth@twiddle.net>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "From: Lluís Vilanova <vilanova@ac.upc.edu>\n\nIncrementally paves the way towards using the generic instruction translation\nloop.\n\nSigned-off-by: Lluís Vilanova <vilanova@ac.upc.edu>\nReviewed-by: Richard Henderson <rth@twiddle.net>\nReviewed-by: Emilio G. Cota <cota@braap.org>\nMessage-Id: <150002170871.22386.2172835658104140576.stgit@frigg.lan>\nSigned-off-by: Richard Henderson <rth@twiddle.net>\n---\n target/i386/translate.c | 46 ++++++++++++++++++++++++++++++++++------------\n 1 file changed, 34 insertions(+), 12 deletions(-)", "diff": "diff --git a/target/i386/translate.c b/target/i386/translate.c\nindex b7e5854513..4d4083fe30 100644\n--- a/target/i386/translate.c\n+++ b/target/i386/translate.c\n@@ -8456,6 +8456,26 @@ static void i386_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu)\n tcg_gen_insn_start(dc->base.pc_next, dc->cc_op);\n }\n \n+static bool i386_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cpu,\n+ const CPUBreakpoint *bp)\n+{\n+ DisasContext *dc = container_of(dcbase, DisasContext, base);\n+ /* If RF is set, suppress an internally generated breakpoint. */\n+ int flags = dc->base.tb->flags & HF_RF_MASK ? BP_GDB : BP_ANY;\n+ if (bp->flags & flags) {\n+ gen_debug(dc, dc->base.pc_next - dc->cs_base);\n+ dc->base.is_jmp = DISAS_NORETURN;\n+ /* The address covered by the breakpoint must be included in\n+ [tb->pc, tb->pc + tb->size) in order to for it to be\n+ properly cleared -- thus we increment the PC here so that\n+ the logic setting tb->size below does the right thing. */\n+ dc->base.pc_next += 1;\n+ return true;\n+ } else {\n+ return false;\n+ }\n+}\n+\n /* generate intermediate code for basic block 'tb'. */\n void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)\n {\n@@ -8486,18 +8506,21 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)\n i386_tr_insn_start(&dc->base, cs);\n num_insns++;\n \n- /* If RF is set, suppress an internally generated breakpoint. */\n- if (unlikely(cpu_breakpoint_test(cs, dc->base.pc_next,\n- tb->flags & HF_RF_MASK\n- ? BP_GDB : BP_ANY))) {\n- gen_debug(dc, dc->base.pc_next - dc->cs_base);\n- /* The address covered by the breakpoint must be included in\n- [tb->pc, tb->pc + tb->size) in order to for it to be\n- properly cleared -- thus we increment the PC here so that\n- the logic setting tb->size below does the right thing. */\n- dc->base.pc_next += 1;\n- goto done_generating;\n+ if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {\n+ CPUBreakpoint *bp;\n+ QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {\n+ if (bp->pc == dc->base.pc_next) {\n+ if (i386_tr_breakpoint_check(&dc->base, cs, bp)) {\n+ break;\n+ }\n+ }\n+ }\n+\n+ if (dc->base.is_jmp == DISAS_NORETURN) {\n+ break;\n+ }\n }\n+\n if (num_insns == max_insns && (tb->cflags & CF_LAST_IO)) {\n gen_io_start();\n }\n@@ -8548,7 +8571,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)\n }\n if (tb->cflags & CF_LAST_IO)\n gen_io_end();\n-done_generating:\n gen_tb_end(tb, num_insns);\n \n #ifdef DEBUG_DISAS\n", "prefixes": [ "PULL", "10/32" ] }