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GET /api/patches/810666/?format=api
{ "id": 810666, "url": "http://patchwork.ozlabs.org/api/patches/810666/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/8e2e51bb-31fa-fa69-a32e-0abf0194be1a@foss.arm.com/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<8e2e51bb-31fa-fa69-a32e-0abf0194be1a@foss.arm.com>", "list_archive_url": null, "date": "2017-09-06T15:14:55", "name": "[arm-embedded,2/3,GCC/ARM] Add support for ARMv8-R architecture", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "58f6d0411010a108249cec57bed8c526d9349a83", "submitter": { "id": 67886, "url": "http://patchwork.ozlabs.org/api/people/67886/?format=api", "name": "Thomas Preudhomme", "email": "thomas.preudhomme@foss.arm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/8e2e51bb-31fa-fa69-a32e-0abf0194be1a@foss.arm.com/mbox/", "series": [ { "id": 1831, "url": "http://patchwork.ozlabs.org/api/series/1831/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=1831", "date": "2017-09-06T15:12:44", "name": "[arm-embedded,1/3,GCC/ARM,ping] Add MIDR info for ARM Cortex-R7 and Cortex-R8", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/1831/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/810666/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/810666/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<gcc-patches-return-461618-incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "mailing list gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-461618-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"DgzJY8Kz\"; dkim-atps=neutral", "sourceware.org; auth=none" ], "Received": [ "from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xnRwL260qz9t2R\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 7 Sep 2017 01:15:14 +1000 (AEST)", "(qmail 714 invoked by alias); 6 Sep 2017 15:15:01 -0000", "(qmail 695 invoked by uid 89); 6 Sep 2017 15:15:00 -0000", "from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by\n\tsourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tWed, 06 Sep 2017 15:14:58 +0000", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\tby\n\tusa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id\n\t1899715AD\tfor <gcc-patches@gcc.gnu.org>;\n\tWed, 6 Sep 2017 08:14:57 -0700 (PDT)", "from [10.2.206.52] (usa-sjc-imap-foss1.foss.arm.com\n\t[10.72.51.249])\tby usa-sjc-imap-foss1.foss.arm.com (Postfix)\n\twith ESMTPSA id 7C20D3F578\tfor <gcc-patches@gcc.gnu.org>;\n\tWed, 6 Sep 2017 08:14:56 -0700 (PDT)" ], "DomainKey-Signature": "a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender\n\t:references:subject:from:to:message-id:date:mime-version\n\t:in-reply-to:content-type; q=dns; s=default; b=sumqVvgfiX16gusdy\n\tSe6sC+79cSZGNx/zCUA7lCj4Bsq1niVzB6+NuVaHLXd91b+fMD60OmL4E9zkJxvP\n\t7l3ISYw8alNAq3NGwm/NP+rpJOIFGB+iNNCEHwVsw4lgnvj8rl6X353NZmmxYaoc\n\tFVJAdCYQtyRlMvtUWRD73RF8h4=", "DKIM-Signature": "v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender\n\t:references:subject:from:to:message-id:date:mime-version\n\t:in-reply-to:content-type; s=default; bh=bOqn9IqJKgfZpgB+h5yQ1kp\n\tZWXg=; b=DgzJY8KzZcyGLA/A7m1nbALfuxvYGj0XuqSvifLUqaOwSatSmqPCt5I\n\tnAC37pI2q9yFh2rLCIlHGQMV6snBKvRx4wyGgkKsUfjawhXFizVaiZ3iYqzElMKE\n\tInp09wUYt6Tsi0BLJ2RjLuQzFeIvBxuEMC+bkCIlvXQq/hlZ+Zag=", "Mailing-List": "contact gcc-patches-help@gcc.gnu.org; run by ezmlm", "Precedence": "bulk", "List-Id": "<gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<mailto:gcc-patches-unsubscribe-incoming=patchwork.ozlabs.org@gcc.gnu.org>", "List-Archive": "<http://gcc.gnu.org/ml/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-help@gcc.gnu.org>", "Sender": "gcc-patches-owner@gcc.gnu.org", "X-Virus-Found": "No", "X-Spam-SWARE-Status": "No, score=-25.7 required=5.0 tests=BAYES_00, GIT_PATCH_0,\n\tGIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3,\n\tKAM_LAZY_DOMAIN_SECURITY, KAM_LOTSOFHASH,\n\tRP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=FLAG,\n\tUD:arm.com, STRONG", "X-HELO": "foss.arm.com", "References": "<654b960e-5492-8f51-e125-58e51999eecc@foss.arm.com>", "Subject": "[arm-embedded] [PATCH 2/3,\n\tGCC/ARM] Add support for ARMv8-R architecture", "From": "Thomas Preudhomme <thomas.preudhomme@foss.arm.com>", "To": "\"gcc-patches@gcc.gnu.org\" <gcc-patches@gcc.gnu.org>", "X-Forwarded-Message-Id": "<654b960e-5492-8f51-e125-58e51999eecc@foss.arm.com>", "Message-ID": "<8e2e51bb-31fa-fa69-a32e-0abf0194be1a@foss.arm.com>", "Date": "Wed, 6 Sep 2017 16:14:55 +0100", "User-Agent": "Mozilla/5.0 (X11; Linux x86_64;\n\trv:52.0) Gecko/20100101 Thunderbird/52.2.1", "MIME-Version": "1.0", "In-Reply-To": "<654b960e-5492-8f51-e125-58e51999eecc@foss.arm.com>", "Content-Type": "multipart/mixed;\n\tboundary=\"------------EB7BD1A248E41D55993D4CDE\"", "X-IsSubscribed": "yes" }, "content": "Hi,\n\nWe have decided to apply the following patch to the embedded-7-branch to enable \nARMv8-R support.\n\nChangeLog entry is as follows:\n\n*** gcc/ChangeLog.arm ***\n\n2017-09-04 Thomas Preud'homme <thomas.preudhomme@arm.com>\n\n Backport from mainline\n 2017-07-06 Thomas Preud'homme <thomas.preudhomme@arm.com>\n\n * config/arm/arm-cpus.in (armv8-r): Add new entry.\n * config/arm/arm-isa.h (ISA_ARMv8r): Define macro.\n * config/arm/arm-tables.opt: Regenerate.\n * config/arm/arm.h (enum base_architecture): Add BASE_ARCH_8R\n enumerator.\n * doc/invoke.texi: Mention -march=armv8-r and its extensions.\n\n*** gcc/testsuite/ChangeLog ***\n\n\n2017-09-04 Thomas Preud'homme <thomas.preudhomme@arm.com>\n\n Backport from mainline\n 2017-07-06 Thomas Preud'homme <thomas.preudhomme@arm.com>\n\n * lib/target-supports.exp: Generate\n check_effective_target_arm_arch_v8r_ok, add_options_for_arm_arch_v8r\n and check_effective_target_arm_arch_v8r_multilib.\n\n*** libgcc/ChangeLog ***\n\n\n2017-09-04 Thomas Preud'homme <thomas.preudhomme@arm.com>\n\n Backport from mainline\n 2017-07-06 Thomas Preud'homme <thomas.preudhomme@arm.com>\n\n * config/arm/lib1funcs.S: Defined __ARM_ARCH__ to 8 for ARMv8-R.\nPlease find an updated patch in attachment. ChangeLog entry are now as follows:\n\n*** gcc/ChangeLog ***\n\n2017-07-06 Thomas Preud'homme <thomas.preudhomme@arm.com>\n\n\t* config/arm/arm-cpus.in (armv8-r): Add new entry.\n\t* config/arm/arm-isa.h (ISA_ARMv8r): Define macro.\n\t* config/arm/arm-tables.opt: Regenerate.\n\t* config/arm/arm.h (enum base_architecture): Add BASE_ARCH_8R\n\tenumerator.\n\t* doc/invoke.texi: Mention -march=armv8-r and its extensions.\n\n*** gcc/testsuite/ChangeLog ***\n\n2017-01-31 Thomas Preud'homme <thomas.preudhomme@arm.com>\n\n\t* lib/target-supports.exp: Generate\n\tcheck_effective_target_arm_arch_v8r_ok, add_options_for_arm_arch_v8r\n\tand check_effective_target_arm_arch_v8r_multilib.\n\n*** libgcc/ChangeLog ***\n\n2017-01-31 Thomas Preud'homme <thomas.preudhomme@arm.com>\n\n\t* config/arm/lib1funcs.S: Defined __ARM_ARCH__ to 8 for ARMv8-R.\n\n\nTested by building an arm-none-eabi GCC cross-compiler targetting\nARMv8-R.\n\nIs this ok for stage1?\n\nBest regards,\n\nThomas\n\nBest regards,\n\nThomas\n\nOn 29/06/17 16:13, Thomas Preudhomme wrote:\n> Please ignore this patch. I'll respin the patch on a more recent GCC.\n> \n> Best regards,\n> \n> Thomas\n> \n> On 29/06/17 14:55, Thomas Preudhomme wrote:\n>> Hi,\n>>\n>> This patch adds support for ARMv8-R architecture [1] which was recently\n>> announced. User level instructions for ARMv8-R are the same as those in\n>> ARMv8-A Aarch32 mode so this patch define ARMv8-R to have the same\n>> features as ARMv8-A in ARM backend.\n>>\n>> [1] \n>> https://developer.arm.com/products/architecture/r-profile/docs/ddi0568/latest/arm-architecture-reference-manual-supplement-armv8-for-the-armv8-r-aarch32-architecture-profile \n>>\n>>\n>> ChangeLog entries are as follow:\n>>\n>> *** gcc/ChangeLog ***\n>>\n>> 2017-01-31 Thomas Preud'homme <thomas.preudhomme@arm.com>\n>>\n>> * config/arm/arm-cpus.in (armv8-r, armv8-r+rcr): Add new entry.\n>> * config/arm/arm-cpu-cdata.h: Regenerate.\n>> * config/arm/arm-cpu-data.h: Regenerate.\n>> * config/arm/arm-isa.h (ISA_ARMv8r): Define macro.\n>> * config/arm/arm-tables.opt: Regenerate.\n>> * config/arm/arm.h (enum base_architecture): Add BASE_ARCH_8R\n>> enumerator.\n>> * config/arm/bpabi.h (BE8_LINK_SPEC): Add entry for ARMv8-R and\n>> ARMv8-R with CRC extensions.\n>> * doc/invoke.texi: Mention -march=armv8-r and -march=armv8-r+crc\n>> options. Document meaning of -march=armv8-r+rcr.\n>>\n>> *** gcc/testsuite/ChangeLog ***\n>>\n>> 2017-01-31 Thomas Preud'homme <thomas.preudhomme@arm.com>\n>>\n>> * lib/target-supports.exp: Generate\n>> check_effective_target_arm_arch_v8r_ok, add_options_for_arm_arch_v8r\n>> and check_effective_target_arm_arch_v8r_multilib.\n>>\n>> *** libgcc/ChangeLog ***\n>>\n>> 2017-01-31 Thomas Preud'homme <thomas.preudhomme@arm.com>\n>>\n>> * config/arm/lib1funcs.S: Defined __ARM_ARCH__ to 8 for ARMv8-R.\n>>\n>> Tested by building an arm-none-eabi GCC cross-compiler targetting\n>> ARMv8-R.\n>>\n>> Is this ok for stage1?\n>>\n>> Best regards,\n>>\n>> Thomas", "diff": "diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in\nindex 946d543ebb29416da9b4928161607cccacaa78a7..f35128acb7d68c6a0592355b9d3d56ee8f826aca 100644\n--- a/gcc/config/arm/arm-cpus.in\n+++ b/gcc/config/arm/arm-cpus.in\n@@ -380,6 +380,22 @@ begin arch armv8-m.main\n option nodsp remove bit_ARMv7em\n end arch armv8-m.main\n \n+begin arch armv8-r\n+ tune for cortex-r4\n+ tune flags CO_PROC\n+ base 8R\n+ profile R\n+ isa ARMv8r\n+ option crc add bit_crc32\n+# fp.sp => fp-armv8 (d16); simd => simd + fp-armv8 + d32 + double precision\n+# note: no fp option for fp-armv8 (d16) + double precision at the moment\n+ option fp.sp add FP_ARMv8\n+ option simd add FP_ARMv8 NEON\n+ option crypto add FP_ARMv8 CRYPTO\n+ option nocrypto remove ALL_CRYPTO\n+ option nofp remove ALL_FP\n+end arch armv8-r\n+\n begin arch iwmmxt\n tune for iwmmxt\n tune flags LDSCHED STRONG XSCALE\ndiff --git a/gcc/config/arm/arm-isa.h b/gcc/config/arm/arm-isa.h\nindex c0c2ccee330f2313951e980c5d399ae5d21005d6..0d66a0400c517668db023fc66ff43e26d43add51 100644\n--- a/gcc/config/arm/arm-isa.h\n+++ b/gcc/config/arm/arm-isa.h\n@@ -127,6 +127,7 @@ enum isa_feature\n #define ISA_ARMv8_2a\tISA_ARMv8_1a, isa_bit_ARMv8_2\n #define ISA_ARMv8m_base ISA_ARMv6m, isa_bit_ARMv8, isa_bit_cmse, isa_bit_tdiv\n #define ISA_ARMv8m_main ISA_ARMv7m, isa_bit_ARMv8, isa_bit_cmse\n+#define ISA_ARMv8r\tISA_ARMv8a\n \n /* List of all cryptographic extensions to stripout if crypto is\n disabled. Currently, that's trivial, but we define it anyway for\ndiff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt\nindex 5e2df9dd0716293fb551b6582a8c9c2c46fdaa90..51678c2566e841894c5c0e9c613c8c0f832e9988 100644\n--- a/gcc/config/arm/arm-tables.opt\n+++ b/gcc/config/arm/arm-tables.opt\n@@ -455,10 +455,13 @@ EnumValue\n Enum(arm_arch) String(armv8-m.main) Value(30)\n \n EnumValue\n-Enum(arm_arch) String(iwmmxt) Value(31)\n+Enum(arm_arch) String(armv8-r) Value(31)\n \n EnumValue\n-Enum(arm_arch) String(iwmmxt2) Value(32)\n+Enum(arm_arch) String(iwmmxt) Value(32)\n+\n+EnumValue\n+Enum(arm_arch) String(iwmmxt2) Value(33)\n \n Enum\n Name(arm_fpu) Type(enum fpu_type)\ndiff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h\nindex c803d4461c08436ef5f8468f6018e3226ccf33f8..315622212a5ce10d0c771535fe31f63c3be16444 100644\n--- a/gcc/config/arm/arm.h\n+++ b/gcc/config/arm/arm.h\n@@ -384,7 +384,8 @@ enum base_architecture\n BASE_ARCH_7EM = 7,\n BASE_ARCH_8A = 8,\n BASE_ARCH_8M_BASE = 8,\n- BASE_ARCH_8M_MAIN = 8\n+ BASE_ARCH_8M_MAIN = 8,\n+ BASE_ARCH_8R = 8\n };\n \n /* The major revision number of the ARM Architecture implemented by the target. */\ndiff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi\nindex 3e5cee8649ef9452e2a7e5a8603318ce11e2baff..d0b90503cedaae32bc83c7fd1fdd78b2a4d7184b 100644\n--- a/gcc/doc/invoke.texi\n+++ b/gcc/doc/invoke.texi\n@@ -15218,6 +15218,7 @@ Permissible names are:\n @samp{armv7}, @samp{armv7-a}, @samp{armv7ve}, \n @samp{armv8-a}, @samp{armv8.1-a}, @samp{armv8.2-a},\n @samp{armv7-r},\n+@samp{armv8-r},\n @samp{armv6-m}, @samp{armv6s-m},\n @samp{armv7-m}, @samp{armv7e-m},\n @samp{armv8-m.base}, @samp{armv8-m.main},\n@@ -15484,7 +15485,20 @@ The single- and double-precision floating-point instructions.\n \n @item +nofp\n Disable the floating-point extension.\n+@end table\n \n+@item armv8-r\n+@table @samp\n+@item +crc\n+The Cyclic Redundancy Check (CRC) instructions.\n+@item +simd\n+The ARMv8 Advanced SIMD and floating-point instructions.\n+@item +crypto\n+The cryptographic instructions.\n+@item +nocrypto\n+Disable the cryptographic isntructions.\n+@item +nofp\n+Disable the floating-point, Advanced SIMD and cryptographic instructions.\n @end table\n \n @end table\ndiff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp\nindex fe5e77756404d603f04d674bb5ca872956d4b7ad..83d0c7ca441570dbf4d52641d12073f17d06e025 100644\n--- a/gcc/testsuite/lib/target-supports.exp\n+++ b/gcc/testsuite/lib/target-supports.exp\n@@ -3890,7 +3890,8 @@ foreach { armfunc armflag armdefs } {\n \tv8_2a \"-march=armv8.2a\" __ARM_ARCH_8A__\n \tv8m_base \"-march=armv8-m.base -mthumb -mfloat-abi=soft\"\n \t\t__ARM_ARCH_8M_BASE__\n-\tv8m_main \"-march=armv8-m.main -mthumb\" __ARM_ARCH_8M_MAIN__ } {\n+\tv8m_main \"-march=armv8-m.main -mthumb\" __ARM_ARCH_8M_MAIN__\n+\tv8r \"-march=armv8-r\" __ARM_ARCH_8R__ } {\n eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {\n \tproc check_effective_target_arm_arch_FUNC_ok { } {\n \t if { [ string match \"*-marm*\" \"FLAG\" ] &&\ndiff --git a/libgcc/config/arm/lib1funcs.S b/libgcc/config/arm/lib1funcs.S\nindex 89ebebcd68a790c6bec140e4a8bd5a3b44dce291..8d8c3cead5f77f6dfeb2887e68483119ee3a400a 100644\n--- a/libgcc/config/arm/lib1funcs.S\n+++ b/libgcc/config/arm/lib1funcs.S\n@@ -109,7 +109,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see\n #endif\n \n #if defined(__ARM_ARCH_8A__) || defined(__ARM_ARCH_8M_BASE__) \\\n-\t|| defined(__ARM_ARCH_8M_MAIN__)\n+\t|| defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8R__)\n # define __ARM_ARCH__ 8\n #endif\n \n", "prefixes": [ "arm-embedded", "2/3", "GCC/ARM" ] }