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GET /api/patches/810658/?format=api
{ "id": 810658, "url": "http://patchwork.ozlabs.org/api/patches/810658/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170906144940.30880-14-richard.henderson@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170906144940.30880-14-richard.henderson@linaro.org>", "list_archive_url": null, "date": "2017-09-06T14:49:39", "name": "[PULL,13/14] tcg/s390: Use load-on-condition-2 facility", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "6a5c5fed03ac0bb47e8cc5835d9693eacc6e6b64", "submitter": { "id": 72104, "url": "http://patchwork.ozlabs.org/api/people/72104/?format=api", "name": "Richard Henderson", "email": "richard.henderson@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170906144940.30880-14-richard.henderson@linaro.org/mbox/", "series": [ { "id": 1829, "url": "http://patchwork.ozlabs.org/api/series/1829/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=1829", "date": "2017-09-06T14:49:28", "name": "[PULL,01/14] tcg: Remove support for ia64 as host", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/1829/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/810658/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/810658/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"NJlHFkDG\"; dkim-atps=neutral" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xnRXs6P34z9s7C\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 7 Sep 2017 00:58:21 +1000 (AEST)", "from localhost ([::1]:36557 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dpbmV-0003iH-85\n\tfor incoming@patchwork.ozlabs.org; Wed, 06 Sep 2017 10:58:19 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:40066)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <richard.henderson@linaro.org>) id 1dpbeV-0005bC-Kv\n\tfor qemu-devel@nongnu.org; Wed, 06 Sep 2017 10:50:05 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <richard.henderson@linaro.org>) id 1dpbeT-0000RZ-0C\n\tfor qemu-devel@nongnu.org; Wed, 06 Sep 2017 10:50:03 -0400", "from mail-pg0-x235.google.com ([2607:f8b0:400e:c05::235]:32783)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.71) (envelope-from <richard.henderson@linaro.org>)\n\tid 1dpbeS-0000RP-OU\n\tfor qemu-devel@nongnu.org; Wed, 06 Sep 2017 10:50:00 -0400", "by mail-pg0-x235.google.com with SMTP id t3so15708897pgt.0\n\tfor <qemu-devel@nongnu.org>; Wed, 06 Sep 2017 07:50:00 -0700 (PDT)", "from bigtime.twiddle.net (97-126-108-236.tukw.qwest.net.\n\t[97.126.108.236]) by smtp.gmail.com with ESMTPSA id\n\th1sm3467646pfg.153.2017.09.06.07.49.58\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tWed, 06 Sep 2017 07:49:58 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=pKQCwM6YTfdhlfqoAqf0ka601pYlxtzKjZe/Pv3ceOg=;\n\tb=NJlHFkDGaKjHdR6v0GdvQHz1JXoTUhWiusnKzJ/TJhEb6mAaymjFjxjlXQnPK8tH0m\n\tEwO+867nLywCaxHsT9fd4CO2dCax0zwrpU3blSQ/q1Qtf9xA6Q4dAVxiIJFHeRmgUrjp\n\t1ONHe77li9OCgl9J31p7MIvSc42SaAsYhgpYI=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=pKQCwM6YTfdhlfqoAqf0ka601pYlxtzKjZe/Pv3ceOg=;\n\tb=d8NWi2LU1FealKniR20rwJgMBrteRKdcuzB7xUpCa91ITzaY+4zxgJY3VPWZiolVM/\n\t/ehPgHLnjkb+RShak+tkmLxQdFqJi+PH2jUXHzoIoDrRtyclo1DA4j8xdHS6nYCk/hKl\n\t2Af3d/PsVP+heqM9az8U9ktK96KwTSEh855fcIfjXZt2xzmpYcqIoc/6VhZj+gAdpbab\n\tMuJv0rxKsw1heLvbQNp1YjaflelPZtdUwzooKpEPe6cwZ7GlHfuT8kNZuw8e7KyhXoMa\n\tZ9P9a8SrAoF5txeLGvWEKpe37LZUw0jp/mzXWqwr9BT9lT0Ks7opE1PMEN2A4xDGpK7G\n\t8TcQ==", "X-Gm-Message-State": "AHPjjUhpRgMerPBoQlOQiDkY4cU+ChF4aPSpZr3mAXu02SMa3JE+SXxh\n\tNKNbxE36kWunaCBl+GW7Fw==", "X-Google-Smtp-Source": "ADKCNb7a5V1iGhDisTmu9TBUEM/z5o0zUaWxMl/9a1IuouJjLAT2U2Wjm5F2kNsQv8WHQewxYkerrg==", "X-Received": "by 10.84.194.3 with SMTP id g3mr3621408pld.246.1504709399445;\n\tWed, 06 Sep 2017 07:49:59 -0700 (PDT)", "From": "Richard Henderson <richard.henderson@linaro.org>", "To": "qemu-devel@nongnu.org", "Date": "Wed, 6 Sep 2017 07:49:39 -0700", "Message-Id": "<20170906144940.30880-14-richard.henderson@linaro.org>", "X-Mailer": "git-send-email 2.13.5", "In-Reply-To": "<20170906144940.30880-1-richard.henderson@linaro.org>", "References": "<20170906144940.30880-1-richard.henderson@linaro.org>", "X-detected-operating-system": "by eggs.gnu.org: Genre and OS details not\n\trecognized.", "X-Received-From": "2607:f8b0:400e:c05::235", "Subject": "[Qemu-devel] [PULL 13/14] tcg/s390: Use load-on-condition-2 facility", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "peter.maydell@linaro.org, Richard Henderson <rth@twiddle.net>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "From: Richard Henderson <rth@twiddle.net>\n\nThis allows LOAD HALFWORD IMMEDIATE ON CONDITION,\neliminating one insn in some common cases.\n\nAcked-by: Cornelia Huck <cohuck@redhat.com>\nSigned-off-by: Richard Henderson <rth@twiddle.net>\n---\n tcg/s390/tcg-target.h | 1 +\n tcg/s390/tcg-target.inc.c | 79 +++++++++++++++++++++++++++++++++++++----------\n 2 files changed, 63 insertions(+), 17 deletions(-)", "diff": "diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h\nindex f7619a9ef1..bedda5edf6 100644\n--- a/tcg/s390/tcg-target.h\n+++ b/tcg/s390/tcg-target.h\n@@ -59,6 +59,7 @@ typedef enum TCGReg {\n #define FACILITY_LOAD_ON_COND (1ULL << (63 - 45))\n #define FACILITY_FAST_BCR_SER FACILITY_LOAD_ON_COND\n #define FACILITY_DISTINCT_OPS FACILITY_LOAD_ON_COND\n+#define FACILITY_LOAD_ON_COND2 (1ULL << (63 - 53))\n \n extern uint64_t s390_facilities;\n \ndiff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c\nindex a80b07db65..0de968fde2 100644\n--- a/tcg/s390/tcg-target.inc.c\n+++ b/tcg/s390/tcg-target.inc.c\n@@ -122,6 +122,7 @@ typedef enum S390Opcode {\n RIE_CLGIJ = 0xec7d,\n RIE_CLRJ = 0xec77,\n RIE_CRJ = 0xec76,\n+ RIE_LOCGHI = 0xec46,\n RIE_RISBG = 0xec55,\n \n RRE_AGR = 0xb908,\n@@ -495,6 +496,13 @@ static void tcg_out_insn_RI(TCGContext *s, S390Opcode op, TCGReg r1, int i2)\n tcg_out32(s, (op << 16) | (r1 << 20) | (i2 & 0xffff));\n }\n \n+static void tcg_out_insn_RIE(TCGContext *s, S390Opcode op, TCGReg r1,\n+ int i2, int m3)\n+{\n+ tcg_out16(s, (op & 0xff00) | (r1 << 4) | m3);\n+ tcg_out32(s, (i2 << 16) | (op & 0xff));\n+}\n+\n static void tcg_out_insn_RIL(TCGContext *s, S390Opcode op, TCGReg r1, int i2)\n {\n tcg_out16(s, op | (r1 << 4));\n@@ -1063,7 +1071,20 @@ static void tgen_setcond(TCGContext *s, TCGType type, TCGCond cond,\n TCGReg dest, TCGReg c1, TCGArg c2, int c2const)\n {\n int cc;\n+ bool have_loc;\n \n+ /* With LOC2, we can always emit the minimum 3 insns. */\n+ if (s390_facilities & FACILITY_LOAD_ON_COND2) {\n+ /* Emit: d = 0, d = (cc ? 1 : d). */\n+ cc = tgen_cmp(s, type, cond, c1, c2, c2const, false);\n+ tcg_out_movi(s, TCG_TYPE_I64, dest, 0);\n+ tcg_out_insn(s, RIE, LOCGHI, dest, 1, cc);\n+ return;\n+ }\n+\n+ have_loc = (s390_facilities & FACILITY_LOAD_ON_COND) != 0;\n+\n+ /* For HAVE_LOC, only the path through do_greater is smaller. */\n switch (cond) {\n case TCG_COND_GTU:\n case TCG_COND_GT:\n@@ -1076,6 +1097,9 @@ static void tgen_setcond(TCGContext *s, TCGType type, TCGCond cond,\n return;\n \n case TCG_COND_GEU:\n+ if (have_loc) {\n+ goto do_loc;\n+ }\n do_geu:\n /* We need \"real\" carry semantics, so use SUBTRACT LOGICAL\n instead of COMPARE LOGICAL. This may need an extra move. */\n@@ -1105,10 +1129,17 @@ static void tgen_setcond(TCGContext *s, TCGType type, TCGCond cond,\n return;\n \n case TCG_COND_LEU:\n+ if (have_loc) {\n+ goto do_loc;\n+ }\n+ /* fallthru */\n case TCG_COND_LTU:\n case TCG_COND_LT:\n /* Swap operands so that we can use GEU/GTU/GT. */\n if (c2const) {\n+ if (have_loc) {\n+ goto do_loc;\n+ }\n tcg_out_movi(s, type, TCG_TMP0, c2);\n c2 = c1;\n c2const = 0;\n@@ -1133,6 +1164,9 @@ static void tgen_setcond(TCGContext *s, TCGType type, TCGCond cond,\n break;\n \n case TCG_COND_EQ:\n+ if (have_loc) {\n+ goto do_loc;\n+ }\n /* X == 0 is X <= 0 is 0 >= X. */\n if (c2const && c2 == 0) {\n tcg_out_movi(s, TCG_TYPE_I64, TCG_TMP0, 0);\n@@ -1148,33 +1182,39 @@ static void tgen_setcond(TCGContext *s, TCGType type, TCGCond cond,\n }\n \n cc = tgen_cmp(s, type, cond, c1, c2, c2const, false);\n- if (s390_facilities & FACILITY_LOAD_ON_COND) {\n- /* Emit: d = 0, t = 1, d = (cc ? t : d). */\n- tcg_out_movi(s, TCG_TYPE_I64, dest, 0);\n- tcg_out_movi(s, TCG_TYPE_I64, TCG_TMP0, 1);\n- tcg_out_insn(s, RRF, LOCGR, dest, TCG_TMP0, cc);\n- } else {\n- /* Emit: d = 1; if (cc) goto over; d = 0; over: */\n- tcg_out_movi(s, type, dest, 1);\n- tcg_out_insn(s, RI, BRC, cc, (4 + 4) >> 1);\n- tcg_out_movi(s, type, dest, 0);\n- }\n+ /* Emit: d = 1; if (cc) goto over; d = 0; over: */\n+ tcg_out_movi(s, type, dest, 1);\n+ tcg_out_insn(s, RI, BRC, cc, (4 + 4) >> 1);\n+ tcg_out_movi(s, type, dest, 0);\n+ return;\n+\n+ do_loc:\n+ cc = tgen_cmp(s, type, cond, c1, c2, c2const, false);\n+ /* Emit: d = 0, t = 1, d = (cc ? t : d). */\n+ tcg_out_movi(s, TCG_TYPE_I64, dest, 0);\n+ tcg_out_movi(s, TCG_TYPE_I64, TCG_TMP0, 1);\n+ tcg_out_insn(s, RRF, LOCGR, dest, TCG_TMP0, cc);\n }\n \n static void tgen_movcond(TCGContext *s, TCGType type, TCGCond c, TCGReg dest,\n- TCGReg c1, TCGArg c2, int c2const, TCGReg r3)\n+ TCGReg c1, TCGArg c2, int c2const,\n+ TCGArg v3, int v3const)\n {\n int cc;\n if (s390_facilities & FACILITY_LOAD_ON_COND) {\n cc = tgen_cmp(s, type, c, c1, c2, c2const, false);\n- tcg_out_insn(s, RRF, LOCGR, dest, r3, cc);\n+ if (v3const) {\n+ tcg_out_insn(s, RIE, LOCGHI, dest, v3, cc);\n+ } else {\n+ tcg_out_insn(s, RRF, LOCGR, dest, v3, cc);\n+ }\n } else {\n c = tcg_invert_cond(c);\n cc = tgen_cmp(s, type, c, c1, c2, c2const, false);\n \n /* Emit: if (cc) goto over; dest = r3; over: */\n tcg_out_insn(s, RI, BRC, cc, (4 + 4) >> 1);\n- tcg_out_insn(s, RRE, LGR, dest, r3);\n+ tcg_out_insn(s, RRE, LGR, dest, v3);\n }\n }\n \n@@ -1937,7 +1977,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,\n break;\n case INDEX_op_movcond_i32:\n tgen_movcond(s, TCG_TYPE_I32, args[5], args[0], args[1],\n- args[2], const_args[2], args[3]);\n+ args[2], const_args[2], args[3], const_args[3]);\n break;\n \n case INDEX_op_qemu_ld_i32:\n@@ -2170,7 +2210,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,\n break;\n case INDEX_op_movcond_i64:\n tgen_movcond(s, TCG_TYPE_I64, args[5], args[0], args[1],\n- args[2], const_args[2], args[3]);\n+ args[2], const_args[2], args[3], const_args[3]);\n break;\n \n OP_32_64(deposit):\n@@ -2391,7 +2431,12 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)\n = { .args_ct_str = { \"r\", \"r\", \"rZ\", \"r\", \"0\" } };\n static const TCGTargetOpDef movc_c\n = { .args_ct_str = { \"r\", \"r\", \"rC\", \"r\", \"0\" } };\n- return (s390_facilities & FACILITY_EXT_IMM ? &movc_c : &movc_z);\n+ static const TCGTargetOpDef movc_l\n+ = { .args_ct_str = { \"r\", \"r\", \"rC\", \"rI\", \"0\" } };\n+ return (s390_facilities & FACILITY_EXT_IMM\n+ ? (s390_facilities & FACILITY_LOAD_ON_COND2\n+ ? &movc_l : &movc_c)\n+ : &movc_z);\n }\n case INDEX_op_div2_i32:\n case INDEX_op_div2_i64:\n", "prefixes": [ "PULL", "13/14" ] }