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{
    "id": 810593,
    "url": "http://patchwork.ozlabs.org/api/patches/810593/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/1504704043-8052-18-git-send-email-rf@opensource.wolfsonmicro.com/",
    "project": {
        "id": 42,
        "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api",
        "name": "Linux GPIO development",
        "link_name": "linux-gpio",
        "list_id": "linux-gpio.vger.kernel.org",
        "list_email": "linux-gpio@vger.kernel.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<1504704043-8052-18-git-send-email-rf@opensource.wolfsonmicro.com>",
    "list_archive_url": null,
    "date": "2017-09-06T13:20:43",
    "name": "[v5,17/17] ASoC: cs47l90: Add codec driver for Cirrus Logic CS47L90",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "f8dedfce9652af0efe0812180430faa82942dd9a",
    "submitter": {
        "id": 65141,
        "url": "http://patchwork.ozlabs.org/api/people/65141/?format=api",
        "name": "Richard Fitzgerald",
        "email": "rf@opensource.wolfsonmicro.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/1504704043-8052-18-git-send-email-rf@opensource.wolfsonmicro.com/mbox/",
    "series": [
        {
            "id": 1804,
            "url": "http://patchwork.ozlabs.org/api/series/1804/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=1804",
            "date": "2017-09-06T13:20:36",
            "name": "Add support for Cirrus Logic CS47L35/L85/L90/L91 codecs",
            "version": 5,
            "mbox": "http://patchwork.ozlabs.org/series/1804/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/810593/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/810593/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<linux-gpio-owner@vger.kernel.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org",
        "Authentication-Results": [
            "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)",
            "ppops.net;\n\tspf=none smtp.mailfrom=rf@opensource.wolfsonmicro.com"
        ],
        "Received": [
            "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xnPT464h8z9t3Z\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed,  6 Sep 2017 23:24:56 +1000 (AEST)",
            "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1754434AbdIFNXS (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tWed, 6 Sep 2017 09:23:18 -0400",
            "from mx0a-001ae601.pphosted.com ([67.231.149.25]:40664 \"EHLO\n\tmx0b-001ae601.pphosted.com\" rhost-flags-OK-OK-OK-FAIL)\n\tby vger.kernel.org with ESMTP id S1754600AbdIFNVJ (ORCPT\n\t<rfc822; linux-gpio@vger.kernel.org>); Wed, 6 Sep 2017 09:21:09 -0400",
            "from pps.filterd (m0077473.ppops.net [127.0.0.1])\n\tby mx0a-001ae601.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv86DK6ZU000460; Wed, 6 Sep 2017 08:20:49 -0500",
            "from mail1.cirrus.com (mail1.cirrus.com [141.131.3.20])\n\tby mx0a-001ae601.pphosted.com with ESMTP id 2cqt20jwj8-1;\n\tWed, 06 Sep 2017 08:20:48 -0500",
            "from EX17.ad.cirrus.com (unknown [172.20.9.81])\n\tby mail1.cirrus.com (Postfix) with ESMTP id D75526121ACE;\n\tWed,  6 Sep 2017 08:20:47 -0500 (CDT)",
            "from imbe.wolfsonmicro.main (198.61.95.81) by EX17.ad.cirrus.com\n\t(172.20.9.81) with Microsoft SMTP Server id 14.3.301.0;\n\tWed, 6 Sep 2017 14:20:45 +0100",
            "from rf-debian.ad.cirrus.com (rf-debian.ad.cirrus.com\n\t[198.90.223.45]) by imbe.wolfsonmicro.main (8.14.4/8.14.4) with ESMTP\n\tid v86DKhDb032150;        Wed, 6 Sep 2017 14:20:45 +0100"
        ],
        "From": "Richard Fitzgerald <rf@opensource.wolfsonmicro.com>",
        "To": "<lee.jones@linaro.org>, <broonie@kernel.org>,\n\t<linus.walleij@linaro.org>, <gnurou@gmail.com>,\n\t<robh+dt@kernel.org>, <tglx@linutronix.de>, <jason@lakedaemon.net>",
        "CC": "<alsa-devel@alsa-project.org>, <patches@opensource.wolfsonmicro.com>,\n\t<linux-gpio@vger.kernel.org>, <devicetree@vger.kernel.org>,\n\t<linux-kernel@vger.kernel.org>",
        "Subject": "[PATCH v5 17/17] ASoC: cs47l90: Add codec driver for Cirrus Logic\n\tCS47L90",
        "Date": "Wed, 6 Sep 2017 14:20:43 +0100",
        "Message-ID": "<1504704043-8052-18-git-send-email-rf@opensource.wolfsonmicro.com>",
        "X-Mailer": "git-send-email 1.9.1",
        "In-Reply-To": "<1504704043-8052-1-git-send-email-rf@opensource.wolfsonmicro.com>",
        "References": "<1504704043-8052-1-git-send-email-rf@opensource.wolfsonmicro.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-Proofpoint-Spam-Details": "rule=notspam policy=default score=0\n\tpriorityscore=1501 malwarescore=0\n\tsuspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015\n\tlowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam\n\tadjust=0\n\treason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1709060186",
        "Sender": "linux-gpio-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<linux-gpio.vger.kernel.org>",
        "X-Mailing-List": "linux-gpio@vger.kernel.org"
    },
    "content": "Adds the codec driver for the CS47L90 SmartCodec. This is a\nmulti-functional codec based on the Cirrus Logic Madera platform.\n\nSigned-off-by: Nikesh Oswal <nikesh@opensource.wolfsonmicro.com>\nSigned-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>\nSigned-off-by: Richard Fitzgerald <rf@opensource.wolfsonmicro.com>\n---\nChanges since V4:\n- replaced use of trivial wrapper function around blocking_notifier_call_chain\n  with a direct call\n- removed renaming of bus error interrupts, this belongs in patch #14\n\n sound/soc/codecs/Kconfig   |    6 +\n sound/soc/codecs/Makefile  |    2 +\n sound/soc/codecs/cs47l90.c | 2661 ++++++++++++++++++++++++++++++++++++++++++++\n 3 files changed, 2669 insertions(+)\n create mode 100644 sound/soc/codecs/cs47l90.c",
    "diff": "diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig\nindex f50de38..2c9ab5f 100644\n--- a/sound/soc/codecs/Kconfig\n+++ b/sound/soc/codecs/Kconfig\n@@ -65,6 +65,7 @@ config SND_SOC_ALL_CODECS\n \tselect SND_SOC_CS47L24 if MFD_CS47L24\n \tselect SND_SOC_CS47L35 if MFD_CS47L35\n \tselect SND_SOC_CS47L85 if MFD_CS47L85\n+\tselect SND_SOC_CS47L90 if MFD_CS47L90\n \tselect SND_SOC_CS53L30 if I2C\n \tselect SND_SOC_CX20442 if TTY\n \tselect SND_SOC_DA7210 if SND_SOC_I2C_AND_SPI\n@@ -512,6 +513,9 @@ config SND_SOC_CS47L35\n config SND_SOC_CS47L85\n \ttristate\n \n+config SND_SOC_CS47L90\n+\ttristate\n+\n # Cirrus Logic Quad-Channel ADC\n config SND_SOC_CS53L30\n \ttristate \"Cirrus Logic CS53L30 CODEC\"\n@@ -605,8 +609,10 @@ config SND_SOC_MADERA\n \ttristate\n \tdefault y if SND_SOC_CS47L35=y\n \tdefault y if SND_SOC_CS47L85=y\n+\tdefault y if SND_SOC_CS47L90=y\n \tdefault m if SND_SOC_CS47L35=m\n \tdefault m if SND_SOC_CS47L85=m\n+\tdefault m if SND_SOC_CS47L90=m\n \n config SND_SOC_MAX98088\n        tristate\ndiff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile\nindex 0831d35..f7c0d82 100644\n--- a/sound/soc/codecs/Makefile\n+++ b/sound/soc/codecs/Makefile\n@@ -58,6 +58,7 @@ snd-soc-cs4349-objs := cs4349.o\n snd-soc-cs47l24-objs := cs47l24.o\n snd-soc-cs47l35-objs := cs47l35.o\n snd-soc-cs47l85-objs := cs47l85.o\n+snd-soc-cs47l90-objs := cs47l90.o\n snd-soc-cs53l30-objs := cs53l30.o\n snd-soc-cx20442-objs := cx20442.o\n snd-soc-da7210-objs := da7210.o\n@@ -301,6 +302,7 @@ obj-$(CONFIG_SND_SOC_CS4349)\t+= snd-soc-cs4349.o\n obj-$(CONFIG_SND_SOC_CS47L24)\t+= snd-soc-cs47l24.o\n obj-$(CONFIG_SND_SOC_CS47L35)\t+= snd-soc-cs47l35.o\n obj-$(CONFIG_SND_SOC_CS47L85)\t+= snd-soc-cs47l85.o\n+obj-$(CONFIG_SND_SOC_CS47L90)\t+= snd-soc-cs47l90.o\n obj-$(CONFIG_SND_SOC_CS53L30)\t+= snd-soc-cs53l30.o\n obj-$(CONFIG_SND_SOC_CX20442)\t+= snd-soc-cx20442.o\n obj-$(CONFIG_SND_SOC_DA7210)\t+= snd-soc-da7210.o\ndiff --git a/sound/soc/codecs/cs47l90.c b/sound/soc/codecs/cs47l90.c\nnew file mode 100644\nindex 0000000..4e61034\n--- /dev/null\n+++ b/sound/soc/codecs/cs47l90.c\n@@ -0,0 +1,2661 @@\n+/*\n+ * cs47l90.c  --  ALSA SoC Audio driver for CS47L90 codecs\n+ *\n+ * Copyright 2015-2017 Cirrus Logic\n+ *\n+ * Author: Nikesh Oswal <nikesh@opensource.wolfsonmicro.com>\n+ *\n+ * This program is free software; you can redistribute it and/or modify\n+ * it under the terms of the GNU General Public License version 2 as\n+ * published by the Free Software Foundation.\n+ */\n+\n+#include <linux/module.h>\n+#include <linux/moduleparam.h>\n+#include <linux/device.h>\n+#include <linux/delay.h>\n+#include <linux/init.h>\n+#include <linux/pm.h>\n+#include <linux/pm_runtime.h>\n+#include <linux/regmap.h>\n+#include <sound/core.h>\n+#include <sound/pcm.h>\n+#include <sound/pcm_params.h>\n+#include <sound/soc.h>\n+#include <sound/tlv.h>\n+\n+#include <linux/mfd/madera/core.h>\n+#include <linux/mfd/madera/registers.h>\n+\n+#include \"madera.h\"\n+#include \"wm_adsp.h\"\n+\n+#define CS47L90_NUM_ADSP\t7\n+#define CS47L90_MONO_OUTPUTS\t3\n+\n+struct cs47l90 {\n+\tstruct madera_priv core;\n+\tstruct madera_fll fll[3];\n+};\n+\n+static const struct wm_adsp_region cs47l90_dsp1_regions[] = {\n+\t{ .type = WMFW_ADSP2_PM, .base = 0x080000 },\n+\t{ .type = WMFW_ADSP2_ZM, .base = 0x0e0000 },\n+\t{ .type = WMFW_ADSP2_XM, .base = 0x0a0000 },\n+\t{ .type = WMFW_ADSP2_YM, .base = 0x0c0000 },\n+};\n+\n+static const struct wm_adsp_region cs47l90_dsp2_regions[] = {\n+\t{ .type = WMFW_ADSP2_PM, .base = 0x100000 },\n+\t{ .type = WMFW_ADSP2_ZM, .base = 0x160000 },\n+\t{ .type = WMFW_ADSP2_XM, .base = 0x120000 },\n+\t{ .type = WMFW_ADSP2_YM, .base = 0x140000 },\n+};\n+\n+static const struct wm_adsp_region cs47l90_dsp3_regions[] = {\n+\t{ .type = WMFW_ADSP2_PM, .base = 0x180000 },\n+\t{ .type = WMFW_ADSP2_ZM, .base = 0x1e0000 },\n+\t{ .type = WMFW_ADSP2_XM, .base = 0x1a0000 },\n+\t{ .type = WMFW_ADSP2_YM, .base = 0x1c0000 },\n+};\n+\n+static const struct wm_adsp_region cs47l90_dsp4_regions[] = {\n+\t{ .type = WMFW_ADSP2_PM, .base = 0x200000 },\n+\t{ .type = WMFW_ADSP2_ZM, .base = 0x260000 },\n+\t{ .type = WMFW_ADSP2_XM, .base = 0x220000 },\n+\t{ .type = WMFW_ADSP2_YM, .base = 0x240000 },\n+};\n+\n+static const struct wm_adsp_region cs47l90_dsp5_regions[] = {\n+\t{ .type = WMFW_ADSP2_PM, .base = 0x280000 },\n+\t{ .type = WMFW_ADSP2_ZM, .base = 0x2e0000 },\n+\t{ .type = WMFW_ADSP2_XM, .base = 0x2a0000 },\n+\t{ .type = WMFW_ADSP2_YM, .base = 0x2c0000 },\n+};\n+\n+static const struct wm_adsp_region cs47l90_dsp6_regions[] = {\n+\t{ .type = WMFW_ADSP2_PM, .base = 0x300000 },\n+\t{ .type = WMFW_ADSP2_ZM, .base = 0x360000 },\n+\t{ .type = WMFW_ADSP2_XM, .base = 0x320000 },\n+\t{ .type = WMFW_ADSP2_YM, .base = 0x340000 },\n+};\n+\n+static const struct wm_adsp_region cs47l90_dsp7_regions[] = {\n+\t{ .type = WMFW_ADSP2_PM, .base = 0x380000 },\n+\t{ .type = WMFW_ADSP2_ZM, .base = 0x3e0000 },\n+\t{ .type = WMFW_ADSP2_XM, .base = 0x3a0000 },\n+\t{ .type = WMFW_ADSP2_YM, .base = 0x3c0000 },\n+};\n+\n+static const struct wm_adsp_region *cs47l90_dsp_regions[] = {\n+\tcs47l90_dsp1_regions,\n+\tcs47l90_dsp2_regions,\n+\tcs47l90_dsp3_regions,\n+\tcs47l90_dsp4_regions,\n+\tcs47l90_dsp5_regions,\n+\tcs47l90_dsp6_regions,\n+\tcs47l90_dsp7_regions,\n+};\n+\n+static const int cs47l90_dsp_control_bases[] = {\n+\tMADERA_DSP1_CONFIG_1,\n+\tMADERA_DSP2_CONFIG_1,\n+\tMADERA_DSP3_CONFIG_1,\n+\tMADERA_DSP4_CONFIG_1,\n+\tMADERA_DSP5_CONFIG_1,\n+\tMADERA_DSP6_CONFIG_1,\n+\tMADERA_DSP7_CONFIG_1,\n+};\n+\n+static int cs47l90_adsp_power_ev(struct snd_soc_dapm_widget *w,\n+\t\t\t\t struct snd_kcontrol *kcontrol,\n+\t\t\t\t int event)\n+{\n+\tstruct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);\n+\tstruct cs47l90 *cs47l90 = snd_soc_codec_get_drvdata(codec);\n+\tstruct madera_priv *priv = &cs47l90->core;\n+\tstruct madera *madera = priv->madera;\n+\tunsigned int freq;\n+\tint ret;\n+\n+\tret = regmap_read(madera->regmap, MADERA_DSP_CLOCK_2, &freq);\n+\tif (ret != 0) {\n+\t\tdev_err(madera->dev,\n+\t\t\t\"Failed to read MADERA_DSP_CLOCK_2: %d\\n\", ret);\n+\t\treturn ret;\n+\t}\n+\n+\tswitch (event) {\n+\tcase SND_SOC_DAPM_PRE_PMU:\n+\t\tret = madera_set_adsp_clk(&cs47l90->core, w->shift, freq);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t\tbreak;\n+\tdefault:\n+\t\tbreak;\n+\t}\n+\n+\treturn wm_adsp2_early_event(w, kcontrol, event, freq);\n+}\n+\n+#define CS47L90_NG_SRC(name, base) \\\n+\tSOC_SINGLE(name \" NG HPOUT1L Switch\",  base,  0, 1, 0), \\\n+\tSOC_SINGLE(name \" NG HPOUT1R Switch\",  base,  1, 1, 0), \\\n+\tSOC_SINGLE(name \" NG HPOUT2L Switch\",  base,  2, 1, 0), \\\n+\tSOC_SINGLE(name \" NG HPOUT2R Switch\",  base,  3, 1, 0), \\\n+\tSOC_SINGLE(name \" NG HPOUT3L Switch\",  base,  4, 1, 0), \\\n+\tSOC_SINGLE(name \" NG HPOUT3R Switch\",  base,  5, 1, 0), \\\n+\tSOC_SINGLE(name \" NG SPKDAT1L Switch\", base,  8, 1, 0), \\\n+\tSOC_SINGLE(name \" NG SPKDAT1R Switch\", base,  9, 1, 0)\n+\n+#define CS47L90_RXANC_INPUT_ROUTES(widget, name) \\\n+\t{ widget, NULL, name \" NG Mux\" }, \\\n+\t{ name \" NG Internal\", NULL, \"RXANC NG Clock\" }, \\\n+\t{ name \" NG Internal\", NULL, name \" Channel\" }, \\\n+\t{ name \" NG External\", NULL, \"RXANC NG External Clock\" }, \\\n+\t{ name \" NG External\", NULL, name \" Channel\" }, \\\n+\t{ name \" NG Mux\", \"None\", name \" Channel\" }, \\\n+\t{ name \" NG Mux\", \"Internal\", name \" NG Internal\" }, \\\n+\t{ name \" NG Mux\", \"External\", name \" NG External\" }, \\\n+\t{ name \" Channel\", \"Left\", name \" Left Input\" }, \\\n+\t{ name \" Channel\", \"Combine\", name \" Left Input\" }, \\\n+\t{ name \" Channel\", \"Right\", name \" Right Input\" }, \\\n+\t{ name \" Channel\", \"Combine\", name \" Right Input\" }, \\\n+\t{ name \" Left Input\", \"IN1\", \"IN1L PGA\" }, \\\n+\t{ name \" Right Input\", \"IN1\", \"IN1R PGA\" }, \\\n+\t{ name \" Left Input\", \"IN2\", \"IN2L PGA\" }, \\\n+\t{ name \" Right Input\", \"IN2\", \"IN2R PGA\" }, \\\n+\t{ name \" Left Input\", \"IN3\", \"IN3L PGA\" }, \\\n+\t{ name \" Right Input\", \"IN3\", \"IN3R PGA\" }, \\\n+\t{ name \" Left Input\", \"IN4\", \"IN4L PGA\" }, \\\n+\t{ name \" Right Input\", \"IN4\", \"IN4R PGA\" }, \\\n+\t{ name \" Left Input\", \"IN5\", \"IN5L PGA\" }, \\\n+\t{ name \" Right Input\", \"IN5\", \"IN5R PGA\" }\n+\n+#define CS47L90_RXANC_OUTPUT_ROUTES(widget, name) \\\n+\t{ widget, NULL, name \" ANC Source\" }, \\\n+\t{ name \" ANC Source\", \"RXANCL\", \"RXANCL\" }, \\\n+\t{ name \" ANC Source\", \"RXANCR\", \"RXANCR\" }\n+\n+static const struct snd_kcontrol_new cs47l90_snd_controls[] = {\n+SOC_ENUM(\"IN1 OSR\", madera_in_dmic_osr[0]),\n+SOC_ENUM(\"IN2 OSR\", madera_in_dmic_osr[1]),\n+SOC_ENUM(\"IN3 OSR\", madera_in_dmic_osr[2]),\n+SOC_ENUM(\"IN4 OSR\", madera_in_dmic_osr[3]),\n+SOC_ENUM(\"IN5 OSR\", madera_in_dmic_osr[4]),\n+\n+SOC_SINGLE_RANGE_TLV(\"IN1L Volume\", MADERA_IN1L_CONTROL,\n+\t\t     MADERA_IN1L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv),\n+SOC_SINGLE_RANGE_TLV(\"IN1R Volume\", MADERA_IN1R_CONTROL,\n+\t\t     MADERA_IN1R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv),\n+SOC_SINGLE_RANGE_TLV(\"IN2L Volume\", MADERA_IN2L_CONTROL,\n+\t\t     MADERA_IN2L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv),\n+SOC_SINGLE_RANGE_TLV(\"IN2R Volume\", MADERA_IN2R_CONTROL,\n+\t\t     MADERA_IN2R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv),\n+\n+SOC_ENUM(\"IN HPF Cutoff Frequency\", madera_in_hpf_cut_enum),\n+\n+SOC_SINGLE_EXT(\"IN1L LP Switch\", MADERA_ADC_DIGITAL_VOLUME_1L,\n+\t\tMADERA_IN1L_LP_MODE_SHIFT, 1, 0,\n+\t\tsnd_soc_get_volsw, madera_lp_mode_put),\n+SOC_SINGLE_EXT(\"IN1R LP Switch\", MADERA_ADC_DIGITAL_VOLUME_1R,\n+\t\tMADERA_IN1R_LP_MODE_SHIFT, 1, 0,\n+\t\tsnd_soc_get_volsw, madera_lp_mode_put),\n+SOC_SINGLE_EXT(\"IN2L LP Switch\", MADERA_ADC_DIGITAL_VOLUME_2L,\n+\t\tMADERA_IN2L_LP_MODE_SHIFT, 1, 0,\n+\t\tsnd_soc_get_volsw, madera_lp_mode_put),\n+SOC_SINGLE_EXT(\"IN2R LP Switch\", MADERA_ADC_DIGITAL_VOLUME_2R,\n+\t\tMADERA_IN2R_LP_MODE_SHIFT, 1, 0,\n+\t\tsnd_soc_get_volsw, madera_lp_mode_put),\n+\n+SOC_SINGLE(\"IN1L HPF Switch\", MADERA_IN1L_CONTROL,\n+\t   MADERA_IN1L_HPF_SHIFT, 1, 0),\n+SOC_SINGLE(\"IN1R HPF Switch\", MADERA_IN1R_CONTROL,\n+\t   MADERA_IN1R_HPF_SHIFT, 1, 0),\n+SOC_SINGLE(\"IN2L HPF Switch\", MADERA_IN2L_CONTROL,\n+\t   MADERA_IN2L_HPF_SHIFT, 1, 0),\n+SOC_SINGLE(\"IN2R HPF Switch\", MADERA_IN2R_CONTROL,\n+\t   MADERA_IN2R_HPF_SHIFT, 1, 0),\n+SOC_SINGLE(\"IN3L HPF Switch\", MADERA_IN3L_CONTROL,\n+\t   MADERA_IN3L_HPF_SHIFT, 1, 0),\n+SOC_SINGLE(\"IN3R HPF Switch\", MADERA_IN3R_CONTROL,\n+\t   MADERA_IN3R_HPF_SHIFT, 1, 0),\n+SOC_SINGLE(\"IN4L HPF Switch\", MADERA_IN4L_CONTROL,\n+\t   MADERA_IN4L_HPF_SHIFT, 1, 0),\n+SOC_SINGLE(\"IN4R HPF Switch\", MADERA_IN4R_CONTROL,\n+\t   MADERA_IN4R_HPF_SHIFT, 1, 0),\n+SOC_SINGLE(\"IN5L HPF Switch\", MADERA_IN5L_CONTROL,\n+\t   MADERA_IN5L_HPF_SHIFT, 1, 0),\n+SOC_SINGLE(\"IN5R HPF Switch\", MADERA_IN5R_CONTROL,\n+\t   MADERA_IN5R_HPF_SHIFT, 1, 0),\n+\n+SOC_SINGLE_TLV(\"IN1L Digital Volume\", MADERA_ADC_DIGITAL_VOLUME_1L,\n+\t       MADERA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),\n+SOC_SINGLE_TLV(\"IN1R Digital Volume\", MADERA_ADC_DIGITAL_VOLUME_1R,\n+\t       MADERA_IN1R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),\n+SOC_SINGLE_TLV(\"IN2L Digital Volume\", MADERA_ADC_DIGITAL_VOLUME_2L,\n+\t       MADERA_IN2L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),\n+SOC_SINGLE_TLV(\"IN2R Digital Volume\", MADERA_ADC_DIGITAL_VOLUME_2R,\n+\t       MADERA_IN2R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),\n+SOC_SINGLE_TLV(\"IN3L Digital Volume\", MADERA_ADC_DIGITAL_VOLUME_3L,\n+\t       MADERA_IN3L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),\n+SOC_SINGLE_TLV(\"IN3R Digital Volume\", MADERA_ADC_DIGITAL_VOLUME_3R,\n+\t       MADERA_IN3R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),\n+SOC_SINGLE_TLV(\"IN4L Digital Volume\", MADERA_ADC_DIGITAL_VOLUME_4L,\n+\t       MADERA_IN4L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),\n+SOC_SINGLE_TLV(\"IN4R Digital Volume\", MADERA_ADC_DIGITAL_VOLUME_4R,\n+\t       MADERA_IN4R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),\n+SOC_SINGLE_TLV(\"IN5L Digital Volume\", MADERA_ADC_DIGITAL_VOLUME_5L,\n+\t       MADERA_IN5L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),\n+SOC_SINGLE_TLV(\"IN5R Digital Volume\", MADERA_ADC_DIGITAL_VOLUME_5R,\n+\t       MADERA_IN5R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),\n+\n+SOC_ENUM(\"Input Ramp Up\", madera_in_vi_ramp),\n+SOC_ENUM(\"Input Ramp Down\", madera_in_vd_ramp),\n+\n+SND_SOC_BYTES(\"RXANC Coefficients\", MADERA_ANC_COEFF_START,\n+\t      MADERA_ANC_COEFF_END - MADERA_ANC_COEFF_START + 1),\n+SND_SOC_BYTES(\"RXANCL Config\", MADERA_FCL_FILTER_CONTROL, 1),\n+SND_SOC_BYTES(\"RXANCL Coefficients\", MADERA_FCL_COEFF_START,\n+\t      MADERA_FCL_COEFF_END - MADERA_FCL_COEFF_START + 1),\n+SND_SOC_BYTES(\"RXANCR Config\", MADERA_FCR_FILTER_CONTROL, 1),\n+SND_SOC_BYTES(\"RXANCR Coefficients\", MADERA_FCR_COEFF_START,\n+\t      MADERA_FCR_COEFF_END - MADERA_FCR_COEFF_START + 1),\n+\n+MADERA_MIXER_CONTROLS(\"EQ1\", MADERA_EQ1MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"EQ2\", MADERA_EQ2MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"EQ3\", MADERA_EQ3MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"EQ4\", MADERA_EQ4MIX_INPUT_1_SOURCE),\n+\n+MADERA_EQ_CONTROL(\"EQ1 Coefficients\", MADERA_EQ1_2),\n+SOC_SINGLE_TLV(\"EQ1 B1 Volume\", MADERA_EQ1_1, MADERA_EQ1_B1_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+SOC_SINGLE_TLV(\"EQ1 B2 Volume\", MADERA_EQ1_1, MADERA_EQ1_B2_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+SOC_SINGLE_TLV(\"EQ1 B3 Volume\", MADERA_EQ1_1, MADERA_EQ1_B3_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+SOC_SINGLE_TLV(\"EQ1 B4 Volume\", MADERA_EQ1_2, MADERA_EQ1_B4_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+SOC_SINGLE_TLV(\"EQ1 B5 Volume\", MADERA_EQ1_2, MADERA_EQ1_B5_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+\n+MADERA_EQ_CONTROL(\"EQ2 Coefficients\", MADERA_EQ2_2),\n+SOC_SINGLE_TLV(\"EQ2 B1 Volume\", MADERA_EQ2_1, MADERA_EQ2_B1_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+SOC_SINGLE_TLV(\"EQ2 B2 Volume\", MADERA_EQ2_1, MADERA_EQ2_B2_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+SOC_SINGLE_TLV(\"EQ2 B3 Volume\", MADERA_EQ2_1, MADERA_EQ2_B3_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+SOC_SINGLE_TLV(\"EQ2 B4 Volume\", MADERA_EQ2_2, MADERA_EQ2_B4_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+SOC_SINGLE_TLV(\"EQ2 B5 Volume\", MADERA_EQ2_2, MADERA_EQ2_B5_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+\n+MADERA_EQ_CONTROL(\"EQ3 Coefficients\", MADERA_EQ3_2),\n+SOC_SINGLE_TLV(\"EQ3 B1 Volume\", MADERA_EQ3_1, MADERA_EQ3_B1_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+SOC_SINGLE_TLV(\"EQ3 B2 Volume\", MADERA_EQ3_1, MADERA_EQ3_B2_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+SOC_SINGLE_TLV(\"EQ3 B3 Volume\", MADERA_EQ3_1, MADERA_EQ3_B3_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+SOC_SINGLE_TLV(\"EQ3 B4 Volume\", MADERA_EQ3_2, MADERA_EQ3_B4_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+SOC_SINGLE_TLV(\"EQ3 B5 Volume\", MADERA_EQ3_2, MADERA_EQ3_B5_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+\n+MADERA_EQ_CONTROL(\"EQ4 Coefficients\", MADERA_EQ4_2),\n+SOC_SINGLE_TLV(\"EQ4 B1 Volume\", MADERA_EQ4_1, MADERA_EQ4_B1_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+SOC_SINGLE_TLV(\"EQ4 B2 Volume\", MADERA_EQ4_1, MADERA_EQ4_B2_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+SOC_SINGLE_TLV(\"EQ4 B3 Volume\", MADERA_EQ4_1, MADERA_EQ4_B3_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+SOC_SINGLE_TLV(\"EQ4 B4 Volume\", MADERA_EQ4_2, MADERA_EQ4_B4_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+SOC_SINGLE_TLV(\"EQ4 B5 Volume\", MADERA_EQ4_2, MADERA_EQ4_B5_GAIN_SHIFT,\n+\t       24, 0, madera_eq_tlv),\n+\n+MADERA_MIXER_CONTROLS(\"DRC1L\", MADERA_DRC1LMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"DRC1R\", MADERA_DRC1RMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"DRC2L\", MADERA_DRC2LMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"DRC2R\", MADERA_DRC2RMIX_INPUT_1_SOURCE),\n+\n+SND_SOC_BYTES_MASK(\"DRC1\", MADERA_DRC1_CTRL1, 5,\n+\t\t   MADERA_DRC1R_ENA | MADERA_DRC1L_ENA),\n+SND_SOC_BYTES_MASK(\"DRC2\", MADERA_DRC2_CTRL1, 5,\n+\t\t   MADERA_DRC2R_ENA | MADERA_DRC2L_ENA),\n+\n+MADERA_MIXER_CONTROLS(\"LHPF1\", MADERA_HPLP1MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"LHPF2\", MADERA_HPLP2MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"LHPF3\", MADERA_HPLP3MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"LHPF4\", MADERA_HPLP4MIX_INPUT_1_SOURCE),\n+\n+MADERA_LHPF_CONTROL(\"LHPF1 Coefficients\", MADERA_HPLPF1_2),\n+MADERA_LHPF_CONTROL(\"LHPF2 Coefficients\", MADERA_HPLPF2_2),\n+MADERA_LHPF_CONTROL(\"LHPF3 Coefficients\", MADERA_HPLPF3_2),\n+MADERA_LHPF_CONTROL(\"LHPF4 Coefficients\", MADERA_HPLPF4_2),\n+\n+SOC_ENUM(\"LHPF1 Mode\", madera_lhpf1_mode),\n+SOC_ENUM(\"LHPF2 Mode\", madera_lhpf2_mode),\n+SOC_ENUM(\"LHPF3 Mode\", madera_lhpf3_mode),\n+SOC_ENUM(\"LHPF4 Mode\", madera_lhpf4_mode),\n+\n+SOC_ENUM(\"Sample Rate 2\", madera_sample_rate[0]),\n+SOC_ENUM(\"Sample Rate 3\", madera_sample_rate[1]),\n+SOC_ENUM(\"ASYNC Sample Rate 2\", madera_sample_rate[2]),\n+\n+MADERA_RATE_ENUM(\"ISRC1 FSL\", madera_isrc_fsl[0]),\n+MADERA_RATE_ENUM(\"ISRC2 FSL\", madera_isrc_fsl[1]),\n+MADERA_RATE_ENUM(\"ISRC3 FSL\", madera_isrc_fsl[2]),\n+MADERA_RATE_ENUM(\"ISRC4 FSL\", madera_isrc_fsl[3]),\n+MADERA_RATE_ENUM(\"ISRC1 FSH\", madera_isrc_fsh[0]),\n+MADERA_RATE_ENUM(\"ISRC2 FSH\", madera_isrc_fsh[1]),\n+MADERA_RATE_ENUM(\"ISRC3 FSH\", madera_isrc_fsh[2]),\n+MADERA_RATE_ENUM(\"ISRC4 FSH\", madera_isrc_fsh[3]),\n+MADERA_RATE_ENUM(\"ASRC1 Rate 1\", madera_asrc1_rate[0]),\n+MADERA_RATE_ENUM(\"ASRC1 Rate 2\", madera_asrc1_rate[1]),\n+MADERA_RATE_ENUM(\"ASRC2 Rate 1\", madera_asrc2_rate[0]),\n+MADERA_RATE_ENUM(\"ASRC2 Rate 2\", madera_asrc2_rate[1]),\n+\n+MADERA_MIXER_CONTROLS(\"DSP1L\", MADERA_DSP1LMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"DSP1R\", MADERA_DSP1RMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"DSP2L\", MADERA_DSP2LMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"DSP2R\", MADERA_DSP2RMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"DSP3L\", MADERA_DSP3LMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"DSP3R\", MADERA_DSP3RMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"DSP4L\", MADERA_DSP4LMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"DSP4R\", MADERA_DSP4RMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"DSP5L\", MADERA_DSP5LMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"DSP5R\", MADERA_DSP5RMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"DSP6L\", MADERA_DSP6LMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"DSP6R\", MADERA_DSP6RMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"DSP7L\", MADERA_DSP7LMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"DSP7R\", MADERA_DSP7RMIX_INPUT_1_SOURCE),\n+\n+SOC_SINGLE_TLV(\"Noise Generator Volume\", MADERA_COMFORT_NOISE_GENERATOR,\n+\t       MADERA_NOISE_GEN_GAIN_SHIFT, 0x16, 0, madera_noise_tlv),\n+\n+MADERA_MIXER_CONTROLS(\"HPOUT1L\", MADERA_OUT1LMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"HPOUT1R\", MADERA_OUT1RMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"HPOUT2L\", MADERA_OUT2LMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"HPOUT2R\", MADERA_OUT2RMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"HPOUT3L\", MADERA_OUT3LMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"HPOUT3R\", MADERA_OUT3RMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"SPKDAT1L\", MADERA_OUT5LMIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"SPKDAT1R\", MADERA_OUT5RMIX_INPUT_1_SOURCE),\n+\n+SOC_SINGLE(\"HPOUT1 SC Protect Switch\", MADERA_HP1_SHORT_CIRCUIT_CTRL,\n+\t   MADERA_HP1_SC_ENA_SHIFT, 1, 0),\n+SOC_SINGLE(\"HPOUT2 SC Protect Switch\", MADERA_HP2_SHORT_CIRCUIT_CTRL,\n+\t   MADERA_HP2_SC_ENA_SHIFT, 1, 0),\n+SOC_SINGLE(\"HPOUT3 SC Protect Switch\", MADERA_HP3_SHORT_CIRCUIT_CTRL,\n+\t   MADERA_HP3_SC_ENA_SHIFT, 1, 0),\n+\n+SOC_SINGLE(\"SPKDAT1 High Performance Switch\", MADERA_OUTPUT_PATH_CONFIG_5L,\n+\t   MADERA_OUT5_OSR_SHIFT, 1, 0),\n+\n+SOC_DOUBLE_R(\"HPOUT1 Digital Switch\", MADERA_DAC_DIGITAL_VOLUME_1L,\n+\t     MADERA_DAC_DIGITAL_VOLUME_1R, MADERA_OUT1L_MUTE_SHIFT, 1, 1),\n+SOC_DOUBLE_R(\"HPOUT2 Digital Switch\", MADERA_DAC_DIGITAL_VOLUME_2L,\n+\t     MADERA_DAC_DIGITAL_VOLUME_2R, MADERA_OUT2L_MUTE_SHIFT, 1, 1),\n+SOC_DOUBLE_R(\"HPOUT3 Digital Switch\", MADERA_DAC_DIGITAL_VOLUME_3L,\n+\t     MADERA_DAC_DIGITAL_VOLUME_3R, MADERA_OUT3L_MUTE_SHIFT, 1, 1),\n+SOC_DOUBLE_R(\"SPKDAT1 Digital Switch\", MADERA_DAC_DIGITAL_VOLUME_5L,\n+\t     MADERA_DAC_DIGITAL_VOLUME_5R, MADERA_OUT5L_MUTE_SHIFT, 1, 1),\n+\n+SOC_DOUBLE_R_TLV(\"HPOUT1 Digital Volume\", MADERA_DAC_DIGITAL_VOLUME_1L,\n+\t\t MADERA_DAC_DIGITAL_VOLUME_1R, MADERA_OUT1L_VOL_SHIFT,\n+\t\t 0xbf, 0, madera_digital_tlv),\n+SOC_DOUBLE_R_TLV(\"HPOUT2 Digital Volume\", MADERA_DAC_DIGITAL_VOLUME_2L,\n+\t\t MADERA_DAC_DIGITAL_VOLUME_2R, MADERA_OUT2L_VOL_SHIFT,\n+\t\t 0xbf, 0, madera_digital_tlv),\n+SOC_DOUBLE_R_TLV(\"HPOUT3 Digital Volume\", MADERA_DAC_DIGITAL_VOLUME_3L,\n+\t\t MADERA_DAC_DIGITAL_VOLUME_3R, MADERA_OUT3L_VOL_SHIFT,\n+\t\t 0xbf, 0, madera_digital_tlv),\n+SOC_DOUBLE_R_TLV(\"SPKDAT1 Digital Volume\", MADERA_DAC_DIGITAL_VOLUME_5L,\n+\t\t MADERA_DAC_DIGITAL_VOLUME_5R, MADERA_OUT5L_VOL_SHIFT,\n+\t\t 0xbf, 0, madera_digital_tlv),\n+\n+SOC_DOUBLE(\"SPKDAT1 Switch\", MADERA_PDM_SPK1_CTRL_1, MADERA_SPK1L_MUTE_SHIFT,\n+\t   MADERA_SPK1R_MUTE_SHIFT, 1, 1),\n+\n+SOC_DOUBLE(\"HPOUT1 EDRE Switch\", MADERA_EDRE_ENABLE,\n+\t   MADERA_EDRE_OUT1L_THR1_ENA_SHIFT,\n+\t   MADERA_EDRE_OUT1R_THR1_ENA_SHIFT, 1, 0),\n+SOC_DOUBLE(\"HPOUT2 EDRE Switch\", MADERA_EDRE_ENABLE,\n+\t   MADERA_EDRE_OUT2L_THR1_ENA_SHIFT,\n+\t   MADERA_EDRE_OUT2R_THR1_ENA_SHIFT, 1, 0),\n+SOC_DOUBLE(\"HPOUT3 EDRE Switch\", MADERA_EDRE_ENABLE,\n+\t   MADERA_EDRE_OUT3L_THR1_ENA_SHIFT,\n+\t   MADERA_EDRE_OUT3R_THR1_ENA_SHIFT, 1, 0),\n+\n+SOC_ENUM(\"Output Ramp Up\", madera_out_vi_ramp),\n+SOC_ENUM(\"Output Ramp Down\", madera_out_vd_ramp),\n+\n+SOC_SINGLE(\"Noise Gate Switch\", MADERA_NOISE_GATE_CONTROL,\n+\t   MADERA_NGATE_ENA_SHIFT, 1, 0),\n+SOC_SINGLE_TLV(\"Noise Gate Threshold Volume\", MADERA_NOISE_GATE_CONTROL,\n+\t       MADERA_NGATE_THR_SHIFT, 7, 1, madera_ng_tlv),\n+SOC_ENUM(\"Noise Gate Hold\", madera_ng_hold),\n+\n+SOC_ENUM_EXT(\"DFC1RX Width\", madera_dfc_width[0],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC1RX Type\", madera_dfc_type[0],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC1TX Width\", madera_dfc_width[1],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC1TX Type\", madera_dfc_type[1],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC2RX Width\", madera_dfc_width[2],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC2RX Type\", madera_dfc_type[2],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC2TX Width\", madera_dfc_width[3],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC2TX Type\", madera_dfc_type[3],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC3RX Width\", madera_dfc_width[4],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC3RX Type\", madera_dfc_type[4],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC3TX Width\", madera_dfc_width[5],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC3TX Type\", madera_dfc_type[5],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC4RX Width\", madera_dfc_width[6],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC4RX Type\", madera_dfc_type[6],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC4TX Width\", madera_dfc_width[7],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC4TX Type\", madera_dfc_type[7],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC5RX Width\", madera_dfc_width[8],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC5RX Type\", madera_dfc_type[8],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC5TX Width\", madera_dfc_width[9],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC5TX Type\", madera_dfc_type[9],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC6RX Width\", madera_dfc_width[10],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC6RX Type\", madera_dfc_type[10],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC6TX Width\", madera_dfc_width[11],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC6TX Type\", madera_dfc_type[11],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC7RX Width\", madera_dfc_width[12],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC7RX Type\", madera_dfc_type[12],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC7TX Width\", madera_dfc_width[13],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC7TX Type\", madera_dfc_type[13],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC8RX Width\", madera_dfc_width[14],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC8RX Type\", madera_dfc_type[14],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC8TX Width\", madera_dfc_width[15],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+SOC_ENUM_EXT(\"DFC8TX Type\", madera_dfc_type[15],\n+\t     snd_soc_get_enum_double, madera_dfc_put),\n+\n+CS47L90_NG_SRC(\"HPOUT1L\", MADERA_NOISE_GATE_SELECT_1L),\n+CS47L90_NG_SRC(\"HPOUT1R\", MADERA_NOISE_GATE_SELECT_1R),\n+CS47L90_NG_SRC(\"HPOUT2L\", MADERA_NOISE_GATE_SELECT_2L),\n+CS47L90_NG_SRC(\"HPOUT2R\", MADERA_NOISE_GATE_SELECT_2R),\n+CS47L90_NG_SRC(\"HPOUT3L\", MADERA_NOISE_GATE_SELECT_3L),\n+CS47L90_NG_SRC(\"HPOUT3R\", MADERA_NOISE_GATE_SELECT_3R),\n+CS47L90_NG_SRC(\"SPKDAT1L\", MADERA_NOISE_GATE_SELECT_5L),\n+CS47L90_NG_SRC(\"SPKDAT1R\", MADERA_NOISE_GATE_SELECT_5R),\n+\n+MADERA_MIXER_CONTROLS(\"AIF1TX1\", MADERA_AIF1TX1MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"AIF1TX2\", MADERA_AIF1TX2MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"AIF1TX3\", MADERA_AIF1TX3MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"AIF1TX4\", MADERA_AIF1TX4MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"AIF1TX5\", MADERA_AIF1TX5MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"AIF1TX6\", MADERA_AIF1TX6MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"AIF1TX7\", MADERA_AIF1TX7MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"AIF1TX8\", MADERA_AIF1TX8MIX_INPUT_1_SOURCE),\n+\n+MADERA_MIXER_CONTROLS(\"AIF2TX1\", MADERA_AIF2TX1MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"AIF2TX2\", MADERA_AIF2TX2MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"AIF2TX3\", MADERA_AIF2TX3MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"AIF2TX4\", MADERA_AIF2TX4MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"AIF2TX5\", MADERA_AIF2TX5MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"AIF2TX6\", MADERA_AIF2TX6MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"AIF2TX7\", MADERA_AIF2TX7MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"AIF2TX8\", MADERA_AIF2TX8MIX_INPUT_1_SOURCE),\n+\n+MADERA_MIXER_CONTROLS(\"AIF3TX1\", MADERA_AIF3TX1MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"AIF3TX2\", MADERA_AIF3TX2MIX_INPUT_1_SOURCE),\n+\n+MADERA_MIXER_CONTROLS(\"AIF4TX1\", MADERA_AIF4TX1MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"AIF4TX2\", MADERA_AIF4TX2MIX_INPUT_1_SOURCE),\n+\n+MADERA_MIXER_CONTROLS(\"SLIMTX1\", MADERA_SLIMTX1MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"SLIMTX2\", MADERA_SLIMTX2MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"SLIMTX3\", MADERA_SLIMTX3MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"SLIMTX4\", MADERA_SLIMTX4MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"SLIMTX5\", MADERA_SLIMTX5MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"SLIMTX6\", MADERA_SLIMTX6MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"SLIMTX7\", MADERA_SLIMTX7MIX_INPUT_1_SOURCE),\n+MADERA_MIXER_CONTROLS(\"SLIMTX8\", MADERA_SLIMTX8MIX_INPUT_1_SOURCE),\n+\n+MADERA_GAINMUX_CONTROLS(\"SPDIF1TX1\", MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE),\n+MADERA_GAINMUX_CONTROLS(\"SPDIF1TX2\", MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE),\n+};\n+\n+MADERA_MIXER_ENUMS(EQ1, MADERA_EQ1MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(EQ2, MADERA_EQ2MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(EQ3, MADERA_EQ3MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(EQ4, MADERA_EQ4MIX_INPUT_1_SOURCE);\n+\n+MADERA_MIXER_ENUMS(DRC1L, MADERA_DRC1LMIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(DRC1R, MADERA_DRC1RMIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(DRC2L, MADERA_DRC2LMIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(DRC2R, MADERA_DRC2RMIX_INPUT_1_SOURCE);\n+\n+MADERA_MIXER_ENUMS(LHPF1, MADERA_HPLP1MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(LHPF2, MADERA_HPLP2MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(LHPF3, MADERA_HPLP3MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(LHPF4, MADERA_HPLP4MIX_INPUT_1_SOURCE);\n+\n+MADERA_MIXER_ENUMS(DSP1L, MADERA_DSP1LMIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(DSP1R, MADERA_DSP1RMIX_INPUT_1_SOURCE);\n+MADERA_DSP_AUX_ENUMS(DSP1, MADERA_DSP1AUX1MIX_INPUT_1_SOURCE);\n+\n+MADERA_MIXER_ENUMS(DSP2L, MADERA_DSP2LMIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(DSP2R, MADERA_DSP2RMIX_INPUT_1_SOURCE);\n+MADERA_DSP_AUX_ENUMS(DSP2, MADERA_DSP2AUX1MIX_INPUT_1_SOURCE);\n+\n+MADERA_MIXER_ENUMS(DSP3L, MADERA_DSP3LMIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(DSP3R, MADERA_DSP3RMIX_INPUT_1_SOURCE);\n+MADERA_DSP_AUX_ENUMS(DSP3, MADERA_DSP3AUX1MIX_INPUT_1_SOURCE);\n+\n+MADERA_MIXER_ENUMS(DSP4L, MADERA_DSP4LMIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(DSP4R, MADERA_DSP4RMIX_INPUT_1_SOURCE);\n+MADERA_DSP_AUX_ENUMS(DSP4, MADERA_DSP4AUX1MIX_INPUT_1_SOURCE);\n+\n+MADERA_MIXER_ENUMS(DSP5L, MADERA_DSP5LMIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(DSP5R, MADERA_DSP5RMIX_INPUT_1_SOURCE);\n+MADERA_DSP_AUX_ENUMS(DSP5, MADERA_DSP5AUX1MIX_INPUT_1_SOURCE);\n+\n+MADERA_MIXER_ENUMS(DSP6L, MADERA_DSP6LMIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(DSP6R, MADERA_DSP6RMIX_INPUT_1_SOURCE);\n+MADERA_DSP_AUX_ENUMS(DSP6, MADERA_DSP6AUX1MIX_INPUT_1_SOURCE);\n+\n+MADERA_MIXER_ENUMS(DSP7L, MADERA_DSP7LMIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(DSP7R, MADERA_DSP7RMIX_INPUT_1_SOURCE);\n+MADERA_DSP_AUX_ENUMS(DSP7, MADERA_DSP7AUX1MIX_INPUT_1_SOURCE);\n+\n+MADERA_MIXER_ENUMS(PWM1, MADERA_PWM1MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(PWM2, MADERA_PWM2MIX_INPUT_1_SOURCE);\n+\n+MADERA_MIXER_ENUMS(OUT1L, MADERA_OUT1LMIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(OUT1R, MADERA_OUT1RMIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(OUT2L, MADERA_OUT2LMIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(OUT2R, MADERA_OUT2RMIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(OUT3L, MADERA_OUT3LMIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(OUT3R, MADERA_OUT3RMIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(SPKDAT1L, MADERA_OUT5LMIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(SPKDAT1R, MADERA_OUT5RMIX_INPUT_1_SOURCE);\n+\n+MADERA_MIXER_ENUMS(AIF1TX1, MADERA_AIF1TX1MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(AIF1TX2, MADERA_AIF1TX2MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(AIF1TX3, MADERA_AIF1TX3MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(AIF1TX4, MADERA_AIF1TX4MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(AIF1TX5, MADERA_AIF1TX5MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(AIF1TX6, MADERA_AIF1TX6MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(AIF1TX7, MADERA_AIF1TX7MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(AIF1TX8, MADERA_AIF1TX8MIX_INPUT_1_SOURCE);\n+\n+MADERA_MIXER_ENUMS(AIF2TX1, MADERA_AIF2TX1MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(AIF2TX2, MADERA_AIF2TX2MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(AIF2TX3, MADERA_AIF2TX3MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(AIF2TX4, MADERA_AIF2TX4MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(AIF2TX5, MADERA_AIF2TX5MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(AIF2TX6, MADERA_AIF2TX6MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(AIF2TX7, MADERA_AIF2TX7MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(AIF2TX8, MADERA_AIF2TX8MIX_INPUT_1_SOURCE);\n+\n+MADERA_MIXER_ENUMS(AIF3TX1, MADERA_AIF3TX1MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(AIF3TX2, MADERA_AIF3TX2MIX_INPUT_1_SOURCE);\n+\n+MADERA_MIXER_ENUMS(AIF4TX1, MADERA_AIF4TX1MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(AIF4TX2, MADERA_AIF4TX2MIX_INPUT_1_SOURCE);\n+\n+MADERA_MIXER_ENUMS(SLIMTX1, MADERA_SLIMTX1MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(SLIMTX2, MADERA_SLIMTX2MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(SLIMTX3, MADERA_SLIMTX3MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(SLIMTX4, MADERA_SLIMTX4MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(SLIMTX5, MADERA_SLIMTX5MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(SLIMTX6, MADERA_SLIMTX6MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(SLIMTX7, MADERA_SLIMTX7MIX_INPUT_1_SOURCE);\n+MADERA_MIXER_ENUMS(SLIMTX8, MADERA_SLIMTX8MIX_INPUT_1_SOURCE);\n+\n+MADERA_MUX_ENUMS(SPD1TX1, MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(SPD1TX2, MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE);\n+\n+MADERA_MUX_ENUMS(ASRC1IN1L, MADERA_ASRC1_1LMIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ASRC1IN1R, MADERA_ASRC1_1RMIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ASRC1IN2L, MADERA_ASRC1_2LMIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ASRC1IN2R, MADERA_ASRC1_2RMIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ASRC2IN1L, MADERA_ASRC2_1LMIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ASRC2IN1R, MADERA_ASRC2_1RMIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ASRC2IN2L, MADERA_ASRC2_2LMIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ASRC2IN2R, MADERA_ASRC2_2RMIX_INPUT_1_SOURCE);\n+\n+MADERA_MUX_ENUMS(ISRC1INT1, MADERA_ISRC1INT1MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ISRC1INT2, MADERA_ISRC1INT2MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ISRC1INT3, MADERA_ISRC1INT3MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ISRC1INT4, MADERA_ISRC1INT4MIX_INPUT_1_SOURCE);\n+\n+MADERA_MUX_ENUMS(ISRC1DEC1, MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ISRC1DEC2, MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ISRC1DEC3, MADERA_ISRC1DEC3MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ISRC1DEC4, MADERA_ISRC1DEC4MIX_INPUT_1_SOURCE);\n+\n+MADERA_MUX_ENUMS(ISRC2INT1, MADERA_ISRC2INT1MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ISRC2INT2, MADERA_ISRC2INT2MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ISRC2INT3, MADERA_ISRC2INT3MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ISRC2INT4, MADERA_ISRC2INT4MIX_INPUT_1_SOURCE);\n+\n+MADERA_MUX_ENUMS(ISRC2DEC1, MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ISRC2DEC2, MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ISRC2DEC3, MADERA_ISRC2DEC3MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ISRC2DEC4, MADERA_ISRC2DEC4MIX_INPUT_1_SOURCE);\n+\n+MADERA_MUX_ENUMS(ISRC3INT1, MADERA_ISRC3INT1MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ISRC3INT2, MADERA_ISRC3INT2MIX_INPUT_1_SOURCE);\n+\n+MADERA_MUX_ENUMS(ISRC3DEC1, MADERA_ISRC3DEC1MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ISRC3DEC2, MADERA_ISRC3DEC2MIX_INPUT_1_SOURCE);\n+\n+MADERA_MUX_ENUMS(ISRC4INT1, MADERA_ISRC4INT1MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ISRC4INT2, MADERA_ISRC4INT2MIX_INPUT_1_SOURCE);\n+\n+MADERA_MUX_ENUMS(ISRC4DEC1, MADERA_ISRC4DEC1MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(ISRC4DEC2, MADERA_ISRC4DEC2MIX_INPUT_1_SOURCE);\n+\n+MADERA_MUX_ENUMS(DFC1, MADERA_DFC1MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(DFC2, MADERA_DFC2MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(DFC3, MADERA_DFC3MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(DFC4, MADERA_DFC4MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(DFC5, MADERA_DFC5MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(DFC6, MADERA_DFC6MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(DFC7, MADERA_DFC7MIX_INPUT_1_SOURCE);\n+MADERA_MUX_ENUMS(DFC8, MADERA_DFC8MIX_INPUT_1_SOURCE);\n+\n+static const char * const cs47l90_aec_loopback_texts[] = {\n+\t\"HPOUT1L\", \"HPOUT1R\", \"HPOUT2L\", \"HPOUT2R\", \"HPOUT3L\", \"HPOUT3R\",\n+\t\"SPKDAT1L\", \"SPKDAT1R\",\n+};\n+\n+static const unsigned int cs47l90_aec_loopback_values[] = {\n+\t0, 1, 2, 3, 4, 5, 8, 9,\n+};\n+\n+static const struct soc_enum cs47l90_aec_loopback =\n+\tSOC_VALUE_ENUM_SINGLE(MADERA_DAC_AEC_CONTROL_1,\n+\t\t\t      MADERA_AEC1_LOOPBACK_SRC_SHIFT, 0xf,\n+\t\t\t      ARRAY_SIZE(cs47l90_aec_loopback_texts),\n+\t\t\t      cs47l90_aec_loopback_texts,\n+\t\t\t      cs47l90_aec_loopback_values);\n+\n+static const struct snd_kcontrol_new cs47l90_aec_loopback_mux =\n+\tSOC_DAPM_ENUM(\"AEC1 Loopback\", cs47l90_aec_loopback);\n+\n+static const struct snd_kcontrol_new cs47l90_anc_input_mux[] = {\n+\tSOC_DAPM_ENUM(\"RXANCL Input\", madera_anc_input_src[0]),\n+\tSOC_DAPM_ENUM(\"RXANCL Channel\", madera_anc_input_src[1]),\n+\tSOC_DAPM_ENUM(\"RXANCR Input\", madera_anc_input_src[2]),\n+\tSOC_DAPM_ENUM(\"RXANCR Channel\", madera_anc_input_src[3]),\n+};\n+\n+static const struct snd_kcontrol_new cs47l90_anc_ng_mux =\n+\tSOC_DAPM_ENUM(\"RXANC NG Source\", madera_anc_ng_enum);\n+\n+static const struct snd_kcontrol_new cs47l90_output_anc_src[] = {\n+\tSOC_DAPM_ENUM(\"HPOUT1L ANC Source\", madera_output_anc_src[0]),\n+\tSOC_DAPM_ENUM(\"HPOUT1R ANC Source\", madera_output_anc_src[1]),\n+\tSOC_DAPM_ENUM(\"HPOUT2L ANC Source\", madera_output_anc_src[2]),\n+\tSOC_DAPM_ENUM(\"HPOUT2R ANC Source\", madera_output_anc_src[3]),\n+\tSOC_DAPM_ENUM(\"HPOUT3L ANC Source\", madera_output_anc_src[4]),\n+\tSOC_DAPM_ENUM(\"HPOUT3R ANC Source\", madera_output_anc_src[0]),\n+\tSOC_DAPM_ENUM(\"SPKDAT1L ANC Source\", madera_output_anc_src[8]),\n+\tSOC_DAPM_ENUM(\"SPKDAT1R ANC Source\", madera_output_anc_src[9]),\n+};\n+\n+static const struct snd_soc_dapm_widget cs47l90_dapm_widgets[] = {\n+SND_SOC_DAPM_SUPPLY(\"SYSCLK\", MADERA_SYSTEM_CLOCK_1, MADERA_SYSCLK_ENA_SHIFT,\n+\t\t    0, madera_sysclk_ev,\n+\t\t    SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),\n+SND_SOC_DAPM_SUPPLY(\"ASYNCCLK\", MADERA_ASYNC_CLOCK_1,\n+\t\t    MADERA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_SUPPLY(\"OPCLK\", MADERA_OUTPUT_SYSTEM_CLOCK,\n+\t\t    MADERA_OPCLK_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_SUPPLY(\"ASYNCOPCLK\", MADERA_OUTPUT_ASYNC_CLOCK,\n+\t\t    MADERA_OPCLK_ASYNC_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_SUPPLY(\"DSPCLK\", MADERA_DSP_CLOCK_1,\n+\t\t    MADERA_DSP_CLK_ENA_SHIFT, 0, NULL, 0),\n+\n+SND_SOC_DAPM_REGULATOR_SUPPLY(\"DBVDD2\", 0, 0),\n+SND_SOC_DAPM_REGULATOR_SUPPLY(\"DBVDD3\", 0, 0),\n+SND_SOC_DAPM_REGULATOR_SUPPLY(\"DBVDD4\", 0, 0),\n+SND_SOC_DAPM_REGULATOR_SUPPLY(\"CPVDD1\", 20, 0),\n+SND_SOC_DAPM_REGULATOR_SUPPLY(\"CPVDD2\", 20, 0),\n+SND_SOC_DAPM_REGULATOR_SUPPLY(\"MICVDD\", 0, SND_SOC_DAPM_REGULATOR_BYPASS),\n+\n+SND_SOC_DAPM_SUPPLY(\"MICBIAS1\", MADERA_MIC_BIAS_CTRL_1,\n+\t\t    MADERA_MICB1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_SUPPLY(\"MICBIAS2\", MADERA_MIC_BIAS_CTRL_2,\n+\t\t    MADERA_MICB1_ENA_SHIFT, 0, NULL, 0),\n+\n+SND_SOC_DAPM_SUPPLY(\"MICBIAS1A\", MADERA_MIC_BIAS_CTRL_5,\n+\t\t\tMADERA_MICB1A_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_SUPPLY(\"MICBIAS1B\", MADERA_MIC_BIAS_CTRL_5,\n+\t\t\tMADERA_MICB1B_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_SUPPLY(\"MICBIAS1C\", MADERA_MIC_BIAS_CTRL_5,\n+\t\t\tMADERA_MICB1C_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_SUPPLY(\"MICBIAS1D\", MADERA_MIC_BIAS_CTRL_5,\n+\t\t\tMADERA_MICB1D_ENA_SHIFT, 0, NULL, 0),\n+\n+SND_SOC_DAPM_SUPPLY(\"MICBIAS2A\", MADERA_MIC_BIAS_CTRL_6,\n+\t\t\tMADERA_MICB2A_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_SUPPLY(\"MICBIAS2B\", MADERA_MIC_BIAS_CTRL_6,\n+\t\t\tMADERA_MICB2B_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_SUPPLY(\"MICBIAS2C\", MADERA_MIC_BIAS_CTRL_6,\n+\t\t\tMADERA_MICB2C_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_SUPPLY(\"MICBIAS2D\", MADERA_MIC_BIAS_CTRL_6,\n+\t\t\tMADERA_MICB2D_ENA_SHIFT, 0, NULL, 0),\n+\n+SND_SOC_DAPM_SUPPLY(\"FXCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_FX, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"ASRC1R1CLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_ASRC1_RATE_1, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"ASRC1R2CLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_ASRC1_RATE_2, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"ASRC2R1CLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_ASRC2_RATE_1, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"ASRC2R2CLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_ASRC2_RATE_2, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"ISRC1DECCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_ISRC1_DEC, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"ISRC1INTCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_ISRC1_INT, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"ISRC2DECCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_ISRC2_DEC, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"ISRC2INTCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_ISRC2_INT, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"ISRC3DECCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_ISRC3_DEC, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"ISRC3INTCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_ISRC3_INT, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"ISRC4DECCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_ISRC4_DEC, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"ISRC4INTCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_ISRC4_INT, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"OUTCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_OUT, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"SPDCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_SPD, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"DSP1CLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_DSP1, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"DSP2CLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_DSP2, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"DSP3CLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_DSP3, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"DSP4CLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_DSP4, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"DSP5CLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_DSP5, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"DSP6CLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_DSP6, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"DSP7CLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_DSP7, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"AIF1TXCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_AIF1, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"AIF2TXCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_AIF2, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"AIF3TXCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_AIF3, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"AIF4TXCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_AIF4, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"SLIMBUSCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_SLIMBUS, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"PWMCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_PWM, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+SND_SOC_DAPM_SUPPLY(\"DFCCLK\", SND_SOC_NOPM,\n+\t\t    MADERA_DOM_GRP_DFC, 0,\n+\t\t    madera_domain_clk_ev,\n+\t\t    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),\n+\n+SND_SOC_DAPM_SIGGEN(\"TONE\"),\n+SND_SOC_DAPM_SIGGEN(\"NOISE\"),\n+\n+SND_SOC_DAPM_INPUT(\"IN1AL\"),\n+SND_SOC_DAPM_INPUT(\"IN1BL\"),\n+SND_SOC_DAPM_INPUT(\"IN1AR\"),\n+SND_SOC_DAPM_INPUT(\"IN1BR\"),\n+SND_SOC_DAPM_INPUT(\"IN2AL\"),\n+SND_SOC_DAPM_INPUT(\"IN2BL\"),\n+SND_SOC_DAPM_INPUT(\"IN2R\"),\n+SND_SOC_DAPM_INPUT(\"IN3L\"),\n+SND_SOC_DAPM_INPUT(\"IN3R\"),\n+SND_SOC_DAPM_INPUT(\"IN4L\"),\n+SND_SOC_DAPM_INPUT(\"IN4R\"),\n+SND_SOC_DAPM_INPUT(\"IN5L\"),\n+SND_SOC_DAPM_INPUT(\"IN5R\"),\n+\n+SND_SOC_DAPM_OUTPUT(\"DRC1 Signal Activity\"),\n+SND_SOC_DAPM_OUTPUT(\"DRC2 Signal Activity\"),\n+\n+SND_SOC_DAPM_OUTPUT(\"DSP Trigger Out\"),\n+\n+SND_SOC_DAPM_MUX(\"IN1L Mux\", SND_SOC_NOPM, 0, 0, &madera_inmux[0]),\n+SND_SOC_DAPM_MUX(\"IN1R Mux\", SND_SOC_NOPM, 0, 0, &madera_inmux[1]),\n+SND_SOC_DAPM_MUX(\"IN2L Mux\", SND_SOC_NOPM, 0, 0, &madera_inmux[2]),\n+\n+SND_SOC_DAPM_PGA(\"PWM1 Driver\", MADERA_PWM_DRIVE_1, MADERA_PWM1_ENA_SHIFT,\n+\t\t 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"PWM2 Driver\", MADERA_PWM_DRIVE_1, MADERA_PWM2_ENA_SHIFT,\n+\t\t 0, NULL, 0),\n+\n+SND_SOC_DAPM_SUPPLY(\"RXANC NG External Clock\", SND_SOC_NOPM,\n+\t\t    MADERA_EXT_NG_SEL_SET_SHIFT, 0, madera_anc_ev,\n+\t\t    SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),\n+SND_SOC_DAPM_PGA(\"RXANCL NG External\", SND_SOC_NOPM, 0, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"RXANCR NG External\", SND_SOC_NOPM, 0, 0, NULL, 0),\n+\n+SND_SOC_DAPM_SUPPLY(\"RXANC NG Clock\", SND_SOC_NOPM,\n+\t\t    MADERA_CLK_NG_ENA_SET_SHIFT, 0, madera_anc_ev,\n+\t\t    SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),\n+SND_SOC_DAPM_PGA(\"RXANCL NG Internal\", SND_SOC_NOPM, 0, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"RXANCR NG Internal\", SND_SOC_NOPM, 0, 0, NULL, 0),\n+\n+SND_SOC_DAPM_MUX(\"RXANCL Left Input\", SND_SOC_NOPM, 0, 0,\n+\t\t &cs47l90_anc_input_mux[0]),\n+SND_SOC_DAPM_MUX(\"RXANCL Right Input\", SND_SOC_NOPM, 0, 0,\n+\t\t &cs47l90_anc_input_mux[0]),\n+SND_SOC_DAPM_MUX(\"RXANCL Channel\", SND_SOC_NOPM, 0, 0,\n+\t\t &cs47l90_anc_input_mux[1]),\n+SND_SOC_DAPM_MUX(\"RXANCL NG Mux\", SND_SOC_NOPM, 0, 0, &cs47l90_anc_ng_mux),\n+SND_SOC_DAPM_MUX(\"RXANCR Left Input\", SND_SOC_NOPM, 0, 0,\n+\t\t &cs47l90_anc_input_mux[2]),\n+SND_SOC_DAPM_MUX(\"RXANCR Right Input\", SND_SOC_NOPM, 0, 0,\n+\t\t &cs47l90_anc_input_mux[2]),\n+SND_SOC_DAPM_MUX(\"RXANCR Channel\", SND_SOC_NOPM, 0, 0,\n+\t\t &cs47l90_anc_input_mux[3]),\n+SND_SOC_DAPM_MUX(\"RXANCR NG Mux\", SND_SOC_NOPM, 0, 0, &cs47l90_anc_ng_mux),\n+\n+SND_SOC_DAPM_PGA_E(\"RXANCL\", SND_SOC_NOPM, MADERA_CLK_L_ENA_SET_SHIFT,\n+\t\t   0, NULL, 0, madera_anc_ev,\n+\t\t   SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),\n+SND_SOC_DAPM_PGA_E(\"RXANCR\", SND_SOC_NOPM, MADERA_CLK_R_ENA_SET_SHIFT,\n+\t\t   0, NULL, 0, madera_anc_ev,\n+\t\t   SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),\n+\n+SND_SOC_DAPM_MUX(\"HPOUT1L ANC Source\", SND_SOC_NOPM, 0, 0,\n+\t\t &cs47l90_output_anc_src[0]),\n+SND_SOC_DAPM_MUX(\"HPOUT1R ANC Source\", SND_SOC_NOPM, 0, 0,\n+\t\t &cs47l90_output_anc_src[1]),\n+SND_SOC_DAPM_MUX(\"HPOUT2L ANC Source\", SND_SOC_NOPM, 0, 0,\n+\t\t &cs47l90_output_anc_src[2]),\n+SND_SOC_DAPM_MUX(\"HPOUT2R ANC Source\", SND_SOC_NOPM, 0, 0,\n+\t\t &cs47l90_output_anc_src[3]),\n+SND_SOC_DAPM_MUX(\"HPOUT3L ANC Source\", SND_SOC_NOPM, 0, 0,\n+\t\t &cs47l90_output_anc_src[4]),\n+SND_SOC_DAPM_MUX(\"HPOUT3R ANC Source\", SND_SOC_NOPM, 0, 0,\n+\t\t &cs47l90_output_anc_src[5]),\n+SND_SOC_DAPM_MUX(\"SPKDAT1L ANC Source\", SND_SOC_NOPM, 0, 0,\n+\t\t &cs47l90_output_anc_src[6]),\n+SND_SOC_DAPM_MUX(\"SPKDAT1R ANC Source\", SND_SOC_NOPM, 0, 0,\n+\t\t &cs47l90_output_anc_src[7]),\n+\n+SND_SOC_DAPM_AIF_OUT(\"AIF1TX1\", NULL, 0,\n+\t\t     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX1_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"AIF1TX2\", NULL, 0,\n+\t\t     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX2_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"AIF1TX3\", NULL, 0,\n+\t\t     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX3_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"AIF1TX4\", NULL, 0,\n+\t\t     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX4_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"AIF1TX5\", NULL, 0,\n+\t\t     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX5_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"AIF1TX6\", NULL, 0,\n+\t\t     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX6_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"AIF1TX7\", NULL, 0,\n+\t\t     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX7_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"AIF1TX8\", NULL, 0,\n+\t\t     MADERA_AIF1_TX_ENABLES, MADERA_AIF1TX8_ENA_SHIFT, 0),\n+\n+SND_SOC_DAPM_AIF_OUT(\"AIF2TX1\", NULL, 0,\n+\t\t     MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX1_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"AIF2TX2\", NULL, 0,\n+\t\t     MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX2_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"AIF2TX3\", NULL, 0,\n+\t\t     MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX3_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"AIF2TX4\", NULL, 0,\n+\t\t     MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX4_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"AIF2TX5\", NULL, 0,\n+\t\t     MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX5_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"AIF2TX6\", NULL, 0,\n+\t\t     MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX6_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"AIF2TX7\", NULL, 0,\n+\t\t     MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX7_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"AIF2TX8\", NULL, 0,\n+\t\t     MADERA_AIF2_TX_ENABLES, MADERA_AIF2TX8_ENA_SHIFT, 0),\n+\n+SND_SOC_DAPM_AIF_OUT(\"SLIMTX1\", NULL, 0,\n+\t\t     MADERA_SLIMBUS_TX_CHANNEL_ENABLE,\n+\t\t     MADERA_SLIMTX1_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"SLIMTX2\", NULL, 0,\n+\t\t     MADERA_SLIMBUS_TX_CHANNEL_ENABLE,\n+\t\t     MADERA_SLIMTX2_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"SLIMTX3\", NULL, 0,\n+\t\t     MADERA_SLIMBUS_TX_CHANNEL_ENABLE,\n+\t\t     MADERA_SLIMTX3_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"SLIMTX4\", NULL, 0,\n+\t\t     MADERA_SLIMBUS_TX_CHANNEL_ENABLE,\n+\t\t     MADERA_SLIMTX4_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"SLIMTX5\", NULL, 0,\n+\t\t     MADERA_SLIMBUS_TX_CHANNEL_ENABLE,\n+\t\t     MADERA_SLIMTX5_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"SLIMTX6\", NULL, 0,\n+\t\t     MADERA_SLIMBUS_TX_CHANNEL_ENABLE,\n+\t\t     MADERA_SLIMTX6_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"SLIMTX7\", NULL, 0,\n+\t\t     MADERA_SLIMBUS_TX_CHANNEL_ENABLE,\n+\t\t     MADERA_SLIMTX7_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"SLIMTX8\", NULL, 0,\n+\t\t     MADERA_SLIMBUS_TX_CHANNEL_ENABLE,\n+\t\t     MADERA_SLIMTX8_ENA_SHIFT, 0),\n+\n+SND_SOC_DAPM_AIF_OUT(\"AIF3TX1\", NULL, 0,\n+\t\t     MADERA_AIF3_TX_ENABLES, MADERA_AIF3TX1_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"AIF3TX2\", NULL, 0,\n+\t\t     MADERA_AIF3_TX_ENABLES, MADERA_AIF3TX2_ENA_SHIFT, 0),\n+\n+SND_SOC_DAPM_AIF_OUT(\"AIF4TX1\", NULL, 0,\n+\t\t     MADERA_AIF4_TX_ENABLES, MADERA_AIF4TX1_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_OUT(\"AIF4TX2\", NULL, 0,\n+\t\t     MADERA_AIF4_TX_ENABLES, MADERA_AIF4TX2_ENA_SHIFT, 0),\n+\n+SND_SOC_DAPM_PGA_E(\"OUT1L\", SND_SOC_NOPM,\n+\t\t   MADERA_OUT1L_ENA_SHIFT, 0, NULL, 0, madera_hp_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |\n+\t\t   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),\n+SND_SOC_DAPM_PGA_E(\"OUT1R\", SND_SOC_NOPM,\n+\t\t   MADERA_OUT1R_ENA_SHIFT, 0, NULL, 0, madera_hp_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |\n+\t\t   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),\n+SND_SOC_DAPM_PGA_E(\"OUT2L\", SND_SOC_NOPM,\n+\t\t   MADERA_OUT2L_ENA_SHIFT, 0, NULL, 0, madera_hp_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |\n+\t\t   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),\n+SND_SOC_DAPM_PGA_E(\"OUT2R\", SND_SOC_NOPM,\n+\t\t   MADERA_OUT2R_ENA_SHIFT, 0, NULL, 0, madera_hp_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |\n+\t\t   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),\n+SND_SOC_DAPM_PGA_E(\"OUT3L\", SND_SOC_NOPM,\n+\t\t   MADERA_OUT3L_ENA_SHIFT, 0, NULL, 0, madera_hp_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |\n+\t\t   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),\n+SND_SOC_DAPM_PGA_E(\"OUT3R\", SND_SOC_NOPM,\n+\t\t   MADERA_OUT3R_ENA_SHIFT, 0, NULL, 0, madera_hp_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |\n+\t\t   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),\n+SND_SOC_DAPM_PGA_E(\"OUT5L\", MADERA_OUTPUT_ENABLES_1,\n+\t\t   MADERA_OUT5L_ENA_SHIFT, 0, NULL, 0, madera_out_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),\n+SND_SOC_DAPM_PGA_E(\"OUT5R\", MADERA_OUTPUT_ENABLES_1,\n+\t\t   MADERA_OUT5R_ENA_SHIFT, 0, NULL, 0, madera_out_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),\n+\n+SND_SOC_DAPM_PGA(\"SPD1TX1\", MADERA_SPD1_TX_CONTROL,\n+\t\t   MADERA_SPD1_VAL1_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"SPD1TX2\", MADERA_SPD1_TX_CONTROL,\n+\t\t   MADERA_SPD1_VAL2_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_OUT_DRV(\"SPD1\", MADERA_SPD1_TX_CONTROL,\n+\t\t     MADERA_SPD1_ENA_SHIFT, 0, NULL, 0),\n+\n+/*\n+ * mux_in widgets : arranged in the order of sources\n+ * specified in MADERA_MIXER_INPUT_ROUTES\n+ */\n+\n+SND_SOC_DAPM_PGA(\"Noise Generator\", MADERA_COMFORT_NOISE_GENERATOR,\n+\t\t MADERA_NOISE_GEN_ENA_SHIFT, 0, NULL, 0),\n+\n+SND_SOC_DAPM_PGA(\"Tone Generator 1\", MADERA_TONE_GENERATOR_1,\n+\t\t MADERA_TONE1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"Tone Generator 2\", MADERA_TONE_GENERATOR_1,\n+\t\t MADERA_TONE2_ENA_SHIFT, 0, NULL, 0),\n+\n+SND_SOC_DAPM_SIGGEN(\"HAPTICS\"),\n+\n+SND_SOC_DAPM_MUX(\"AEC1 Loopback\", MADERA_DAC_AEC_CONTROL_1,\n+\t\t       MADERA_AEC1_LOOPBACK_ENA_SHIFT, 0,\n+\t\t       &cs47l90_aec_loopback_mux),\n+\n+SND_SOC_DAPM_PGA_E(\"IN1L PGA\", MADERA_INPUT_ENABLES, MADERA_IN1L_ENA_SHIFT,\n+\t\t   0, NULL, 0, madera_in_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |\n+\t\t   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),\n+SND_SOC_DAPM_PGA_E(\"IN1R PGA\", MADERA_INPUT_ENABLES, MADERA_IN1R_ENA_SHIFT,\n+\t\t   0, NULL, 0, madera_in_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |\n+\t\t   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),\n+SND_SOC_DAPM_PGA_E(\"IN2L PGA\", MADERA_INPUT_ENABLES, MADERA_IN2L_ENA_SHIFT,\n+\t\t   0, NULL, 0, madera_in_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |\n+\t\t   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),\n+SND_SOC_DAPM_PGA_E(\"IN2R PGA\", MADERA_INPUT_ENABLES, MADERA_IN2R_ENA_SHIFT,\n+\t\t   0, NULL, 0, madera_in_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |\n+\t\t   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),\n+SND_SOC_DAPM_PGA_E(\"IN3L PGA\", MADERA_INPUT_ENABLES, MADERA_IN3L_ENA_SHIFT,\n+\t\t   0, NULL, 0, madera_in_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |\n+\t\t   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),\n+SND_SOC_DAPM_PGA_E(\"IN3R PGA\", MADERA_INPUT_ENABLES, MADERA_IN3R_ENA_SHIFT,\n+\t\t   0, NULL, 0, madera_in_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |\n+\t\t   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),\n+SND_SOC_DAPM_PGA_E(\"IN4L PGA\", MADERA_INPUT_ENABLES, MADERA_IN4L_ENA_SHIFT,\n+\t\t   0, NULL, 0, madera_in_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |\n+\t\t   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),\n+SND_SOC_DAPM_PGA_E(\"IN4R PGA\", MADERA_INPUT_ENABLES, MADERA_IN4R_ENA_SHIFT,\n+\t\t   0, NULL, 0, madera_in_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |\n+\t\t   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),\n+SND_SOC_DAPM_PGA_E(\"IN5L PGA\", MADERA_INPUT_ENABLES, MADERA_IN5L_ENA_SHIFT,\n+\t\t   0, NULL, 0, madera_in_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |\n+\t\t   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),\n+SND_SOC_DAPM_PGA_E(\"IN5R PGA\", MADERA_INPUT_ENABLES, MADERA_IN5R_ENA_SHIFT,\n+\t\t   0, NULL, 0, madera_in_ev,\n+\t\t   SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD |\n+\t\t   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),\n+\n+SND_SOC_DAPM_AIF_IN(\"AIF1RX1\", NULL, 0,\n+\t\t\tMADERA_AIF1_RX_ENABLES, MADERA_AIF1RX1_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"AIF1RX2\", NULL, 0,\n+\t\t\tMADERA_AIF1_RX_ENABLES, MADERA_AIF1RX2_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"AIF1RX3\", NULL, 0,\n+\t\t\tMADERA_AIF1_RX_ENABLES, MADERA_AIF1RX3_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"AIF1RX4\", NULL, 0,\n+\t\t\tMADERA_AIF1_RX_ENABLES, MADERA_AIF1RX4_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"AIF1RX5\", NULL, 0,\n+\t\t\tMADERA_AIF1_RX_ENABLES, MADERA_AIF1RX5_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"AIF1RX6\", NULL, 0,\n+\t\t\tMADERA_AIF1_RX_ENABLES, MADERA_AIF1RX6_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"AIF1RX7\", NULL, 0,\n+\t\t\tMADERA_AIF1_RX_ENABLES, MADERA_AIF1RX7_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"AIF1RX8\", NULL, 0,\n+\t\t\tMADERA_AIF1_RX_ENABLES, MADERA_AIF1RX8_ENA_SHIFT, 0),\n+\n+SND_SOC_DAPM_AIF_IN(\"AIF2RX1\", NULL, 0,\n+\t\t\tMADERA_AIF2_RX_ENABLES, MADERA_AIF2RX1_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"AIF2RX2\", NULL, 0,\n+\t\t\tMADERA_AIF2_RX_ENABLES, MADERA_AIF2RX2_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"AIF2RX3\", NULL, 0,\n+\t\t\tMADERA_AIF2_RX_ENABLES, MADERA_AIF2RX3_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"AIF2RX4\", NULL, 0,\n+\t\t\tMADERA_AIF2_RX_ENABLES, MADERA_AIF2RX4_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"AIF2RX5\", NULL, 0,\n+\t\t\tMADERA_AIF2_RX_ENABLES, MADERA_AIF2RX5_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"AIF2RX6\", NULL, 0,\n+\t\t\tMADERA_AIF2_RX_ENABLES, MADERA_AIF2RX6_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"AIF2RX7\", NULL, 0,\n+\t\t\tMADERA_AIF2_RX_ENABLES, MADERA_AIF2RX7_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"AIF2RX8\", NULL, 0,\n+\t\t\tMADERA_AIF2_RX_ENABLES, MADERA_AIF2RX8_ENA_SHIFT, 0),\n+\n+SND_SOC_DAPM_AIF_IN(\"AIF3RX1\", NULL, 0,\n+\t\t\tMADERA_AIF3_RX_ENABLES, MADERA_AIF3RX1_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"AIF3RX2\", NULL, 0,\n+\t\t\tMADERA_AIF3_RX_ENABLES, MADERA_AIF3RX2_ENA_SHIFT, 0),\n+\n+SND_SOC_DAPM_AIF_IN(\"AIF4RX1\", NULL, 0,\n+\t\t\tMADERA_AIF4_RX_ENABLES, MADERA_AIF4RX1_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"AIF4RX2\", NULL, 0,\n+\t\t\tMADERA_AIF4_RX_ENABLES, MADERA_AIF4RX2_ENA_SHIFT, 0),\n+\n+SND_SOC_DAPM_AIF_IN(\"SLIMRX1\", NULL, 0,\n+\t\t\tMADERA_SLIMBUS_RX_CHANNEL_ENABLE,\n+\t\t\tMADERA_SLIMRX1_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"SLIMRX2\", NULL, 0,\n+\t\t\tMADERA_SLIMBUS_RX_CHANNEL_ENABLE,\n+\t\t\tMADERA_SLIMRX2_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"SLIMRX3\", NULL, 0,\n+\t\t\tMADERA_SLIMBUS_RX_CHANNEL_ENABLE,\n+\t\t\tMADERA_SLIMRX3_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"SLIMRX4\", NULL, 0,\n+\t\t\tMADERA_SLIMBUS_RX_CHANNEL_ENABLE,\n+\t\t\tMADERA_SLIMRX4_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"SLIMRX5\", NULL, 0,\n+\t\t\tMADERA_SLIMBUS_RX_CHANNEL_ENABLE,\n+\t\t\tMADERA_SLIMRX5_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"SLIMRX6\", NULL, 0,\n+\t\t\tMADERA_SLIMBUS_RX_CHANNEL_ENABLE,\n+\t\t\tMADERA_SLIMRX6_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"SLIMRX7\", NULL, 0,\n+\t\t\tMADERA_SLIMBUS_RX_CHANNEL_ENABLE,\n+\t\t\tMADERA_SLIMRX7_ENA_SHIFT, 0),\n+SND_SOC_DAPM_AIF_IN(\"SLIMRX8\", NULL, 0,\n+\t\t\tMADERA_SLIMBUS_RX_CHANNEL_ENABLE,\n+\t\t\tMADERA_SLIMRX8_ENA_SHIFT, 0),\n+\n+SND_SOC_DAPM_PGA(\"EQ1\", MADERA_EQ1_1, MADERA_EQ1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"EQ2\", MADERA_EQ2_1, MADERA_EQ2_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"EQ3\", MADERA_EQ3_1, MADERA_EQ3_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"EQ4\", MADERA_EQ4_1, MADERA_EQ4_ENA_SHIFT, 0, NULL, 0),\n+\n+SND_SOC_DAPM_PGA(\"DRC1L\", MADERA_DRC1_CTRL1, MADERA_DRC1L_ENA_SHIFT, 0,\n+\t\t NULL, 0),\n+SND_SOC_DAPM_PGA(\"DRC1R\", MADERA_DRC1_CTRL1, MADERA_DRC1R_ENA_SHIFT, 0,\n+\t\t NULL, 0),\n+SND_SOC_DAPM_PGA(\"DRC2L\", MADERA_DRC2_CTRL1, MADERA_DRC2L_ENA_SHIFT, 0,\n+\t\t NULL, 0),\n+SND_SOC_DAPM_PGA(\"DRC2R\", MADERA_DRC2_CTRL1, MADERA_DRC2R_ENA_SHIFT, 0,\n+\t\t NULL, 0),\n+\n+SND_SOC_DAPM_PGA(\"LHPF1\", MADERA_HPLPF1_1, MADERA_LHPF1_ENA_SHIFT, 0,\n+\t\t NULL, 0),\n+SND_SOC_DAPM_PGA(\"LHPF2\", MADERA_HPLPF2_1, MADERA_LHPF2_ENA_SHIFT, 0,\n+\t\t NULL, 0),\n+SND_SOC_DAPM_PGA(\"LHPF3\", MADERA_HPLPF3_1, MADERA_LHPF3_ENA_SHIFT, 0,\n+\t\t NULL, 0),\n+SND_SOC_DAPM_PGA(\"LHPF4\", MADERA_HPLPF4_1, MADERA_LHPF4_ENA_SHIFT, 0,\n+\t\t NULL, 0),\n+\n+SND_SOC_DAPM_PGA(\"ASRC1IN1L\", MADERA_ASRC1_ENABLE,\n+\t\tMADERA_ASRC1_IN1L_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ASRC1IN1R\", MADERA_ASRC1_ENABLE,\n+\t\tMADERA_ASRC1_IN1R_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ASRC1IN2L\", MADERA_ASRC1_ENABLE,\n+\t\tMADERA_ASRC1_IN2L_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ASRC1IN2R\", MADERA_ASRC1_ENABLE,\n+\t\tMADERA_ASRC1_IN2R_ENA_SHIFT, 0, NULL, 0),\n+\n+SND_SOC_DAPM_PGA(\"ASRC2IN1L\", MADERA_ASRC2_ENABLE,\n+\t\tMADERA_ASRC2_IN1L_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ASRC2IN1R\", MADERA_ASRC2_ENABLE,\n+\t\tMADERA_ASRC2_IN1R_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ASRC2IN2L\", MADERA_ASRC2_ENABLE,\n+\t\tMADERA_ASRC2_IN2L_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ASRC2IN2R\", MADERA_ASRC2_ENABLE,\n+\t\tMADERA_ASRC2_IN2R_ENA_SHIFT, 0, NULL, 0),\n+\n+SND_SOC_DAPM_PGA(\"ISRC1DEC1\", MADERA_ISRC_1_CTRL_3,\n+\t\t MADERA_ISRC1_DEC1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ISRC1DEC2\", MADERA_ISRC_1_CTRL_3,\n+\t\t MADERA_ISRC1_DEC2_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ISRC1DEC3\", MADERA_ISRC_1_CTRL_3,\n+\t\t MADERA_ISRC1_DEC3_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ISRC1DEC4\", MADERA_ISRC_1_CTRL_3,\n+\t\t MADERA_ISRC1_DEC4_ENA_SHIFT, 0, NULL, 0),\n+\n+SND_SOC_DAPM_PGA(\"ISRC1INT1\", MADERA_ISRC_1_CTRL_3,\n+\t\t MADERA_ISRC1_INT1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ISRC1INT2\", MADERA_ISRC_1_CTRL_3,\n+\t\t MADERA_ISRC1_INT2_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ISRC1INT3\", MADERA_ISRC_1_CTRL_3,\n+\t\t MADERA_ISRC1_INT3_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ISRC1INT4\", MADERA_ISRC_1_CTRL_3,\n+\t\t MADERA_ISRC1_INT4_ENA_SHIFT, 0, NULL, 0),\n+\n+SND_SOC_DAPM_PGA(\"ISRC2DEC1\", MADERA_ISRC_2_CTRL_3,\n+\t\t MADERA_ISRC2_DEC1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ISRC2DEC2\", MADERA_ISRC_2_CTRL_3,\n+\t\t MADERA_ISRC2_DEC2_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ISRC2DEC3\", MADERA_ISRC_2_CTRL_3,\n+\t\t MADERA_ISRC2_DEC3_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ISRC2DEC4\", MADERA_ISRC_2_CTRL_3,\n+\t\t MADERA_ISRC2_DEC4_ENA_SHIFT, 0, NULL, 0),\n+\n+SND_SOC_DAPM_PGA(\"ISRC2INT1\", MADERA_ISRC_2_CTRL_3,\n+\t\t MADERA_ISRC2_INT1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ISRC2INT2\", MADERA_ISRC_2_CTRL_3,\n+\t\t MADERA_ISRC2_INT2_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ISRC2INT3\", MADERA_ISRC_2_CTRL_3,\n+\t\t MADERA_ISRC2_INT3_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ISRC2INT4\", MADERA_ISRC_2_CTRL_3,\n+\t\t MADERA_ISRC2_INT4_ENA_SHIFT, 0, NULL, 0),\n+\n+SND_SOC_DAPM_PGA(\"ISRC3DEC1\", MADERA_ISRC_3_CTRL_3,\n+\t\t MADERA_ISRC3_DEC1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ISRC3DEC2\", MADERA_ISRC_3_CTRL_3,\n+\t\t MADERA_ISRC3_DEC2_ENA_SHIFT, 0, NULL, 0),\n+\n+SND_SOC_DAPM_PGA(\"ISRC3INT1\", MADERA_ISRC_3_CTRL_3,\n+\t\t MADERA_ISRC3_INT1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ISRC3INT2\", MADERA_ISRC_3_CTRL_3,\n+\t\t MADERA_ISRC3_INT2_ENA_SHIFT, 0, NULL, 0),\n+\n+SND_SOC_DAPM_PGA(\"ISRC4DEC1\", MADERA_ISRC_4_CTRL_3,\n+\t\t MADERA_ISRC4_DEC1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ISRC4DEC2\", MADERA_ISRC_4_CTRL_3,\n+\t\t MADERA_ISRC4_DEC2_ENA_SHIFT, 0, NULL, 0),\n+\n+SND_SOC_DAPM_PGA(\"ISRC4INT1\", MADERA_ISRC_4_CTRL_3,\n+\t\t MADERA_ISRC4_INT1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"ISRC4INT2\", MADERA_ISRC_4_CTRL_3,\n+\t\t MADERA_ISRC4_INT2_ENA_SHIFT, 0, NULL, 0),\n+\n+WM_ADSP2(\"DSP1\", 0, cs47l90_adsp_power_ev),\n+WM_ADSP2(\"DSP2\", 1, cs47l90_adsp_power_ev),\n+WM_ADSP2(\"DSP3\", 2, cs47l90_adsp_power_ev),\n+WM_ADSP2(\"DSP4\", 3, cs47l90_adsp_power_ev),\n+WM_ADSP2(\"DSP5\", 4, cs47l90_adsp_power_ev),\n+WM_ADSP2(\"DSP6\", 5, cs47l90_adsp_power_ev),\n+WM_ADSP2(\"DSP7\", 6, cs47l90_adsp_power_ev),\n+\n+/* end of ordered widget list */\n+\n+SND_SOC_DAPM_PGA(\"DFC1\", MADERA_DFC1_CTRL, MADERA_DFC1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"DFC2\", MADERA_DFC2_CTRL, MADERA_DFC1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"DFC3\", MADERA_DFC3_CTRL, MADERA_DFC1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"DFC4\", MADERA_DFC4_CTRL, MADERA_DFC1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"DFC5\", MADERA_DFC5_CTRL, MADERA_DFC1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"DFC6\", MADERA_DFC6_CTRL, MADERA_DFC1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"DFC7\", MADERA_DFC7_CTRL, MADERA_DFC1_ENA_SHIFT, 0, NULL, 0),\n+SND_SOC_DAPM_PGA(\"DFC8\", MADERA_DFC8_CTRL, MADERA_DFC1_ENA_SHIFT, 0, NULL, 0),\n+\n+MADERA_MIXER_WIDGETS(EQ1, \"EQ1\"),\n+MADERA_MIXER_WIDGETS(EQ2, \"EQ2\"),\n+MADERA_MIXER_WIDGETS(EQ3, \"EQ3\"),\n+MADERA_MIXER_WIDGETS(EQ4, \"EQ4\"),\n+\n+MADERA_MIXER_WIDGETS(DRC1L, \"DRC1L\"),\n+MADERA_MIXER_WIDGETS(DRC1R, \"DRC1R\"),\n+MADERA_MIXER_WIDGETS(DRC2L, \"DRC2L\"),\n+MADERA_MIXER_WIDGETS(DRC2R, \"DRC2R\"),\n+\n+SND_SOC_DAPM_SWITCH(\"DRC1 Activity Output\", SND_SOC_NOPM, 0, 0,\n+\t\t    &madera_drc_activity_output_mux[0]),\n+SND_SOC_DAPM_SWITCH(\"DRC2 Activity Output\", SND_SOC_NOPM, 0, 0,\n+\t\t    &madera_drc_activity_output_mux[1]),\n+\n+MADERA_MIXER_WIDGETS(LHPF1, \"LHPF1\"),\n+MADERA_MIXER_WIDGETS(LHPF2, \"LHPF2\"),\n+MADERA_MIXER_WIDGETS(LHPF3, \"LHPF3\"),\n+MADERA_MIXER_WIDGETS(LHPF4, \"LHPF4\"),\n+\n+MADERA_MIXER_WIDGETS(PWM1, \"PWM1\"),\n+MADERA_MIXER_WIDGETS(PWM2, \"PWM2\"),\n+\n+MADERA_MIXER_WIDGETS(OUT1L, \"HPOUT1L\"),\n+MADERA_MIXER_WIDGETS(OUT1R, \"HPOUT1R\"),\n+MADERA_MIXER_WIDGETS(OUT2L, \"HPOUT2L\"),\n+MADERA_MIXER_WIDGETS(OUT2R, \"HPOUT2R\"),\n+MADERA_MIXER_WIDGETS(OUT3L, \"HPOUT3L\"),\n+MADERA_MIXER_WIDGETS(OUT3R, \"HPOUT3R\"),\n+MADERA_MIXER_WIDGETS(SPKDAT1L, \"SPKDAT1L\"),\n+MADERA_MIXER_WIDGETS(SPKDAT1R, \"SPKDAT1R\"),\n+\n+MADERA_MIXER_WIDGETS(AIF1TX1, \"AIF1TX1\"),\n+MADERA_MIXER_WIDGETS(AIF1TX2, \"AIF1TX2\"),\n+MADERA_MIXER_WIDGETS(AIF1TX3, \"AIF1TX3\"),\n+MADERA_MIXER_WIDGETS(AIF1TX4, \"AIF1TX4\"),\n+MADERA_MIXER_WIDGETS(AIF1TX5, \"AIF1TX5\"),\n+MADERA_MIXER_WIDGETS(AIF1TX6, \"AIF1TX6\"),\n+MADERA_MIXER_WIDGETS(AIF1TX7, \"AIF1TX7\"),\n+MADERA_MIXER_WIDGETS(AIF1TX8, \"AIF1TX8\"),\n+\n+MADERA_MIXER_WIDGETS(AIF2TX1, \"AIF2TX1\"),\n+MADERA_MIXER_WIDGETS(AIF2TX2, \"AIF2TX2\"),\n+MADERA_MIXER_WIDGETS(AIF2TX3, \"AIF2TX3\"),\n+MADERA_MIXER_WIDGETS(AIF2TX4, \"AIF2TX4\"),\n+MADERA_MIXER_WIDGETS(AIF2TX5, \"AIF2TX5\"),\n+MADERA_MIXER_WIDGETS(AIF2TX6, \"AIF2TX6\"),\n+MADERA_MIXER_WIDGETS(AIF2TX7, \"AIF2TX7\"),\n+MADERA_MIXER_WIDGETS(AIF2TX8, \"AIF2TX8\"),\n+\n+MADERA_MIXER_WIDGETS(AIF3TX1, \"AIF3TX1\"),\n+MADERA_MIXER_WIDGETS(AIF3TX2, \"AIF3TX2\"),\n+\n+MADERA_MIXER_WIDGETS(AIF4TX1, \"AIF4TX1\"),\n+MADERA_MIXER_WIDGETS(AIF4TX2, \"AIF4TX2\"),\n+\n+MADERA_MIXER_WIDGETS(SLIMTX1, \"SLIMTX1\"),\n+MADERA_MIXER_WIDGETS(SLIMTX2, \"SLIMTX2\"),\n+MADERA_MIXER_WIDGETS(SLIMTX3, \"SLIMTX3\"),\n+MADERA_MIXER_WIDGETS(SLIMTX4, \"SLIMTX4\"),\n+MADERA_MIXER_WIDGETS(SLIMTX5, \"SLIMTX5\"),\n+MADERA_MIXER_WIDGETS(SLIMTX6, \"SLIMTX6\"),\n+MADERA_MIXER_WIDGETS(SLIMTX7, \"SLIMTX7\"),\n+MADERA_MIXER_WIDGETS(SLIMTX8, \"SLIMTX8\"),\n+\n+MADERA_MUX_WIDGETS(SPD1TX1, \"SPDIF1TX1\"),\n+MADERA_MUX_WIDGETS(SPD1TX2, \"SPDIF1TX2\"),\n+\n+MADERA_MUX_WIDGETS(ASRC1IN1L, \"ASRC1IN1L\"),\n+MADERA_MUX_WIDGETS(ASRC1IN1R, \"ASRC1IN1R\"),\n+MADERA_MUX_WIDGETS(ASRC1IN2L, \"ASRC1IN2L\"),\n+MADERA_MUX_WIDGETS(ASRC1IN2R, \"ASRC1IN2R\"),\n+MADERA_MUX_WIDGETS(ASRC2IN1L, \"ASRC2IN1L\"),\n+MADERA_MUX_WIDGETS(ASRC2IN1R, \"ASRC2IN1R\"),\n+MADERA_MUX_WIDGETS(ASRC2IN2L, \"ASRC2IN2L\"),\n+MADERA_MUX_WIDGETS(ASRC2IN2R, \"ASRC2IN2R\"),\n+\n+MADERA_DSP_WIDGETS(DSP1, \"DSP1\"),\n+MADERA_DSP_WIDGETS(DSP2, \"DSP2\"),\n+MADERA_DSP_WIDGETS(DSP3, \"DSP3\"),\n+MADERA_DSP_WIDGETS(DSP4, \"DSP4\"),\n+MADERA_DSP_WIDGETS(DSP5, \"DSP5\"),\n+MADERA_DSP_WIDGETS(DSP6, \"DSP6\"),\n+MADERA_DSP_WIDGETS(DSP7, \"DSP7\"),\n+\n+SND_SOC_DAPM_SWITCH(\"DSP1 Trigger Output\", SND_SOC_NOPM, 0, 0,\n+\t\t    &madera_dsp_trigger_output_mux[0]),\n+SND_SOC_DAPM_SWITCH(\"DSP2 Trigger Output\", SND_SOC_NOPM, 0, 0,\n+\t\t    &madera_dsp_trigger_output_mux[1]),\n+SND_SOC_DAPM_SWITCH(\"DSP3 Trigger Output\", SND_SOC_NOPM, 0, 0,\n+\t\t    &madera_dsp_trigger_output_mux[2]),\n+SND_SOC_DAPM_SWITCH(\"DSP4 Trigger Output\", SND_SOC_NOPM, 0, 0,\n+\t\t    &madera_dsp_trigger_output_mux[3]),\n+SND_SOC_DAPM_SWITCH(\"DSP5 Trigger Output\", SND_SOC_NOPM, 0, 0,\n+\t\t    &madera_dsp_trigger_output_mux[4]),\n+SND_SOC_DAPM_SWITCH(\"DSP6 Trigger Output\", SND_SOC_NOPM, 0, 0,\n+\t\t    &madera_dsp_trigger_output_mux[5]),\n+SND_SOC_DAPM_SWITCH(\"DSP7 Trigger Output\", SND_SOC_NOPM, 0, 0,\n+\t\t    &madera_dsp_trigger_output_mux[6]),\n+\n+MADERA_MUX_WIDGETS(ISRC1DEC1, \"ISRC1DEC1\"),\n+MADERA_MUX_WIDGETS(ISRC1DEC2, \"ISRC1DEC2\"),\n+MADERA_MUX_WIDGETS(ISRC1DEC3, \"ISRC1DEC3\"),\n+MADERA_MUX_WIDGETS(ISRC1DEC4, \"ISRC1DEC4\"),\n+\n+MADERA_MUX_WIDGETS(ISRC1INT1, \"ISRC1INT1\"),\n+MADERA_MUX_WIDGETS(ISRC1INT2, \"ISRC1INT2\"),\n+MADERA_MUX_WIDGETS(ISRC1INT3, \"ISRC1INT3\"),\n+MADERA_MUX_WIDGETS(ISRC1INT4, \"ISRC1INT4\"),\n+\n+MADERA_MUX_WIDGETS(ISRC2DEC1, \"ISRC2DEC1\"),\n+MADERA_MUX_WIDGETS(ISRC2DEC2, \"ISRC2DEC2\"),\n+MADERA_MUX_WIDGETS(ISRC2DEC3, \"ISRC2DEC3\"),\n+MADERA_MUX_WIDGETS(ISRC2DEC4, \"ISRC2DEC4\"),\n+\n+MADERA_MUX_WIDGETS(ISRC2INT1, \"ISRC2INT1\"),\n+MADERA_MUX_WIDGETS(ISRC2INT2, \"ISRC2INT2\"),\n+MADERA_MUX_WIDGETS(ISRC2INT3, \"ISRC2INT3\"),\n+MADERA_MUX_WIDGETS(ISRC2INT4, \"ISRC2INT4\"),\n+\n+MADERA_MUX_WIDGETS(ISRC3DEC1, \"ISRC3DEC1\"),\n+MADERA_MUX_WIDGETS(ISRC3DEC2, \"ISRC3DEC2\"),\n+\n+MADERA_MUX_WIDGETS(ISRC3INT1, \"ISRC3INT1\"),\n+MADERA_MUX_WIDGETS(ISRC3INT2, \"ISRC3INT2\"),\n+\n+MADERA_MUX_WIDGETS(ISRC4DEC1, \"ISRC4DEC1\"),\n+MADERA_MUX_WIDGETS(ISRC4DEC2, \"ISRC4DEC2\"),\n+\n+MADERA_MUX_WIDGETS(ISRC4INT1, \"ISRC4INT1\"),\n+MADERA_MUX_WIDGETS(ISRC4INT2, \"ISRC4INT2\"),\n+\n+MADERA_MUX_WIDGETS(DFC1, \"DFC1\"),\n+MADERA_MUX_WIDGETS(DFC2, \"DFC2\"),\n+MADERA_MUX_WIDGETS(DFC3, \"DFC3\"),\n+MADERA_MUX_WIDGETS(DFC4, \"DFC4\"),\n+MADERA_MUX_WIDGETS(DFC5, \"DFC5\"),\n+MADERA_MUX_WIDGETS(DFC6, \"DFC6\"),\n+MADERA_MUX_WIDGETS(DFC7, \"DFC7\"),\n+MADERA_MUX_WIDGETS(DFC8, \"DFC8\"),\n+\n+SND_SOC_DAPM_OUTPUT(\"HPOUT1L\"),\n+SND_SOC_DAPM_OUTPUT(\"HPOUT1R\"),\n+SND_SOC_DAPM_OUTPUT(\"HPOUT2L\"),\n+SND_SOC_DAPM_OUTPUT(\"HPOUT2R\"),\n+SND_SOC_DAPM_OUTPUT(\"HPOUT3L\"),\n+SND_SOC_DAPM_OUTPUT(\"HPOUT3R\"),\n+SND_SOC_DAPM_OUTPUT(\"SPKDAT1L\"),\n+SND_SOC_DAPM_OUTPUT(\"SPKDAT1R\"),\n+SND_SOC_DAPM_OUTPUT(\"SPDIF1\"),\n+\n+SND_SOC_DAPM_OUTPUT(\"MICSUPP\"),\n+};\n+\n+#define MADERA_MIXER_INPUT_ROUTES(name)\t\\\n+\t{ name, \"Noise Generator\", \"Noise Generator\" }, \\\n+\t{ name, \"Tone Generator 1\", \"Tone Generator 1\" }, \\\n+\t{ name, \"Tone Generator 2\", \"Tone Generator 2\" }, \\\n+\t{ name, \"Haptics\", \"HAPTICS\" }, \\\n+\t{ name, \"AEC1\", \"AEC1 Loopback\" }, \\\n+\t{ name, \"IN1L\", \"IN1L PGA\" }, \\\n+\t{ name, \"IN1R\", \"IN1R PGA\" }, \\\n+\t{ name, \"IN2L\", \"IN2L PGA\" }, \\\n+\t{ name, \"IN2R\", \"IN2R PGA\" }, \\\n+\t{ name, \"IN3L\", \"IN3L PGA\" }, \\\n+\t{ name, \"IN3R\", \"IN3R PGA\" }, \\\n+\t{ name, \"IN4L\", \"IN4L PGA\" }, \\\n+\t{ name, \"IN4R\", \"IN4R PGA\" }, \\\n+\t{ name, \"IN5L\", \"IN5L PGA\" }, \\\n+\t{ name, \"IN5R\", \"IN5R PGA\" }, \\\n+\t{ name, \"AIF1RX1\", \"AIF1RX1\" }, \\\n+\t{ name, \"AIF1RX2\", \"AIF1RX2\" }, \\\n+\t{ name, \"AIF1RX3\", \"AIF1RX3\" }, \\\n+\t{ name, \"AIF1RX4\", \"AIF1RX4\" }, \\\n+\t{ name, \"AIF1RX5\", \"AIF1RX5\" }, \\\n+\t{ name, \"AIF1RX6\", \"AIF1RX6\" }, \\\n+\t{ name, \"AIF1RX7\", \"AIF1RX7\" }, \\\n+\t{ name, \"AIF1RX8\", \"AIF1RX8\" }, \\\n+\t{ name, \"AIF2RX1\", \"AIF2RX1\" }, \\\n+\t{ name, \"AIF2RX2\", \"AIF2RX2\" }, \\\n+\t{ name, \"AIF2RX3\", \"AIF2RX3\" }, \\\n+\t{ name, \"AIF2RX4\", \"AIF2RX4\" }, \\\n+\t{ name, \"AIF2RX5\", \"AIF2RX5\" }, \\\n+\t{ name, \"AIF2RX6\", \"AIF2RX6\" }, \\\n+\t{ name, \"AIF2RX7\", \"AIF2RX7\" }, \\\n+\t{ name, \"AIF2RX8\", \"AIF2RX8\" }, \\\n+\t{ name, \"AIF3RX1\", \"AIF3RX1\" }, \\\n+\t{ name, \"AIF3RX2\", \"AIF3RX2\" }, \\\n+\t{ name, \"AIF4RX1\", \"AIF4RX1\" }, \\\n+\t{ name, \"AIF4RX2\", \"AIF4RX2\" }, \\\n+\t{ name, \"SLIMRX1\", \"SLIMRX1\" }, \\\n+\t{ name, \"SLIMRX2\", \"SLIMRX2\" }, \\\n+\t{ name, \"SLIMRX3\", \"SLIMRX3\" }, \\\n+\t{ name, \"SLIMRX4\", \"SLIMRX4\" }, \\\n+\t{ name, \"SLIMRX5\", \"SLIMRX5\" }, \\\n+\t{ name, \"SLIMRX6\", \"SLIMRX6\" }, \\\n+\t{ name, \"SLIMRX7\", \"SLIMRX7\" }, \\\n+\t{ name, \"SLIMRX8\", \"SLIMRX8\" }, \\\n+\t{ name, \"EQ1\", \"EQ1\" }, \\\n+\t{ name, \"EQ2\", \"EQ2\" }, \\\n+\t{ name, \"EQ3\", \"EQ3\" }, \\\n+\t{ name, \"EQ4\", \"EQ4\" }, \\\n+\t{ name, \"DRC1L\", \"DRC1L\" }, \\\n+\t{ name, \"DRC1R\", \"DRC1R\" }, \\\n+\t{ name, \"DRC2L\", \"DRC2L\" }, \\\n+\t{ name, \"DRC2R\", \"DRC2R\" }, \\\n+\t{ name, \"LHPF1\", \"LHPF1\" }, \\\n+\t{ name, \"LHPF2\", \"LHPF2\" }, \\\n+\t{ name, \"LHPF3\", \"LHPF3\" }, \\\n+\t{ name, \"LHPF4\", \"LHPF4\" }, \\\n+\t{ name, \"ASRC1IN1L\", \"ASRC1IN1L\" }, \\\n+\t{ name, \"ASRC1IN1R\", \"ASRC1IN1R\" }, \\\n+\t{ name, \"ASRC1IN2L\", \"ASRC1IN2L\" }, \\\n+\t{ name, \"ASRC1IN2R\", \"ASRC1IN2R\" }, \\\n+\t{ name, \"ASRC2IN1L\", \"ASRC2IN1L\" }, \\\n+\t{ name, \"ASRC2IN1R\", \"ASRC2IN1R\" }, \\\n+\t{ name, \"ASRC2IN2L\", \"ASRC2IN2L\" }, \\\n+\t{ name, \"ASRC2IN2R\", \"ASRC2IN2R\" }, \\\n+\t{ name, \"ISRC1DEC1\", \"ISRC1DEC1\" }, \\\n+\t{ name, \"ISRC1DEC2\", \"ISRC1DEC2\" }, \\\n+\t{ name, \"ISRC1DEC3\", \"ISRC1DEC3\" }, \\\n+\t{ name, \"ISRC1DEC4\", \"ISRC1DEC4\" }, \\\n+\t{ name, \"ISRC1INT1\", \"ISRC1INT1\" }, \\\n+\t{ name, \"ISRC1INT2\", \"ISRC1INT2\" }, \\\n+\t{ name, \"ISRC1INT3\", \"ISRC1INT3\" }, \\\n+\t{ name, \"ISRC1INT4\", \"ISRC1INT4\" }, \\\n+\t{ name, \"ISRC2DEC1\", \"ISRC2DEC1\" }, \\\n+\t{ name, \"ISRC2DEC2\", \"ISRC2DEC2\" }, \\\n+\t{ name, \"ISRC2DEC3\", \"ISRC2DEC3\" }, \\\n+\t{ name, \"ISRC2DEC4\", \"ISRC2DEC4\" }, \\\n+\t{ name, \"ISRC2INT1\", \"ISRC2INT1\" }, \\\n+\t{ name, \"ISRC2INT2\", \"ISRC2INT2\" }, \\\n+\t{ name, \"ISRC2INT3\", \"ISRC2INT3\" }, \\\n+\t{ name, \"ISRC2INT4\", \"ISRC2INT4\" }, \\\n+\t{ name, \"ISRC3DEC1\", \"ISRC3DEC1\" }, \\\n+\t{ name, \"ISRC3DEC2\", \"ISRC3DEC2\" }, \\\n+\t{ name, \"ISRC3INT1\", \"ISRC3INT1\" }, \\\n+\t{ name, \"ISRC3INT2\", \"ISRC3INT2\" }, \\\n+\t{ name, \"ISRC4DEC1\", \"ISRC4DEC1\" }, \\\n+\t{ name, \"ISRC4DEC2\", \"ISRC4DEC2\" }, \\\n+\t{ name, \"ISRC4INT1\", \"ISRC4INT1\" }, \\\n+\t{ name, \"ISRC4INT2\", \"ISRC4INT2\" }, \\\n+\t{ name, \"DSP1.1\", \"DSP1\" }, \\\n+\t{ name, \"DSP1.2\", \"DSP1\" }, \\\n+\t{ name, \"DSP1.3\", \"DSP1\" }, \\\n+\t{ name, \"DSP1.4\", \"DSP1\" }, \\\n+\t{ name, \"DSP1.5\", \"DSP1\" }, \\\n+\t{ name, \"DSP1.6\", \"DSP1\" }, \\\n+\t{ name, \"DSP2.1\", \"DSP2\" }, \\\n+\t{ name, \"DSP2.2\", \"DSP2\" }, \\\n+\t{ name, \"DSP2.3\", \"DSP2\" }, \\\n+\t{ name, \"DSP2.4\", \"DSP2\" }, \\\n+\t{ name, \"DSP2.5\", \"DSP2\" }, \\\n+\t{ name, \"DSP2.6\", \"DSP2\" }, \\\n+\t{ name, \"DSP3.1\", \"DSP3\" }, \\\n+\t{ name, \"DSP3.2\", \"DSP3\" }, \\\n+\t{ name, \"DSP3.3\", \"DSP3\" }, \\\n+\t{ name, \"DSP3.4\", \"DSP3\" }, \\\n+\t{ name, \"DSP3.5\", \"DSP3\" }, \\\n+\t{ name, \"DSP3.6\", \"DSP3\" }, \\\n+\t{ name, \"DSP4.1\", \"DSP4\" }, \\\n+\t{ name, \"DSP4.2\", \"DSP4\" }, \\\n+\t{ name, \"DSP4.3\", \"DSP4\" }, \\\n+\t{ name, \"DSP4.4\", \"DSP4\" }, \\\n+\t{ name, \"DSP4.5\", \"DSP4\" }, \\\n+\t{ name, \"DSP4.6\", \"DSP4\" }, \\\n+\t{ name, \"DSP5.1\", \"DSP5\" }, \\\n+\t{ name, \"DSP5.2\", \"DSP5\" }, \\\n+\t{ name, \"DSP5.3\", \"DSP5\" }, \\\n+\t{ name, \"DSP5.4\", \"DSP5\" }, \\\n+\t{ name, \"DSP5.5\", \"DSP5\" }, \\\n+\t{ name, \"DSP5.6\", \"DSP5\" }, \\\n+\t{ name, \"DSP6.1\", \"DSP6\" }, \\\n+\t{ name, \"DSP6.2\", \"DSP6\" }, \\\n+\t{ name, \"DSP6.3\", \"DSP6\" }, \\\n+\t{ name, \"DSP6.4\", \"DSP6\" }, \\\n+\t{ name, \"DSP6.5\", \"DSP6\" }, \\\n+\t{ name, \"DSP6.6\", \"DSP6\" }, \\\n+\t{ name, \"DSP7.1\", \"DSP7\" }, \\\n+\t{ name, \"DSP7.2\", \"DSP7\" }, \\\n+\t{ name, \"DSP7.3\", \"DSP7\" }, \\\n+\t{ name, \"DSP7.4\", \"DSP7\" }, \\\n+\t{ name, \"DSP7.5\", \"DSP7\" }, \\\n+\t{ name, \"DSP7.6\", \"DSP7\" }, \\\n+\t{ name, \"DFC1\", \"DFC1\" }, \\\n+\t{ name, \"DFC2\", \"DFC2\" }, \\\n+\t{ name, \"DFC3\", \"DFC3\" }, \\\n+\t{ name, \"DFC4\", \"DFC4\" }, \\\n+\t{ name, \"DFC5\", \"DFC5\" }, \\\n+\t{ name, \"DFC6\", \"DFC6\" }, \\\n+\t{ name, \"DFC7\", \"DFC7\" }, \\\n+\t{ name, \"DFC8\", \"DFC8\" }\n+\n+static const struct snd_soc_dapm_route cs47l90_dapm_routes[] = {\n+\t/* Internal clock domains */\n+\t{ \"EQ1\", NULL, \"FXCLK\" },\n+\t{ \"EQ2\", NULL, \"FXCLK\" },\n+\t{ \"EQ3\", NULL, \"FXCLK\" },\n+\t{ \"EQ4\", NULL, \"FXCLK\" },\n+\t{ \"DRC1L\", NULL, \"FXCLK\" },\n+\t{ \"DRC1R\", NULL, \"FXCLK\" },\n+\t{ \"DRC2L\", NULL, \"FXCLK\" },\n+\t{ \"DRC2R\", NULL, \"FXCLK\" },\n+\t{ \"LHPF1\", NULL, \"FXCLK\" },\n+\t{ \"LHPF2\", NULL, \"FXCLK\" },\n+\t{ \"LHPF3\", NULL, \"FXCLK\" },\n+\t{ \"LHPF4\", NULL, \"FXCLK\" },\n+\t{ \"PWM1 Mixer\", NULL, \"PWMCLK\" },\n+\t{ \"PWM2 Mixer\", NULL, \"PWMCLK\" },\n+\t{ \"OUT1L\", NULL, \"OUTCLK\" },\n+\t{ \"OUT1R\", NULL, \"OUTCLK\" },\n+\t{ \"OUT2L\", NULL, \"OUTCLK\" },\n+\t{ \"OUT2R\", NULL, \"OUTCLK\" },\n+\t{ \"OUT3L\", NULL, \"OUTCLK\" },\n+\t{ \"OUT3R\", NULL, \"OUTCLK\" },\n+\t{ \"OUT5L\", NULL, \"OUTCLK\" },\n+\t{ \"OUT5R\", NULL, \"OUTCLK\" },\n+\t{ \"AIF1TX1\", NULL, \"AIF1TXCLK\" },\n+\t{ \"AIF1TX2\", NULL, \"AIF1TXCLK\" },\n+\t{ \"AIF1TX3\", NULL, \"AIF1TXCLK\" },\n+\t{ \"AIF1TX4\", NULL, \"AIF1TXCLK\" },\n+\t{ \"AIF1TX5\", NULL, \"AIF1TXCLK\" },\n+\t{ \"AIF1TX6\", NULL, \"AIF1TXCLK\" },\n+\t{ \"AIF1TX7\", NULL, \"AIF1TXCLK\" },\n+\t{ \"AIF1TX8\", NULL, \"AIF1TXCLK\" },\n+\t{ \"AIF2TX1\", NULL, \"AIF2TXCLK\" },\n+\t{ \"AIF2TX2\", NULL, \"AIF2TXCLK\" },\n+\t{ \"AIF2TX3\", NULL, \"AIF2TXCLK\" },\n+\t{ \"AIF2TX4\", NULL, \"AIF2TXCLK\" },\n+\t{ \"AIF2TX5\", NULL, \"AIF2TXCLK\" },\n+\t{ \"AIF2TX6\", NULL, \"AIF2TXCLK\" },\n+\t{ \"AIF2TX7\", NULL, \"AIF2TXCLK\" },\n+\t{ \"AIF2TX8\", NULL, \"AIF2TXCLK\" },\n+\t{ \"AIF3TX1\", NULL, \"AIF3TXCLK\" },\n+\t{ \"AIF3TX2\", NULL, \"AIF3TXCLK\" },\n+\t{ \"AIF4TX1\", NULL, \"AIF4TXCLK\" },\n+\t{ \"AIF4TX2\", NULL, \"AIF4TXCLK\" },\n+\t{ \"SLIMTX1\", NULL, \"SLIMBUSCLK\" },\n+\t{ \"SLIMTX2\", NULL, \"SLIMBUSCLK\" },\n+\t{ \"SLIMTX3\", NULL, \"SLIMBUSCLK\" },\n+\t{ \"SLIMTX4\", NULL, \"SLIMBUSCLK\" },\n+\t{ \"SLIMTX5\", NULL, \"SLIMBUSCLK\" },\n+\t{ \"SLIMTX6\", NULL, \"SLIMBUSCLK\" },\n+\t{ \"SLIMTX7\", NULL, \"SLIMBUSCLK\" },\n+\t{ \"SLIMTX8\", NULL, \"SLIMBUSCLK\" },\n+\t{ \"SPD1TX1\", NULL, \"SPDCLK\" },\n+\t{ \"SPD1TX2\", NULL, \"SPDCLK\" },\n+\t{ \"DSP1\", NULL, \"DSP1CLK\" },\n+\t{ \"DSP2\", NULL, \"DSP2CLK\" },\n+\t{ \"DSP3\", NULL, \"DSP3CLK\" },\n+\t{ \"DSP4\", NULL, \"DSP4CLK\" },\n+\t{ \"DSP5\", NULL, \"DSP5CLK\" },\n+\t{ \"DSP6\", NULL, \"DSP6CLK\" },\n+\t{ \"DSP7\", NULL, \"DSP7CLK\" },\n+\t{ \"ISRC1DEC1\", NULL, \"ISRC1DECCLK\" },\n+\t{ \"ISRC1DEC2\", NULL, \"ISRC1DECCLK\" },\n+\t{ \"ISRC1DEC3\", NULL, \"ISRC1DECCLK\" },\n+\t{ \"ISRC1DEC4\", NULL, \"ISRC1DECCLK\" },\n+\t{ \"ISRC1INT1\", NULL, \"ISRC1INTCLK\" },\n+\t{ \"ISRC1INT2\", NULL, \"ISRC1INTCLK\" },\n+\t{ \"ISRC1INT3\", NULL, \"ISRC1INTCLK\" },\n+\t{ \"ISRC1INT4\", NULL, \"ISRC1INTCLK\" },\n+\t{ \"ISRC2DEC1\", NULL, \"ISRC2DECCLK\" },\n+\t{ \"ISRC2DEC2\", NULL, \"ISRC2DECCLK\" },\n+\t{ \"ISRC2DEC3\", NULL, \"ISRC2DECCLK\" },\n+\t{ \"ISRC2DEC4\", NULL, \"ISRC2DECCLK\" },\n+\t{ \"ISRC2INT1\", NULL, \"ISRC2INTCLK\" },\n+\t{ \"ISRC2INT2\", NULL, \"ISRC2INTCLK\" },\n+\t{ \"ISRC2INT3\", NULL, \"ISRC2INTCLK\" },\n+\t{ \"ISRC2INT4\", NULL, \"ISRC2INTCLK\" },\n+\t{ \"ISRC3DEC1\", NULL, \"ISRC3DECCLK\" },\n+\t{ \"ISRC3DEC2\", NULL, \"ISRC3DECCLK\" },\n+\t{ \"ISRC3INT1\", NULL, \"ISRC3INTCLK\" },\n+\t{ \"ISRC3INT2\", NULL, \"ISRC3INTCLK\" },\n+\t{ \"ISRC4DEC1\", NULL, \"ISRC4DECCLK\" },\n+\t{ \"ISRC4DEC2\", NULL, \"ISRC4DECCLK\" },\n+\t{ \"ISRC4INT1\", NULL, \"ISRC4INTCLK\" },\n+\t{ \"ISRC4INT2\", NULL, \"ISRC4INTCLK\" },\n+\t{ \"ASRC1IN1L\", NULL, \"ASRC1R1CLK\" },\n+\t{ \"ASRC1IN1R\", NULL, \"ASRC1R1CLK\" },\n+\t{ \"ASRC1IN2L\", NULL, \"ASRC1R2CLK\" },\n+\t{ \"ASRC1IN2L\", NULL, \"ASRC1R2CLK\" },\n+\t{ \"ASRC2IN1L\", NULL, \"ASRC2R1CLK\" },\n+\t{ \"ASRC2IN1R\", NULL, \"ASRC2R1CLK\" },\n+\t{ \"ASRC2IN2L\", NULL, \"ASRC2R2CLK\" },\n+\t{ \"ASRC2IN2L\", NULL, \"ASRC2R2CLK\" },\n+\t{ \"DFC1\", NULL, \"DFCCLK\" },\n+\t{ \"DFC2\", NULL, \"DFCCLK\" },\n+\t{ \"DFC3\", NULL, \"DFCCLK\" },\n+\t{ \"DFC4\", NULL, \"DFCCLK\" },\n+\t{ \"DFC5\", NULL, \"DFCCLK\" },\n+\t{ \"DFC6\", NULL, \"DFCCLK\" },\n+\t{ \"DFC7\", NULL, \"DFCCLK\" },\n+\t{ \"DFC8\", NULL, \"DFCCLK\" },\n+\n+\t{ \"AIF2 Capture\", NULL, \"DBVDD2\" },\n+\t{ \"AIF2 Playback\", NULL, \"DBVDD2\" },\n+\n+\t{ \"AIF3 Capture\", NULL, \"DBVDD3\" },\n+\t{ \"AIF3 Playback\", NULL, \"DBVDD3\" },\n+\n+\t{ \"AIF4 Capture\", NULL, \"DBVDD3\" },\n+\t{ \"AIF4 Playback\", NULL, \"DBVDD3\" },\n+\n+\t{ \"OUT1L\", NULL, \"CPVDD1\" },\n+\t{ \"OUT1L\", NULL, \"CPVDD2\" },\n+\t{ \"OUT1R\", NULL, \"CPVDD1\" },\n+\t{ \"OUT1R\", NULL, \"CPVDD2\" },\n+\t{ \"OUT2L\", NULL, \"CPVDD1\" },\n+\t{ \"OUT2L\", NULL, \"CPVDD2\" },\n+\t{ \"OUT2R\", NULL, \"CPVDD1\" },\n+\t{ \"OUT2R\", NULL, \"CPVDD2\" },\n+\t{ \"OUT3L\", NULL, \"CPVDD1\" },\n+\t{ \"OUT3L\", NULL, \"CPVDD2\" },\n+\t{ \"OUT3R\", NULL, \"CPVDD1\" },\n+\t{ \"OUT3R\", NULL, \"CPVDD2\" },\n+\n+\t{ \"OUT1L\", NULL, \"SYSCLK\" },\n+\t{ \"OUT1R\", NULL, \"SYSCLK\" },\n+\t{ \"OUT2L\", NULL, \"SYSCLK\" },\n+\t{ \"OUT2R\", NULL, \"SYSCLK\" },\n+\t{ \"OUT3L\", NULL, \"SYSCLK\" },\n+\t{ \"OUT3R\", NULL, \"SYSCLK\" },\n+\t{ \"OUT5L\", NULL, \"SYSCLK\" },\n+\t{ \"OUT5R\", NULL, \"SYSCLK\" },\n+\n+\t{ \"SPD1\", NULL, \"SYSCLK\" },\n+\t{ \"SPD1\", NULL, \"SPD1TX1\" },\n+\t{ \"SPD1\", NULL, \"SPD1TX2\" },\n+\n+\t{ \"IN1AL\", NULL, \"SYSCLK\" },\n+\t{ \"IN1BL\", NULL, \"SYSCLK\" },\n+\t{ \"IN1AR\", NULL, \"SYSCLK\" },\n+\t{ \"IN1BR\", NULL, \"SYSCLK\" },\n+\t{ \"IN2AL\", NULL, \"SYSCLK\" },\n+\t{ \"IN2BL\", NULL, \"SYSCLK\" },\n+\t{ \"IN2R\", NULL, \"SYSCLK\" },\n+\t{ \"IN3L\", NULL, \"SYSCLK\" },\n+\t{ \"IN3R\", NULL, \"SYSCLK\" },\n+\t{ \"IN4L\", NULL, \"SYSCLK\" },\n+\t{ \"IN4R\", NULL, \"SYSCLK\" },\n+\t{ \"IN5L\", NULL, \"SYSCLK\" },\n+\t{ \"IN5R\", NULL, \"SYSCLK\" },\n+\n+\t{ \"IN3L\", NULL, \"DBVDD4\" },\n+\t{ \"IN3R\", NULL, \"DBVDD4\" },\n+\t{ \"IN4L\", NULL, \"DBVDD4\" },\n+\t{ \"IN4R\", NULL, \"DBVDD4\" },\n+\t{ \"IN5L\", NULL, \"DBVDD4\" },\n+\t{ \"IN5R\", NULL, \"DBVDD4\" },\n+\n+\t{ \"ASRC1IN1L\", NULL, \"SYSCLK\" },\n+\t{ \"ASRC1IN1R\", NULL, \"SYSCLK\" },\n+\t{ \"ASRC1IN2L\", NULL, \"SYSCLK\" },\n+\t{ \"ASRC1IN2R\", NULL, \"SYSCLK\" },\n+\t{ \"ASRC2IN1L\", NULL, \"SYSCLK\" },\n+\t{ \"ASRC2IN1R\", NULL, \"SYSCLK\" },\n+\t{ \"ASRC2IN2L\", NULL, \"SYSCLK\" },\n+\t{ \"ASRC2IN2R\", NULL, \"SYSCLK\" },\n+\n+\t{ \"ASRC1IN1L\", NULL, \"ASYNCCLK\" },\n+\t{ \"ASRC1IN1R\", NULL, \"ASYNCCLK\" },\n+\t{ \"ASRC1IN2L\", NULL, \"ASYNCCLK\" },\n+\t{ \"ASRC1IN2R\", NULL, \"ASYNCCLK\" },\n+\t{ \"ASRC2IN1L\", NULL, \"ASYNCCLK\" },\n+\t{ \"ASRC2IN1R\", NULL, \"ASYNCCLK\" },\n+\t{ \"ASRC2IN2L\", NULL, \"ASYNCCLK\" },\n+\t{ \"ASRC2IN2R\", NULL, \"ASYNCCLK\" },\n+\n+\t{ \"MICBIAS1\", NULL, \"MICVDD\" },\n+\t{ \"MICBIAS2\", NULL, \"MICVDD\" },\n+\n+\t{ \"MICBIAS1A\", NULL, \"MICBIAS1\" },\n+\t{ \"MICBIAS1B\", NULL, \"MICBIAS1\" },\n+\t{ \"MICBIAS1C\", NULL, \"MICBIAS1\" },\n+\t{ \"MICBIAS1D\", NULL, \"MICBIAS1\" },\n+\n+\t{ \"MICBIAS2A\", NULL, \"MICBIAS2\" },\n+\t{ \"MICBIAS2B\", NULL, \"MICBIAS2\" },\n+\t{ \"MICBIAS2C\", NULL, \"MICBIAS2\" },\n+\t{ \"MICBIAS2D\", NULL, \"MICBIAS2\" },\n+\n+\t{ \"Noise Generator\", NULL, \"SYSCLK\" },\n+\t{ \"Tone Generator 1\", NULL, \"SYSCLK\" },\n+\t{ \"Tone Generator 2\", NULL, \"SYSCLK\" },\n+\n+\t{ \"Noise Generator\", NULL, \"NOISE\" },\n+\t{ \"Tone Generator 1\", NULL, \"TONE\" },\n+\t{ \"Tone Generator 2\", NULL, \"TONE\" },\n+\n+\t{ \"AIF1 Capture\", NULL, \"AIF1TX1\" },\n+\t{ \"AIF1 Capture\", NULL, \"AIF1TX2\" },\n+\t{ \"AIF1 Capture\", NULL, \"AIF1TX3\" },\n+\t{ \"AIF1 Capture\", NULL, \"AIF1TX4\" },\n+\t{ \"AIF1 Capture\", NULL, \"AIF1TX5\" },\n+\t{ \"AIF1 Capture\", NULL, \"AIF1TX6\" },\n+\t{ \"AIF1 Capture\", NULL, \"AIF1TX7\" },\n+\t{ \"AIF1 Capture\", NULL, \"AIF1TX8\" },\n+\n+\t{ \"AIF1RX1\", NULL, \"AIF1 Playback\" },\n+\t{ \"AIF1RX2\", NULL, \"AIF1 Playback\" },\n+\t{ \"AIF1RX3\", NULL, \"AIF1 Playback\" },\n+\t{ \"AIF1RX4\", NULL, \"AIF1 Playback\" },\n+\t{ \"AIF1RX5\", NULL, \"AIF1 Playback\" },\n+\t{ \"AIF1RX6\", NULL, \"AIF1 Playback\" },\n+\t{ \"AIF1RX7\", NULL, \"AIF1 Playback\" },\n+\t{ \"AIF1RX8\", NULL, \"AIF1 Playback\" },\n+\n+\t{ \"AIF2 Capture\", NULL, \"AIF2TX1\" },\n+\t{ \"AIF2 Capture\", NULL, \"AIF2TX2\" },\n+\t{ \"AIF2 Capture\", NULL, \"AIF2TX3\" },\n+\t{ \"AIF2 Capture\", NULL, \"AIF2TX4\" },\n+\t{ \"AIF2 Capture\", NULL, \"AIF2TX5\" },\n+\t{ \"AIF2 Capture\", NULL, \"AIF2TX6\" },\n+\t{ \"AIF2 Capture\", NULL, \"AIF2TX7\" },\n+\t{ \"AIF2 Capture\", NULL, \"AIF2TX8\" },\n+\n+\t{ \"AIF2RX1\", NULL, \"AIF2 Playback\" },\n+\t{ \"AIF2RX2\", NULL, \"AIF2 Playback\" },\n+\t{ \"AIF2RX3\", NULL, \"AIF2 Playback\" },\n+\t{ \"AIF2RX4\", NULL, \"AIF2 Playback\" },\n+\t{ \"AIF2RX5\", NULL, \"AIF2 Playback\" },\n+\t{ \"AIF2RX6\", NULL, \"AIF2 Playback\" },\n+\t{ \"AIF2RX7\", NULL, \"AIF2 Playback\" },\n+\t{ \"AIF2RX8\", NULL, \"AIF2 Playback\" },\n+\n+\t{ \"AIF3 Capture\", NULL, \"AIF3TX1\" },\n+\t{ \"AIF3 Capture\", NULL, \"AIF3TX2\" },\n+\n+\t{ \"AIF3RX1\", NULL, \"AIF3 Playback\" },\n+\t{ \"AIF3RX2\", NULL, \"AIF3 Playback\" },\n+\n+\t{ \"AIF4 Capture\", NULL, \"AIF4TX1\" },\n+\t{ \"AIF4 Capture\", NULL, \"AIF4TX2\" },\n+\n+\t{ \"AIF4RX1\", NULL, \"AIF4 Playback\" },\n+\t{ \"AIF4RX2\", NULL, \"AIF4 Playback\" },\n+\n+\t{ \"Slim1 Capture\", NULL, \"SLIMTX1\" },\n+\t{ \"Slim1 Capture\", NULL, \"SLIMTX2\" },\n+\t{ \"Slim1 Capture\", NULL, \"SLIMTX3\" },\n+\t{ \"Slim1 Capture\", NULL, \"SLIMTX4\" },\n+\n+\t{ \"SLIMRX1\", NULL, \"Slim1 Playback\" },\n+\t{ \"SLIMRX2\", NULL, \"Slim1 Playback\" },\n+\t{ \"SLIMRX3\", NULL, \"Slim1 Playback\" },\n+\t{ \"SLIMRX4\", NULL, \"Slim1 Playback\" },\n+\n+\t{ \"Slim2 Capture\", NULL, \"SLIMTX5\" },\n+\t{ \"Slim2 Capture\", NULL, \"SLIMTX6\" },\n+\n+\t{ \"SLIMRX5\", NULL, \"Slim2 Playback\" },\n+\t{ \"SLIMRX6\", NULL, \"Slim2 Playback\" },\n+\n+\t{ \"Slim3 Capture\", NULL, \"SLIMTX7\" },\n+\t{ \"Slim3 Capture\", NULL, \"SLIMTX8\" },\n+\n+\t{ \"SLIMRX7\", NULL, \"Slim3 Playback\" },\n+\t{ \"SLIMRX8\", NULL, \"Slim3 Playback\" },\n+\n+\t{ \"AIF1 Playback\", NULL, \"SYSCLK\" },\n+\t{ \"AIF2 Playback\", NULL, \"SYSCLK\" },\n+\t{ \"AIF3 Playback\", NULL, \"SYSCLK\" },\n+\t{ \"AIF4 Playback\", NULL, \"SYSCLK\" },\n+\t{ \"Slim1 Playback\", NULL, \"SYSCLK\" },\n+\t{ \"Slim2 Playback\", NULL, \"SYSCLK\" },\n+\t{ \"Slim3 Playback\", NULL, \"SYSCLK\" },\n+\n+\t{ \"AIF1 Capture\", NULL, \"SYSCLK\" },\n+\t{ \"AIF2 Capture\", NULL, \"SYSCLK\" },\n+\t{ \"AIF3 Capture\", NULL, \"SYSCLK\" },\n+\t{ \"AIF4 Capture\", NULL, \"SYSCLK\" },\n+\t{ \"Slim1 Capture\", NULL, \"SYSCLK\" },\n+\t{ \"Slim2 Capture\", NULL, \"SYSCLK\" },\n+\t{ \"Slim3 Capture\", NULL, \"SYSCLK\" },\n+\n+\t{ \"Voice Control DSP\", NULL, \"DSP6\" },\n+\n+\t{ \"Audio Trace DSP\", NULL, \"DSP1\" },\n+\n+\t{ \"IN1L Mux\", \"A\", \"IN1AL\" },\n+\t{ \"IN1L Mux\", \"B\", \"IN1BL\" },\n+\t{ \"IN1R Mux\", \"A\", \"IN1AR\" },\n+\t{ \"IN1R Mux\", \"B\", \"IN1BR\" },\n+\n+\t{ \"IN2L Mux\", \"A\", \"IN2AL\" },\n+\t{ \"IN2L Mux\", \"B\", \"IN2BL\" },\n+\n+\t{ \"IN1L PGA\", NULL, \"IN1L Mux\" },\n+\t{ \"IN1R PGA\", NULL, \"IN1R Mux\" },\n+\n+\t{ \"IN2L PGA\", NULL, \"IN2L Mux\" },\n+\t{ \"IN2R PGA\", NULL, \"IN2R\" },\n+\n+\t{ \"IN3L PGA\", NULL, \"IN3L\" },\n+\t{ \"IN3R PGA\", NULL, \"IN3R\" },\n+\n+\t{ \"IN4L PGA\", NULL, \"IN4L\" },\n+\t{ \"IN4R PGA\", NULL, \"IN4R\" },\n+\n+\t{ \"IN5L PGA\", NULL, \"IN5L\" },\n+\t{ \"IN5R PGA\", NULL, \"IN5R\" },\n+\n+\tMADERA_MIXER_ROUTES(\"OUT1L\", \"HPOUT1L\"),\n+\tMADERA_MIXER_ROUTES(\"OUT1R\", \"HPOUT1R\"),\n+\tMADERA_MIXER_ROUTES(\"OUT2L\", \"HPOUT2L\"),\n+\tMADERA_MIXER_ROUTES(\"OUT2R\", \"HPOUT2R\"),\n+\tMADERA_MIXER_ROUTES(\"OUT3L\", \"HPOUT3L\"),\n+\tMADERA_MIXER_ROUTES(\"OUT3R\", \"HPOUT3R\"),\n+\n+\tMADERA_MIXER_ROUTES(\"OUT5L\", \"SPKDAT1L\"),\n+\tMADERA_MIXER_ROUTES(\"OUT5R\", \"SPKDAT1R\"),\n+\n+\tMADERA_MIXER_ROUTES(\"PWM1 Driver\", \"PWM1\"),\n+\tMADERA_MIXER_ROUTES(\"PWM2 Driver\", \"PWM2\"),\n+\n+\tMADERA_MIXER_ROUTES(\"AIF1TX1\", \"AIF1TX1\"),\n+\tMADERA_MIXER_ROUTES(\"AIF1TX2\", \"AIF1TX2\"),\n+\tMADERA_MIXER_ROUTES(\"AIF1TX3\", \"AIF1TX3\"),\n+\tMADERA_MIXER_ROUTES(\"AIF1TX4\", \"AIF1TX4\"),\n+\tMADERA_MIXER_ROUTES(\"AIF1TX5\", \"AIF1TX5\"),\n+\tMADERA_MIXER_ROUTES(\"AIF1TX6\", \"AIF1TX6\"),\n+\tMADERA_MIXER_ROUTES(\"AIF1TX7\", \"AIF1TX7\"),\n+\tMADERA_MIXER_ROUTES(\"AIF1TX8\", \"AIF1TX8\"),\n+\n+\tMADERA_MIXER_ROUTES(\"AIF2TX1\", \"AIF2TX1\"),\n+\tMADERA_MIXER_ROUTES(\"AIF2TX2\", \"AIF2TX2\"),\n+\tMADERA_MIXER_ROUTES(\"AIF2TX3\", \"AIF2TX3\"),\n+\tMADERA_MIXER_ROUTES(\"AIF2TX4\", \"AIF2TX4\"),\n+\tMADERA_MIXER_ROUTES(\"AIF2TX5\", \"AIF2TX5\"),\n+\tMADERA_MIXER_ROUTES(\"AIF2TX6\", \"AIF2TX6\"),\n+\tMADERA_MIXER_ROUTES(\"AIF2TX7\", \"AIF2TX7\"),\n+\tMADERA_MIXER_ROUTES(\"AIF2TX8\", \"AIF2TX8\"),\n+\n+\tMADERA_MIXER_ROUTES(\"AIF3TX1\", \"AIF3TX1\"),\n+\tMADERA_MIXER_ROUTES(\"AIF3TX2\", \"AIF3TX2\"),\n+\n+\tMADERA_MIXER_ROUTES(\"AIF4TX1\", \"AIF4TX1\"),\n+\tMADERA_MIXER_ROUTES(\"AIF4TX2\", \"AIF4TX2\"),\n+\n+\tMADERA_MIXER_ROUTES(\"SLIMTX1\", \"SLIMTX1\"),\n+\tMADERA_MIXER_ROUTES(\"SLIMTX2\", \"SLIMTX2\"),\n+\tMADERA_MIXER_ROUTES(\"SLIMTX3\", \"SLIMTX3\"),\n+\tMADERA_MIXER_ROUTES(\"SLIMTX4\", \"SLIMTX4\"),\n+\tMADERA_MIXER_ROUTES(\"SLIMTX5\", \"SLIMTX5\"),\n+\tMADERA_MIXER_ROUTES(\"SLIMTX6\", \"SLIMTX6\"),\n+\tMADERA_MIXER_ROUTES(\"SLIMTX7\", \"SLIMTX7\"),\n+\tMADERA_MIXER_ROUTES(\"SLIMTX8\", \"SLIMTX8\"),\n+\n+\tMADERA_MUX_ROUTES(\"SPD1TX1\", \"SPDIF1TX1\"),\n+\tMADERA_MUX_ROUTES(\"SPD1TX2\", \"SPDIF1TX2\"),\n+\n+\tMADERA_MIXER_ROUTES(\"EQ1\", \"EQ1\"),\n+\tMADERA_MIXER_ROUTES(\"EQ2\", \"EQ2\"),\n+\tMADERA_MIXER_ROUTES(\"EQ3\", \"EQ3\"),\n+\tMADERA_MIXER_ROUTES(\"EQ4\", \"EQ4\"),\n+\n+\tMADERA_MIXER_ROUTES(\"DRC1L\", \"DRC1L\"),\n+\tMADERA_MIXER_ROUTES(\"DRC1R\", \"DRC1R\"),\n+\tMADERA_MIXER_ROUTES(\"DRC2L\", \"DRC2L\"),\n+\tMADERA_MIXER_ROUTES(\"DRC2R\", \"DRC2R\"),\n+\n+\tMADERA_MIXER_ROUTES(\"LHPF1\", \"LHPF1\"),\n+\tMADERA_MIXER_ROUTES(\"LHPF2\", \"LHPF2\"),\n+\tMADERA_MIXER_ROUTES(\"LHPF3\", \"LHPF3\"),\n+\tMADERA_MIXER_ROUTES(\"LHPF4\", \"LHPF4\"),\n+\n+\tMADERA_MUX_ROUTES(\"ASRC1IN1L\", \"ASRC1IN1L\"),\n+\tMADERA_MUX_ROUTES(\"ASRC1IN1R\", \"ASRC1IN1R\"),\n+\tMADERA_MUX_ROUTES(\"ASRC1IN2L\", \"ASRC1IN2L\"),\n+\tMADERA_MUX_ROUTES(\"ASRC1IN2R\", \"ASRC1IN2R\"),\n+\tMADERA_MUX_ROUTES(\"ASRC2IN1L\", \"ASRC2IN1L\"),\n+\tMADERA_MUX_ROUTES(\"ASRC2IN1R\", \"ASRC2IN1R\"),\n+\tMADERA_MUX_ROUTES(\"ASRC2IN2L\", \"ASRC2IN2L\"),\n+\tMADERA_MUX_ROUTES(\"ASRC2IN2R\", \"ASRC2IN2R\"),\n+\n+\tMADERA_DSP_ROUTES(\"DSP1\"),\n+\tMADERA_DSP_ROUTES(\"DSP2\"),\n+\tMADERA_DSP_ROUTES(\"DSP3\"),\n+\tMADERA_DSP_ROUTES(\"DSP4\"),\n+\tMADERA_DSP_ROUTES(\"DSP5\"),\n+\tMADERA_DSP_ROUTES(\"DSP6\"),\n+\tMADERA_DSP_ROUTES(\"DSP7\"),\n+\n+\t{ \"DSP Trigger Out\", NULL, \"DSP1 Trigger Output\" },\n+\t{ \"DSP Trigger Out\", NULL, \"DSP2 Trigger Output\" },\n+\t{ \"DSP Trigger Out\", NULL, \"DSP3 Trigger Output\" },\n+\t{ \"DSP Trigger Out\", NULL, \"DSP4 Trigger Output\" },\n+\t{ \"DSP Trigger Out\", NULL, \"DSP5 Trigger Output\" },\n+\t{ \"DSP Trigger Out\", NULL, \"DSP6 Trigger Output\" },\n+\t{ \"DSP Trigger Out\", NULL, \"DSP7 Trigger Output\" },\n+\n+\t{ \"DSP1 Trigger Output\", \"Switch\", \"DSP1\" },\n+\t{ \"DSP2 Trigger Output\", \"Switch\", \"DSP2\" },\n+\t{ \"DSP3 Trigger Output\", \"Switch\", \"DSP3\" },\n+\t{ \"DSP4 Trigger Output\", \"Switch\", \"DSP4\" },\n+\t{ \"DSP5 Trigger Output\", \"Switch\", \"DSP5\" },\n+\t{ \"DSP6 Trigger Output\", \"Switch\", \"DSP6\" },\n+\t{ \"DSP7 Trigger Output\", \"Switch\", \"DSP7\" },\n+\n+\tMADERA_MUX_ROUTES(\"ISRC1INT1\", \"ISRC1INT1\"),\n+\tMADERA_MUX_ROUTES(\"ISRC1INT2\", \"ISRC1INT2\"),\n+\tMADERA_MUX_ROUTES(\"ISRC1INT3\", \"ISRC1INT3\"),\n+\tMADERA_MUX_ROUTES(\"ISRC1INT4\", \"ISRC1INT4\"),\n+\n+\tMADERA_MUX_ROUTES(\"ISRC1DEC1\", \"ISRC1DEC1\"),\n+\tMADERA_MUX_ROUTES(\"ISRC1DEC2\", \"ISRC1DEC2\"),\n+\tMADERA_MUX_ROUTES(\"ISRC1DEC3\", \"ISRC1DEC3\"),\n+\tMADERA_MUX_ROUTES(\"ISRC1DEC4\", \"ISRC1DEC4\"),\n+\n+\tMADERA_MUX_ROUTES(\"ISRC2INT1\", \"ISRC2INT1\"),\n+\tMADERA_MUX_ROUTES(\"ISRC2INT2\", \"ISRC2INT2\"),\n+\tMADERA_MUX_ROUTES(\"ISRC2INT3\", \"ISRC2INT3\"),\n+\tMADERA_MUX_ROUTES(\"ISRC2INT4\", \"ISRC2INT4\"),\n+\n+\tMADERA_MUX_ROUTES(\"ISRC2DEC1\", \"ISRC2DEC1\"),\n+\tMADERA_MUX_ROUTES(\"ISRC2DEC2\", \"ISRC2DEC2\"),\n+\tMADERA_MUX_ROUTES(\"ISRC2DEC3\", \"ISRC2DEC3\"),\n+\tMADERA_MUX_ROUTES(\"ISRC2DEC4\", \"ISRC2DEC4\"),\n+\n+\tMADERA_MUX_ROUTES(\"ISRC3INT1\", \"ISRC3INT1\"),\n+\tMADERA_MUX_ROUTES(\"ISRC3INT2\", \"ISRC3INT2\"),\n+\n+\tMADERA_MUX_ROUTES(\"ISRC3DEC1\", \"ISRC3DEC1\"),\n+\tMADERA_MUX_ROUTES(\"ISRC3DEC2\", \"ISRC3DEC2\"),\n+\n+\tMADERA_MUX_ROUTES(\"ISRC4INT1\", \"ISRC4INT1\"),\n+\tMADERA_MUX_ROUTES(\"ISRC4INT2\", \"ISRC4INT2\"),\n+\n+\tMADERA_MUX_ROUTES(\"ISRC4DEC1\", \"ISRC4DEC1\"),\n+\tMADERA_MUX_ROUTES(\"ISRC4DEC2\", \"ISRC4DEC2\"),\n+\n+\t{ \"AEC1 Loopback\", \"HPOUT1L\", \"OUT1L\" },\n+\t{ \"AEC1 Loopback\", \"HPOUT1R\", \"OUT1R\" },\n+\t{ \"HPOUT1L\", NULL, \"OUT1L\" },\n+\t{ \"HPOUT1R\", NULL, \"OUT1R\" },\n+\n+\t{ \"AEC1 Loopback\", \"HPOUT2L\", \"OUT2L\" },\n+\t{ \"AEC1 Loopback\", \"HPOUT2R\", \"OUT2R\" },\n+\t{ \"HPOUT2L\", NULL, \"OUT2L\" },\n+\t{ \"HPOUT2R\", NULL, \"OUT2R\" },\n+\n+\t{ \"AEC1 Loopback\", \"HPOUT3L\", \"OUT3L\" },\n+\t{ \"AEC1 Loopback\", \"HPOUT3R\", \"OUT3R\" },\n+\t{ \"HPOUT3L\", NULL, \"OUT3L\" },\n+\t{ \"HPOUT3R\", NULL, \"OUT3R\" },\n+\n+\t{ \"AEC1 Loopback\", \"SPKDAT1L\", \"OUT5L\" },\n+\t{ \"AEC1 Loopback\", \"SPKDAT1R\", \"OUT5R\" },\n+\t{ \"SPKDAT1L\", NULL, \"OUT5L\" },\n+\t{ \"SPKDAT1R\", NULL, \"OUT5R\" },\n+\n+\tCS47L90_RXANC_INPUT_ROUTES(\"RXANCL\", \"RXANCL\"),\n+\tCS47L90_RXANC_INPUT_ROUTES(\"RXANCR\", \"RXANCR\"),\n+\n+\tCS47L90_RXANC_OUTPUT_ROUTES(\"OUT1L\", \"HPOUT1L\"),\n+\tCS47L90_RXANC_OUTPUT_ROUTES(\"OUT1R\", \"HPOUT1R\"),\n+\tCS47L90_RXANC_OUTPUT_ROUTES(\"OUT2L\", \"HPOUT2L\"),\n+\tCS47L90_RXANC_OUTPUT_ROUTES(\"OUT2R\", \"HPOUT2R\"),\n+\tCS47L90_RXANC_OUTPUT_ROUTES(\"OUT3L\", \"HPOUT3L\"),\n+\tCS47L90_RXANC_OUTPUT_ROUTES(\"OUT3R\", \"HPOUT3R\"),\n+\tCS47L90_RXANC_OUTPUT_ROUTES(\"OUT5L\", \"SPKDAT1L\"),\n+\tCS47L90_RXANC_OUTPUT_ROUTES(\"OUT5R\", \"SPKDAT1R\"),\n+\n+\t{ \"SPDIF1\", NULL, \"SPD1\" },\n+\n+\t{ \"MICSUPP\", NULL, \"SYSCLK\" },\n+\n+\t{ \"DRC1 Signal Activity\", NULL, \"DRC1 Activity Output\" },\n+\t{ \"DRC2 Signal Activity\", NULL, \"DRC2 Activity Output\" },\n+\t{ \"DRC1 Activity Output\", \"Switch\", \"DRC1L\" },\n+\t{ \"DRC1 Activity Output\", \"Switch\", \"DRC1R\" },\n+\t{ \"DRC2 Activity Output\", \"Switch\", \"DRC2L\" },\n+\t{ \"DRC2 Activity Output\", \"Switch\", \"DRC2R\" },\n+\n+\tMADERA_MUX_ROUTES(\"DFC1\", \"DFC1\"),\n+\tMADERA_MUX_ROUTES(\"DFC2\", \"DFC2\"),\n+\tMADERA_MUX_ROUTES(\"DFC3\", \"DFC3\"),\n+\tMADERA_MUX_ROUTES(\"DFC4\", \"DFC4\"),\n+\tMADERA_MUX_ROUTES(\"DFC5\", \"DFC5\"),\n+\tMADERA_MUX_ROUTES(\"DFC6\", \"DFC6\"),\n+\tMADERA_MUX_ROUTES(\"DFC7\", \"DFC7\"),\n+\tMADERA_MUX_ROUTES(\"DFC8\", \"DFC8\"),\n+};\n+\n+static int cs47l90_set_fll(struct snd_soc_codec *codec, int fll_id, int source,\n+\t\t\t   unsigned int Fref, unsigned int Fout)\n+{\n+\tstruct cs47l90 *cs47l90 = snd_soc_codec_get_drvdata(codec);\n+\n+\tswitch (fll_id) {\n+\tcase MADERA_FLL1_REFCLK:\n+\t\treturn madera_set_fll_refclk(&cs47l90->fll[0], source, Fref,\n+\t\t\t\t\t     Fout);\n+\tcase MADERA_FLL2_REFCLK:\n+\t\treturn madera_set_fll_refclk(&cs47l90->fll[1], source, Fref,\n+\t\t\t\t\t     Fout);\n+\tcase MADERA_FLLAO_REFCLK:\n+\t\treturn madera_set_fll_ao_refclk(&cs47l90->fll[2], source, Fref,\n+\t\t\t\t\t\tFout);\n+\tcase MADERA_FLL1_SYNCCLK:\n+\t\treturn madera_set_fll_syncclk(&cs47l90->fll[0], source, Fref,\n+\t\t\t\t\t      Fout);\n+\tcase MADERA_FLL2_SYNCCLK:\n+\t\treturn madera_set_fll_syncclk(&cs47l90->fll[1], source, Fref,\n+\t\t\t\t\t      Fout);\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+}\n+\n+static struct snd_soc_dai_driver cs47l90_dai[] = {\n+\t{\n+\t\t.name = \"cs47l90-aif1\",\n+\t\t.id = 1,\n+\t\t.base = MADERA_AIF1_BCLK_CTRL,\n+\t\t.playback = {\n+\t\t\t.stream_name = \"AIF1 Playback\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 8,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t},\n+\t\t.capture = {\n+\t\t\t.stream_name = \"AIF1 Capture\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 8,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t },\n+\t\t.ops = &madera_dai_ops,\n+\t\t.symmetric_rates = 1,\n+\t\t.symmetric_samplebits = 1,\n+\t},\n+\t{\n+\t\t.name = \"cs47l90-aif2\",\n+\t\t.id = 2,\n+\t\t.base = MADERA_AIF2_BCLK_CTRL,\n+\t\t.playback = {\n+\t\t\t.stream_name = \"AIF2 Playback\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 8,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t},\n+\t\t.capture = {\n+\t\t\t.stream_name = \"AIF2 Capture\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 8,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t },\n+\t\t.ops = &madera_dai_ops,\n+\t\t.symmetric_rates = 1,\n+\t\t.symmetric_samplebits = 1,\n+\t},\n+\t{\n+\t\t.name = \"cs47l90-aif3\",\n+\t\t.id = 3,\n+\t\t.base = MADERA_AIF3_BCLK_CTRL,\n+\t\t.playback = {\n+\t\t\t.stream_name = \"AIF3 Playback\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 2,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t},\n+\t\t.capture = {\n+\t\t\t.stream_name = \"AIF3 Capture\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 2,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t },\n+\t\t.ops = &madera_dai_ops,\n+\t\t.symmetric_rates = 1,\n+\t\t.symmetric_samplebits = 1,\n+\t},\n+\t{\n+\t\t.name = \"cs47l90-aif4\",\n+\t\t.id = 4,\n+\t\t.base = MADERA_AIF4_BCLK_CTRL,\n+\t\t.playback = {\n+\t\t\t.stream_name = \"AIF4 Playback\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 2,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t},\n+\t\t.capture = {\n+\t\t\t.stream_name = \"AIF4 Capture\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 2,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t },\n+\t\t.ops = &madera_dai_ops,\n+\t\t.symmetric_rates = 1,\n+\t\t.symmetric_samplebits = 1,\n+\t},\n+\t{\n+\t\t.name = \"cs47l90-slim1\",\n+\t\t.id = 5,\n+\t\t.playback = {\n+\t\t\t.stream_name = \"Slim1 Playback\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 4,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t},\n+\t\t.capture = {\n+\t\t\t.stream_name = \"Slim1 Capture\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 4,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t },\n+\t\t.ops = &madera_simple_dai_ops,\n+\t},\n+\t{\n+\t\t.name = \"cs47l90-slim2\",\n+\t\t.id = 6,\n+\t\t.playback = {\n+\t\t\t.stream_name = \"Slim2 Playback\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 2,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t},\n+\t\t.capture = {\n+\t\t\t.stream_name = \"Slim2 Capture\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 2,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t },\n+\t\t.ops = &madera_simple_dai_ops,\n+\t},\n+\t{\n+\t\t.name = \"cs47l90-slim3\",\n+\t\t.id = 7,\n+\t\t.playback = {\n+\t\t\t.stream_name = \"Slim3 Playback\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 2,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t},\n+\t\t.capture = {\n+\t\t\t.stream_name = \"Slim3 Capture\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 2,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t },\n+\t\t.ops = &madera_simple_dai_ops,\n+\t},\n+\t{\n+\t\t.name = \"cs47l90-cpu-voicectrl\",\n+\t\t.capture = {\n+\t\t\t.stream_name = \"Voice Control CPU\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 1,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t},\n+\t\t.compress_new = snd_soc_new_compress,\n+\t},\n+\t{\n+\t\t.name = \"cs47l90-dsp-voicectrl\",\n+\t\t.capture = {\n+\t\t\t.stream_name = \"Voice Control DSP\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 1,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t},\n+\t},\n+\t{\n+\t\t.name = \"cs47l90-cpu-trace\",\n+\t\t.capture = {\n+\t\t\t.stream_name = \"Audio Trace CPU\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 6,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t},\n+\t\t.compress_new = snd_soc_new_compress,\n+\t},\n+\t{\n+\t\t.name = \"cs47l90-dsp-trace\",\n+\t\t.capture = {\n+\t\t\t.stream_name = \"Audio Trace DSP\",\n+\t\t\t.channels_min = 1,\n+\t\t\t.channels_max = 6,\n+\t\t\t.rates = MADERA_RATES,\n+\t\t\t.formats = MADERA_FORMATS,\n+\t\t},\n+\t},\n+};\n+\n+static int cs47l90_open(struct snd_compr_stream *stream)\n+{\n+\tstruct snd_soc_pcm_runtime *rtd = stream->private_data;\n+\tstruct cs47l90 *cs47l90 = snd_soc_platform_get_drvdata(rtd->platform);\n+\tstruct madera_priv *priv = &cs47l90->core;\n+\tstruct madera *madera = priv->madera;\n+\tint n_adsp;\n+\n+\tif (strcmp(rtd->codec_dai->name, \"cs47l90-dsp-voicectrl\") == 0) {\n+\t\tn_adsp = 5;\n+\t} else if (strcmp(rtd->codec_dai->name, \"cs47l90-dsp-trace\") == 0) {\n+\t\tn_adsp = 0;\n+\t} else {\n+\t\tdev_err(madera->dev,\n+\t\t\t\"No suitable compressed stream for DAI '%s'\\n\",\n+\t\t\trtd->codec_dai->name);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn wm_adsp_compr_open(&priv->adsp[n_adsp], stream);\n+}\n+\n+static irqreturn_t cs47l90_adsp2_irq(int irq, void *data)\n+{\n+\tstruct cs47l90 *cs47l90 = data;\n+\tstruct madera_priv *priv = &cs47l90->core;\n+\tstruct madera *madera = priv->madera;\n+\tstruct madera_voice_trigger_info trig_info;\n+\tint serviced = 0;\n+\tint i, ret;\n+\n+\tfor (i = 0; i < CS47L90_NUM_ADSP; ++i) {\n+\t\tret = wm_adsp_compr_handle_irq(&priv->adsp[i]);\n+\t\tif (ret != -ENODEV)\n+\t\t\tserviced++;\n+\t\tif (ret == WM_ADSP_COMPR_VOICE_TRIGGER) {\n+\t\t\ttrig_info.core_num = i + 1;\n+\t\t\tblocking_notifier_call_chain(&madera->notifier,\n+\t\t\t\t\t\tMADERA_NOTIFY_VOICE_TRIGGER,\n+\t\t\t\t\t\t&trig_info);\n+\t\t}\n+\t}\n+\n+\tif (!serviced) {\n+\t\tdev_err(madera->dev, \"Spurious compressed data IRQ\\n\");\n+\t\treturn IRQ_NONE;\n+\t}\n+\n+\treturn IRQ_HANDLED;\n+}\n+\n+static irqreturn_t cs47l90_dsp_bus_error(int irq, void *data)\n+{\n+\tstruct wm_adsp *dsp = (struct wm_adsp *)data;\n+\n+\treturn wm_adsp2_bus_error(dsp);\n+}\n+\n+static const char * const cs47l90_dmic_refs[] = {\n+\t\"MICVDD\",\n+\t\"MICBIAS1\",\n+\t\"MICBIAS2\",\n+\t\"MICBIAS3\",\n+};\n+\n+static const char * const cs47l90_dmic_inputs[] = {\n+\t\"IN1L Mux\",\n+\t\"IN1R Mux\",\n+\t\"IN2L Mux\",\n+\t\"IN2R\",\n+\t\"IN3L\",\n+\t\"IN3R\",\n+\t\"IN4L\",\n+\t\"IN4R\",\n+\t\"IN5L\",\n+\t\"IN5R\",\n+};\n+\n+static int cs47l90_codec_probe(struct snd_soc_codec *codec)\n+{\n+\tstruct cs47l90 *cs47l90 = snd_soc_codec_get_drvdata(codec);\n+\tstruct madera *madera = cs47l90->core.madera;\n+\tint ret, i;\n+\n+\tmadera->dapm = snd_soc_codec_get_dapm(codec);\n+\n+\tret = madera_init_inputs(codec,\n+\t\t\t\t cs47l90_dmic_inputs,\n+\t\t\t\t ARRAY_SIZE(cs47l90_dmic_inputs),\n+\t\t\t\t cs47l90_dmic_refs,\n+\t\t\t\t ARRAY_SIZE(cs47l90_dmic_refs));\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tret = madera_init_outputs(codec, CS47L90_MONO_OUTPUTS);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tsnd_soc_component_disable_pin(snd_soc_dapm_to_component(madera->dapm),\n+\t\t\t\t      \"HAPTICS\");\n+\n+\tret = snd_soc_add_codec_controls(codec, madera_adsp_rate_controls,\n+\t\t\t\t\t CS47L90_NUM_ADSP);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tfor (i = 0; i < CS47L90_NUM_ADSP; i++)\n+\t\twm_adsp2_codec_probe(&cs47l90->core.adsp[i], codec);\n+\n+\treturn 0;\n+}\n+\n+static int cs47l90_codec_remove(struct snd_soc_codec *codec)\n+{\n+\tint i;\n+\tstruct cs47l90 *cs47l90 = snd_soc_codec_get_drvdata(codec);\n+\n+\tfor (i = 0; i < CS47L90_NUM_ADSP; i++) {\n+\t\twm_adsp2_codec_remove(&cs47l90->core.adsp[i], codec);\n+\t\tmadera_destroy_bus_error_irq(&cs47l90->core, i);\n+\t}\n+\n+\tcs47l90->core.madera->dapm = NULL;\n+\n+\treturn 0;\n+}\n+\n+#define CS47L90_DIG_VU 0x0200\n+\n+static unsigned int cs47l90_digital_vu[] = {\n+\tMADERA_DAC_DIGITAL_VOLUME_1L,\n+\tMADERA_DAC_DIGITAL_VOLUME_1R,\n+\tMADERA_DAC_DIGITAL_VOLUME_2L,\n+\tMADERA_DAC_DIGITAL_VOLUME_2R,\n+\tMADERA_DAC_DIGITAL_VOLUME_3L,\n+\tMADERA_DAC_DIGITAL_VOLUME_3R,\n+\tMADERA_DAC_DIGITAL_VOLUME_5L,\n+\tMADERA_DAC_DIGITAL_VOLUME_5R,\n+};\n+\n+static struct regmap *cs47l90_get_regmap(struct device *dev)\n+{\n+\tstruct cs47l90 *cs47l90 = dev_get_drvdata(dev);\n+\n+\treturn cs47l90->core.madera->regmap;\n+}\n+\n+static struct snd_soc_codec_driver soc_codec_dev_cs47l90 = {\n+\t.probe = cs47l90_codec_probe,\n+\t.remove = cs47l90_codec_remove,\n+\t.get_regmap = cs47l90_get_regmap,\n+\n+\t.idle_bias_off = true,\n+\n+\t.set_sysclk = madera_set_sysclk,\n+\t.set_pll = cs47l90_set_fll,\n+\n+\t.component_driver = {\n+\t\t.controls = cs47l90_snd_controls,\n+\t\t.num_controls = ARRAY_SIZE(cs47l90_snd_controls),\n+\t\t.dapm_widgets = cs47l90_dapm_widgets,\n+\t\t.num_dapm_widgets = ARRAY_SIZE(cs47l90_dapm_widgets),\n+\t\t.dapm_routes = cs47l90_dapm_routes,\n+\t\t.num_dapm_routes = ARRAY_SIZE(cs47l90_dapm_routes),\n+\t},\n+};\n+\n+static struct snd_compr_ops cs47l90_compr_ops = {\n+\t.open = cs47l90_open,\n+\t.free = wm_adsp_compr_free,\n+\t.set_params = wm_adsp_compr_set_params,\n+\t.get_caps = wm_adsp_compr_get_caps,\n+\t.trigger = wm_adsp_compr_trigger,\n+\t.pointer = wm_adsp_compr_pointer,\n+\t.copy = wm_adsp_compr_copy,\n+};\n+\n+static struct snd_soc_platform_driver cs47l90_compr_platform = {\n+\t.compr_ops = &cs47l90_compr_ops,\n+};\n+\n+static int cs47l90_probe(struct platform_device *pdev)\n+{\n+\tstruct madera *madera = dev_get_drvdata(pdev->dev.parent);\n+\tstruct cs47l90 *cs47l90;\n+\tint i, ret;\n+\n+\tBUILD_BUG_ON(ARRAY_SIZE(cs47l90_dai) > MADERA_MAX_DAI);\n+\n+\t/* quick exit if Madera irqchip driver hasn't completed probe */\n+\tif (!madera->irq_dev) {\n+\t\tdev_dbg(&pdev->dev, \"irqchip driver not ready\\n\");\n+\t\treturn -EPROBE_DEFER;\n+\t}\n+\n+\tcs47l90 = devm_kzalloc(&pdev->dev, sizeof(struct cs47l90),\n+\t\t\t      GFP_KERNEL);\n+\tif (!cs47l90)\n+\t\treturn -ENOMEM;\n+\n+\tplatform_set_drvdata(pdev, cs47l90);\n+\n+\tcs47l90->core.madera = madera;\n+\tcs47l90->core.dev = &pdev->dev;\n+\tcs47l90->core.num_inputs = 10;\n+\n+\tret = madera_core_init(&cs47l90->core);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tret = madera_request_irq(madera, MADERA_IRQ_DSP_IRQ1,\n+\t\t\t\t \"ADSP2 Compressed IRQ\", cs47l90_adsp2_irq,\n+\t\t\t\t cs47l90);\n+\tif (ret != 0) {\n+\t\tdev_err(&pdev->dev, \"Failed to request DSP IRQ: %d\\n\", ret);\n+\t\treturn ret;\n+\t}\n+\n+\tfor (i = 0; i < CS47L90_NUM_ADSP; i++) {\n+\t\tcs47l90->core.adsp[i].part = \"cs47l90\";\n+\t\tcs47l90->core.adsp[i].num = i + 1;\n+\t\tcs47l90->core.adsp[i].type = WMFW_ADSP2;\n+\t\tcs47l90->core.adsp[i].rev = 2;\n+\t\tcs47l90->core.adsp[i].dev = madera->dev;\n+\t\tcs47l90->core.adsp[i].regmap = madera->regmap_32bit;\n+\n+\t\tcs47l90->core.adsp[i].base = cs47l90_dsp_control_bases[i];\n+\t\tcs47l90->core.adsp[i].mem = cs47l90_dsp_regions[i];\n+\t\tcs47l90->core.adsp[i].num_mems\n+\t\t\t= ARRAY_SIZE(cs47l90_dsp1_regions);\n+\n+\t\tcs47l90->core.adsp[i].lock_regions = WM_ADSP2_REGION_1_9;\n+\n+\t\tret = wm_adsp2_init(&cs47l90->core.adsp[i]);\n+\n+\t\tif (ret == 0) {\n+\t\t\tret = madera_init_bus_error_irq(&cs47l90->core,\n+\t\t\t\t\t\t\ti,\n+\t\t\t\t\t\t\tcs47l90_dsp_bus_error);\n+\t\t\tif (ret != 0)\n+\t\t\t\twm_adsp2_remove(&cs47l90->core.adsp[i]);\n+\t\t}\n+\n+\t\tif (ret != 0) {\n+\t\t\tfor (--i; i >= 0; --i) {\n+\t\t\t\tmadera_destroy_bus_error_irq(&cs47l90->core, i);\n+\t\t\t\twm_adsp2_remove(&cs47l90->core.adsp[i]);\n+\t\t\t}\n+\t\t\tgoto error_core;\n+\t\t}\n+\t}\n+\n+\tmadera_init_fll(madera, 1, MADERA_FLL1_CONTROL_1 - 1,\n+\t\t\t&cs47l90->fll[0]);\n+\tmadera_init_fll(madera, 2, MADERA_FLL2_CONTROL_1 - 1,\n+\t\t\t&cs47l90->fll[1]);\n+\tmadera_init_fll(madera, 4, MADERA_FLLAO_CONTROL_1 - 1,\n+\t\t\t&cs47l90->fll[2]);\n+\n+\tfor (i = 0; i < ARRAY_SIZE(cs47l90_dai); i++)\n+\t\tmadera_init_dai(&cs47l90->core, i);\n+\n+\t/* Latch volume update bits */\n+\tfor (i = 0; i < ARRAY_SIZE(cs47l90_digital_vu); i++)\n+\t\tregmap_update_bits(madera->regmap, cs47l90_digital_vu[i],\n+\t\t\t\t   CS47L90_DIG_VU, CS47L90_DIG_VU);\n+\n+\tpm_runtime_enable(&pdev->dev);\n+\tpm_runtime_idle(&pdev->dev);\n+\n+\tret = snd_soc_register_platform(&pdev->dev, &cs47l90_compr_platform);\n+\tif (ret < 0) {\n+\t\tdev_err(&pdev->dev, \"Failed to register platform: %d\\n\", ret);\n+\t\tgoto error;\n+\t}\n+\n+\tret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_cs47l90,\n+\t\t\t\t     cs47l90_dai, ARRAY_SIZE(cs47l90_dai));\n+\tif (ret < 0) {\n+\t\tdev_err(&pdev->dev,\n+\t\t\t\"Failed to register codec: %d\\n\", ret);\n+\t\tsnd_soc_unregister_platform(&pdev->dev);\n+\t\tgoto error;\n+\t}\n+\n+\treturn ret;\n+\n+error:\n+\tfor (i = 0; i < CS47L90_NUM_ADSP; i++) {\n+\t\tmadera_destroy_bus_error_irq(&cs47l90->core, i);\n+\t\twm_adsp2_remove(&cs47l90->core.adsp[i]);\n+\t}\n+\n+error_core:\n+\tmadera_free_irq(madera, MADERA_IRQ_DSP_IRQ1, cs47l90);\n+\tmadera_core_destroy(&cs47l90->core);\n+\n+\treturn ret;\n+}\n+\n+static int cs47l90_remove(struct platform_device *pdev)\n+{\n+\tstruct cs47l90 *cs47l90 = platform_get_drvdata(pdev);\n+\tint i;\n+\n+\tsnd_soc_unregister_platform(&pdev->dev);\n+\tsnd_soc_unregister_codec(&pdev->dev);\n+\tpm_runtime_disable(&pdev->dev);\n+\n+\tfor (i = 0; i < CS47L90_NUM_ADSP; i++) {\n+\t\tmadera_destroy_bus_error_irq(&cs47l90->core, i);\n+\t\twm_adsp2_remove(&cs47l90->core.adsp[i]);\n+\t}\n+\n+\tmadera_free_irq(cs47l90->core.madera, MADERA_IRQ_DSP_IRQ1, cs47l90);\n+\tmadera_core_destroy(&cs47l90->core);\n+\n+\treturn 0;\n+}\n+\n+static struct platform_driver cs47l90_codec_driver = {\n+\t.driver = {\n+\t\t.name = \"cs47l90-codec\",\n+\t},\n+\t.probe = cs47l90_probe,\n+\t.remove = cs47l90_remove,\n+};\n+\n+module_platform_driver(cs47l90_codec_driver);\n+\n+MODULE_DESCRIPTION(\"ASoC CS47L90 driver\");\n+MODULE_AUTHOR(\"Nikesh Oswal <nikesh@opensource.wolfsonmicro.com>\");\n+MODULE_LICENSE(\"GPL v2\");\n+MODULE_ALIAS(\"platform:cs47l90-codec\");\n",
    "prefixes": [
        "v5",
        "17/17"
    ]
}