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GET /api/patches/810400/?format=api
{ "id": 810400, "url": "http://patchwork.ozlabs.org/api/patches/810400/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20170906052343.17989-13-wenyou.yang@microchip.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170906052343.17989-13-wenyou.yang@microchip.com>", "list_archive_url": null, "date": "2017-09-06T05:23:43", "name": "[U-Boot,v4,12/12] board: atmel: Add SAMA5D27 SOM1 EK board", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "57ec2ebad63ed68414f7a68ecccd40ee75673e09", "submitter": { "id": 69532, "url": "http://patchwork.ozlabs.org/api/people/69532/?format=api", "name": "Wenyou Yang", "email": "Wenyou.Yang@microchip.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20170906052343.17989-13-wenyou.yang@microchip.com/mbox/", "series": [ { "id": 1695, "url": "http://patchwork.ozlabs.org/api/series/1695/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=1695", "date": "2017-09-06T05:23:31", "name": "board: atmel: Add new board SAMA5D27-SOM1-EK board.", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/1695/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/810400/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/810400/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xnBzN3F6Pz9t2R\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 6 Sep 2017 15:32:00 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 30E2EC21F89; Wed, 6 Sep 2017 05:29:34 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 46E8AC21E66;\n\tWed, 6 Sep 2017 05:29:28 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid D2A6DC21E66; Wed, 6 Sep 2017 05:26:09 +0000 (UTC)", "from eusmtp01.atmel.com (eusmtp01.atmel.com [212.144.249.243])\n\tby lists.denx.de (Postfix) with ESMTPS id DC8D0C21DC5\n\tfor <u-boot@lists.denx.de>; Wed, 6 Sep 2017 05:26:05 +0000 (UTC)", "from apsmtp01.atmel.com (10.168.254.31) by eusmtp01.atmel.com\n\t(10.145.145.31) with Microsoft SMTP Server id 14.3.235.1;\n\tWed, 6 Sep 2017 07:25:24 +0200", "from shaarm01.corp.atmel.com (10.168.254.13) by apsmtp01.atmel.com\n\t(10.168.254.31) with Microsoft SMTP Server id 14.3.235.1;\n\tWed, 6 Sep 2017 13:29:42 +0800" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.3 required=5.0 tests=RCVD_IN_DNSWL_MED\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "From": "Wenyou Yang <wenyou.yang@microchip.com>", "To": "U-Boot Mailing List <u-boot@lists.denx.de>", "Date": "Wed, 6 Sep 2017 13:23:43 +0800", "Message-ID": "<20170906052343.17989-13-wenyou.yang@microchip.com>", "X-Mailer": "git-send-email 2.13.0", "In-Reply-To": "<20170906052343.17989-1-wenyou.yang@microchip.com>", "References": "<20170906052343.17989-1-wenyou.yang@microchip.com>", "MIME-Version": "1.0", "Cc": "Marek Vasut <marex@denx.de>, Tom Rini <trini@konsulko.com>", "Subject": "[U-Boot] [PATCH v4 12/12] board: atmel: Add SAMA5D27 SOM1 EK board", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Wenyou Yang <wenyou.yang@atmel.com>\n\nThe SAMA5D27-SiP (System in Package) integrates the SAMA5D2\nwith 1Gbit DDR2-SDRAM in a single package.\n\nThe SAMA5D27 SOM1 embeds a 64Mbit QSPI flash, KSZ8081 Phy and\nMac-address EEPROM.\n\nSigned-off-by: Wenyou Yang <wenyou.yang@microchip.com>\n---\n\nChanges in v4:\n - Rebase the uboot/master (84a4206).\n - Remove the default config file for the spiflash.\n - Integrate the following patches into this patch series.\n 1./ [PATCH v2 0/3] board: atmel: Set the ethernet mac address from eeprom\n 2./ [PATCH 1/7] lib: at91: Add logo files used by API from DM_VIDEO\n 3./ [PATCH 2/7] atmel: common: Add function to display via DM_VIDEO's API\n 4./ [PATCH] board: sama5d2_xplained: Make SPL work on spiflash\n - Remove the dependency on [PATCH 0/5] configs: at91: Remove value of CONFIG_SYS_EXTRA_OPTIONS option.\n\nChanges in v3:\n - Rebase on the PATCH: Atmel PIT timer driver and Remove CONFIG_SYS_EXTRA_OPTIONS.\n - Use the new Atmel PIT timer driver.\n - Remove \"SAMA5D2\" from CONFIG_SYS_EXTRA_OPTIONS options.\n - Move CONFIG_ENV_IS_IN_FAT to Kconfig.\n\nChanges in v2:\n - Add the reviewed-by tag.\n - Add the help in Kconfig to describe the board and peripherals.\n - Add the code to display the company's logo and board information.\n - Replace the code to set the ethernet mac address with the common\n code from the board/atmel/common folder.\n\n arch/arm/dts/Makefile | 3 +\n arch/arm/dts/at91-sama5d27_som1_ek.dts | 215 ++++++++++++++++++++++++\n arch/arm/dts/sama5d2.dtsi | 20 +++\n arch/arm/dts/sama5d27_som1.dtsi | 159 ++++++++++++++++++\n arch/arm/mach-at91/Kconfig | 14 ++\n board/atmel/sama5d27_som1_ek/Kconfig | 15 ++\n board/atmel/sama5d27_som1_ek/MAINTAINERS | 6 +\n board/atmel/sama5d27_som1_ek/Makefile | 8 +\n board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c | 189 +++++++++++++++++++++\n configs/sama5d27_som1_ek_mmc_defconfig | 88 ++++++++++\n include/configs/sama5d27_som1_ek.h | 92 ++++++++++\n 11 files changed, 809 insertions(+)\n create mode 100644 arch/arm/dts/at91-sama5d27_som1_ek.dts\n create mode 100644 arch/arm/dts/sama5d27_som1.dtsi\n create mode 100644 board/atmel/sama5d27_som1_ek/Kconfig\n create mode 100644 board/atmel/sama5d27_som1_ek/MAINTAINERS\n create mode 100644 board/atmel/sama5d27_som1_ek/Makefile\n create mode 100644 board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c\n create mode 100644 configs/sama5d27_som1_ek_mmc_defconfig\n create mode 100644 include/configs/sama5d27_som1_ek.h", "diff": "diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile\nindex 762429c463..d6afbd1b77 100644\n--- a/arch/arm/dts/Makefile\n+++ b/arch/arm/dts/Makefile\n@@ -417,6 +417,9 @@ dtb-$(CONFIG_TARGET_OMAP3_LOGIC) += \\\n dtb-$(CONFIG_TARGET_SAMA5D2_XPLAINED) += \\\n \tat91-sama5d2_xplained.dtb\n \n+dtb-$(CONFIG_TARGET_SAMA5D27_SOM1_EK) += \\\n+\tat91-sama5d27_som1_ek.dtb\n+\n dtb-$(CONFIG_TARGET_SAMA5D3XEK) += \\\n \tsama5d31ek.dtb \\\n \tsama5d33ek.dtb \\\ndiff --git a/arch/arm/dts/at91-sama5d27_som1_ek.dts b/arch/arm/dts/at91-sama5d27_som1_ek.dts\nnew file mode 100644\nindex 0000000000..5e62d4af71\n--- /dev/null\n+++ b/arch/arm/dts/at91-sama5d27_som1_ek.dts\n@@ -0,0 +1,215 @@\n+/*\n+ * at91-sama5d27_som1_ek.dts - Device Tree file for SAMA5D27 SOM1 EK board\n+ *\n+ * Copyright (C) 2017 Microchip Corporation\n+ * Wenyou Yang <wenyou.yang@microchip.com>\n+ *\n+ * This file is dual-licensed: you can use it either under the terms\n+ * of the GPL or the X11 license, at your option. Note that this dual\n+ * licensing only applies to this file, and not this project as a\n+ * whole.\n+ *\n+ * a) This file is free software; you can redistribute it and/or\n+ * modify it under the terms of the GNU General Public License as\n+ * published by the Free Software Foundation; either version 2 of the\n+ * License, or (at your option) any later version.\n+ *\n+ * This file is distributed in the hope that it will be useful,\n+ * but WITHOUT ANY WARRANTY; without even the implied warranty of\n+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n+ * GNU General Public License for more details.\n+ *\n+ * Or, alternatively,\n+ *\n+ * b) Permission is hereby granted, free of charge, to any person\n+ * obtaining a copy of this software and associated documentation\n+ * files (the \"Software\"), to deal in the Software without\n+ * restriction, including without limitation the rights to use,\n+ * copy, modify, merge, publish, distribute, sublicense, and/or\n+ * sell copies of the Software, and to permit persons to whom the\n+ * Software is furnished to do so, subject to the following\n+ * conditions:\n+ *\n+ * The above copyright notice and this permission notice shall be\n+ * included in all copies or substantial portions of the Software.\n+ *\n+ * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND,\n+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES\n+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND\n+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT\n+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,\n+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING\n+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR\n+ * OTHER DEALINGS IN THE SOFTWARE.\n+ */\n+/dts-v1/;\n+#include \"sama5d27_som1.dtsi\"\n+\n+/ {\n+\tmodel = \"Atmel SAMA5D27 SOM1 EK\";\n+\tcompatible = \"atmel,sama5d27-som1-ek\", \"atmel,sama5d2\", \"atmel,sama5\";\n+\n+\tchosen {\n+\t\tu-boot,dm-pre-reloc;\n+\t\tstdout-path = &uart1;\n+\t};\n+\n+\tahb {\n+\t\tusb1: ohci@00400000 {\n+\t\t\tnum-ports = <3>;\n+\t\t\tatmel,vbus-gpio = <&pioA 42 0>;\n+\t\t\tpinctrl-names = \"default\";\n+\t\t\tpinctrl-0 = <&pinctrl_usb_default>;\n+\t\t\tstatus = \"okay\";\n+\t\t};\n+\n+\t\tusb2: ehci@00500000 {\n+\t\t\tstatus = \"okay\";\n+\t\t};\n+\n+\t\tsdmmc0: sdio-host@a0000000 {\n+\t\t\tbus-width = <8>;\n+\t\t\tpinctrl-names = \"default\";\n+\t\t\tpinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;\n+\t\t\tstatus = \"okay\";\n+\t\t\tu-boot,dm-pre-reloc;\n+\t\t};\n+\n+\t\tsdmmc1: sdio-host@b0000000 {\n+\t\t\tbus-width = <4>;\n+\t\t\tpinctrl-names = \"default\";\n+\t\t\tpinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>;\n+\t\t\tstatus = \"okay\"; /* conflict with qspi0 */\n+\t\t\tu-boot,dm-pre-reloc;\n+\t\t};\n+\n+\t\tapb {\n+\t\t\thlcdc: hlcdc@f0000000 {\n+\t\t\t\tatmel,vl-bpix = <4>;\n+\t\t\t\tatmel,guard-time = <1>;\n+\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\tpinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>;\n+\t\t\t\tstatus = \"okay\";\n+\t\t\t\tu-boot,dm-pre-reloc;\n+\n+\t\t\t\tdisplay-timings {\n+\t\t\t\t\tu-boot,dm-pre-reloc;\n+\t\t\t\t\t480x272 {\n+\t\t\t\t\t\tclock-frequency = <9000000>;\n+\t\t\t\t\t\thactive = <480>;\n+\t\t\t\t\t\tvactive = <272>;\n+\t\t\t\t\t\thsync-len = <41>;\n+\t\t\t\t\t\thfront-porch = <2>;\n+\t\t\t\t\t\thback-porch = <2>;\n+\t\t\t\t\t\tvfront-porch = <2>;\n+\t\t\t\t\t\tvback-porch = <2>;\n+\t\t\t\t\t\tvsync-len = <11>;\n+\t\t\t\t\t\tu-boot,dm-pre-reloc;\n+\t\t\t\t\t};\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tuart1: serial@f8020000 {\n+\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\tpinctrl-0 = <&pinctrl_uart1_default>;\n+\t\t\t\tstatus = \"okay\";\n+\t\t\t\tu-boot,dm-pre-reloc;\n+\t\t\t};\n+\n+\t\t\tpioA: gpio@fc038000 {\n+\t\t\t\tpinctrl {\n+\t\t\t\t\tpinctrl_lcd_base: pinctrl_lcd_base {\n+\t\t\t\t\t\tpinmux = <PIN_PC5__LCDVSYNC>,\n+\t\t\t\t\t\t\t <PIN_PC6__LCDHSYNC>,\n+\t\t\t\t\t\t\t <PIN_PC8__LCDDEN>,\n+\t\t\t\t\t\t\t <PIN_PC7__LCDPCK>;\n+\t\t\t\t\t\tbias-disable;\n+\t\t\t\t\t};\n+\n+\t\t\t\t\tpinctrl_lcd_pwm: pinctrl_lcd_pwm {\n+\t\t\t\t\t\tpinmux = <PIN_PC3__LCDPWM>;\n+\t\t\t\t\t\tbias-disable;\n+\t\t\t\t\t};\n+\n+\t\t\t\t\tpinctrl_lcd_rgb666: pinctrl_lcd_rgb666 {\n+\t\t\t\t\t\tpinmux = <PIN_PB13__LCDDAT2>,\n+\t\t\t\t\t\t\t <PIN_PB14__LCDDAT3>,\n+\t\t\t\t\t\t\t <PIN_PB15__LCDDAT4>,\n+\t\t\t\t\t\t\t <PIN_PB16__LCDDAT5>,\n+\t\t\t\t\t\t\t <PIN_PB17__LCDDAT6>,\n+\t\t\t\t\t\t\t <PIN_PB18__LCDDAT7>,\n+\t\t\t\t\t\t\t <PIN_PB21__LCDDAT10>,\n+\t\t\t\t\t\t\t <PIN_PB22__LCDDAT11>,\n+\t\t\t\t\t\t\t <PIN_PB23__LCDDAT12>,\n+\t\t\t\t\t\t\t <PIN_PB24__LCDDAT13>,\n+\t\t\t\t\t\t\t <PIN_PB25__LCDDAT14>,\n+\t\t\t\t\t\t\t <PIN_PB26__LCDDAT15>,\n+\t\t\t\t\t\t\t <PIN_PB29__LCDDAT18>,\n+\t\t\t\t\t\t\t <PIN_PB30__LCDDAT19>,\n+\t\t\t\t\t\t\t <PIN_PB31__LCDDAT20>,\n+\t\t\t\t\t\t\t <PIN_PC0__LCDDAT21>,\n+\t\t\t\t\t\t\t <PIN_PC1__LCDDAT22>,\n+\t\t\t\t\t\t\t <PIN_PC2__LCDDAT23>;\n+\t\t\t\t\t\tbias-disable;\n+\t\t\t\t\t};\n+\n+\t\t\t\t\tpinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {\n+\t\t\t\t\t\tpinmux = <PIN_PA1__SDMMC0_CMD>,\n+\t\t\t\t\t\t\t <PIN_PA2__SDMMC0_DAT0>,\n+\t\t\t\t\t\t\t <PIN_PA3__SDMMC0_DAT1>,\n+\t\t\t\t\t\t\t <PIN_PA4__SDMMC0_DAT2>,\n+\t\t\t\t\t\t\t <PIN_PA5__SDMMC0_DAT3>,\n+\t\t\t\t\t\t\t <PIN_PA6__SDMMC0_DAT4>,\n+\t\t\t\t\t\t\t <PIN_PA7__SDMMC0_DAT5>,\n+\t\t\t\t\t\t\t <PIN_PA8__SDMMC0_DAT6>,\n+\t\t\t\t\t\t\t <PIN_PA9__SDMMC0_DAT7>;\n+\t\t\t\t\t\tbias-pull-up;\n+\t\t\t\t\t\tu-boot,dm-pre-reloc;\n+\t\t\t\t\t};\n+\n+\t\t\t\t\tpinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {\n+\t\t\t\t\t\tpinmux = <PIN_PA0__SDMMC0_CK>,\n+\t\t\t\t\t\t\t <PIN_PA10__SDMMC0_RSTN>,\n+\t\t\t\t\t\t\t <PIN_PA13__SDMMC0_CD>;\n+\t\t\t\t\t\tbias-disable;\n+\t\t\t\t\t\tu-boot,dm-pre-reloc;\n+\t\t\t\t\t};\n+\n+\t\t\t\t\tpinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default {\n+\t\t\t\t\t\tpinmux = <PIN_PA28__SDMMC1_CMD>,\n+\t\t\t\t\t\t\t <PIN_PA18__SDMMC1_DAT0>,\n+\t\t\t\t\t\t\t <PIN_PA19__SDMMC1_DAT1>,\n+\t\t\t\t\t\t\t <PIN_PA20__SDMMC1_DAT2>,\n+\t\t\t\t\t\t\t <PIN_PA21__SDMMC1_DAT3>;\n+\t\t\t\t\t\tbias-pull-up;\n+\t\t\t\t\t\tu-boot,dm-pre-reloc;\n+\t\t\t\t\t};\n+\n+\t\t\t\t\tpinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default {\n+\t\t\t\t\t\tpinmux = <PIN_PA22__SDMMC1_CK>,\n+\t\t\t\t\t\t\t <PIN_PA30__SDMMC1_CD>;\n+\t\t\t\t\t\tbias-disable;\n+\t\t\t\t\t\tu-boot,dm-pre-reloc;\n+\t\t\t\t\t};\n+\n+\t\t\t\t\tpinctrl_uart1_default: uart1_default {\n+\t\t\t\t\t\tpinmux = <PIN_PD2__URXD1>,\n+\t\t\t\t\t\t\t <PIN_PD3__UTXD1>;\n+\t\t\t\t\t\tbias-disable;\n+\t\t\t\t\t\tu-boot,dm-pre-reloc;\n+\t\t\t\t\t};\n+\n+\t\t\t\t\tpinctrl_usb_default: usb_default {\n+\t\t\t\t\t\tpinmux = <PIN_PB10__GPIO>;\n+\t\t\t\t\t\tbias-disable;\n+\t\t\t\t\t};\n+\n+\t\t\t\t\tpinctrl_usba_vbus: usba_vbus {\n+\t\t\t\t\t\tpinmux = <PIN_PA31__GPIO>;\n+\t\t\t\t\t\tbias-disable;\n+\t\t\t\t\t};\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n+\t};\n+};\ndiff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi\nindex d8a65145d6..2bcf1a1f7c 100644\n--- a/arch/arm/dts/sama5d2.dtsi\n+++ b/arch/arm/dts/sama5d2.dtsi\n@@ -504,11 +504,13 @@\n \t\t\t\t\tqspi0_clk: qspi0_clk@52 {\n \t\t\t\t\t\t#clock-cells = <0>;\n \t\t\t\t\t\treg = <52>;\n+\t\t\t\t\t\tu-boot,dm-pre-reloc;\n \t\t\t\t\t};\n \n \t\t\t\t\tqspi1_clk: qspi1_clk@53 {\n \t\t\t\t\t\t#clock-cells = <0>;\n \t\t\t\t\t\treg = <53>;\n+\t\t\t\t\t\tu-boot,dm-pre-reloc;\n \t\t\t\t\t};\n \t\t\t\t};\n \n@@ -595,6 +597,16 @@\n \t\t\t\tstatus = \"disabled\";\n \t\t\t};\n \n+\t\t\tqspi1: spi@f0024000 {\n+\t\t\t\tcompatible = \"atmel,sama5d2-qspi\";\n+\t\t\t\treg = <0xf0024000 0x100>, <0xd8000000 0x08000000>;\n+\t\t\t\treg-names = \"qspi_base\", \"qspi_mmap\";\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <0>;\n+\t\t\t\tclocks = <&qspi1_clk>;\n+\t\t\t\tstatus = \"disabled\";\n+\t\t\t};\n+\n \t\t\tspi0: spi@f8000000 {\n \t\t\t\tcompatible = \"atmel,at91rm9200-spi\";\n \t\t\t\treg = <0xf8000000 0x100>;\n@@ -694,6 +706,14 @@\n \t\t\t\tstatus = \"disabled\";\n \t\t\t};\n \n+\t\t\tuart3: serial@fc008000 {\n+\t\t\t\tcompatible = \"atmel,at91sam9260-usart\";\n+\t\t\t\treg = <0xfc008000 0x100>;\n+\t\t\t\tclocks = <&uart3_clk>;\n+\t\t\t\tclock-names = \"usart\";\n+\t\t\t\tstatus = \"disabled\";\n+\t\t\t};\n+\n \t\t\ti2c1: i2c@fc028000 {\n \t\t\t\tcompatible = \"atmel,sama5d2-i2c\";\n \t\t\t\treg = <0xfc028000 0x100>;\ndiff --git a/arch/arm/dts/sama5d27_som1.dtsi b/arch/arm/dts/sama5d27_som1.dtsi\nnew file mode 100644\nindex 0000000000..0c44a97f64\n--- /dev/null\n+++ b/arch/arm/dts/sama5d27_som1.dtsi\n@@ -0,0 +1,159 @@\n+/*\n+ * sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SOM1\n+ *\n+ * Copyright (C) 2017 Microchip Corporation\n+ * Wenyou Yang <wenyou.yang@microchip.com>\n+ *\n+ * This file is dual-licensed: you can use it either under the terms\n+ * of the GPL or the X11 license, at your option. Note that this dual\n+ * licensing only applies to this file, and not this project as a\n+ * whole.\n+ *\n+ * a) This file is free software; you can redistribute it and/or\n+ * modify it under the terms of the GNU General Public License as\n+ * published by the Free Software Foundation; either version 2 of the\n+ * License, or (at your option) any later version.\n+ *\n+ * This file is distributed in the hope that it will be useful,\n+ * but WITHOUT ANY WARRANTY; without even the implied warranty of\n+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n+ * GNU General Public License for more details.\n+ *\n+ * Or, alternatively,\n+ *\n+ * b) Permission is hereby granted, free of charge, to any person\n+ * obtaining a copy of this software and associated documentation\n+ * files (the \"Software\"), to deal in the Software without\n+ * restriction, including without limitation the rights to use,\n+ * copy, modify, merge, publish, distribute, sublicense, and/or\n+ * sell copies of the Software, and to permit persons to whom the\n+ * Software is furnished to do so, subject to the following\n+ * conditions:\n+ *\n+ * The above copyright notice and this permission notice shall be\n+ * included in all copies or substantial portions of the Software.\n+ *\n+ * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND,\n+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES\n+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND\n+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT\n+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,\n+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING\n+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR\n+ * OTHER DEALINGS IN THE SOFTWARE.\n+ */\n+\n+#include \"sama5d2.dtsi\"\n+#include \"sama5d2-pinfunc.h\"\n+/ {\n+\tmodel = \"Atmel SAMA5D27 SOM1 EK\";\n+\tcompatible = \"atmel,sama5d27-som1-ek\", \"atmel,sama5d2\", \"atmel,sama5\";\n+\n+\tmemory {\n+\t\treg = <0x20000000 0x8000000>;\n+\t};\n+\n+\taliases {\n+\t\tspi0 = &qspi1;\n+\t\tu-boot,dm-pre-reloc;\n+\t};\n+\n+\tahb {\n+\t\tapb {\n+\t\t\tqspi1: spi@f0024000 {\n+\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\tpinctrl-0 = <&pinctrl_qspi1_sck_cs_default &pinctrl_qspi1_dat_default>;\n+\t\t\t\tstatus = \"okay\";\n+\t\t\t\tu-boot,dm-pre-reloc;\n+\n+\t\t\t\tspi_flash@0 {\n+\t\t\t\t\tcompatible = \"spi-flash\";\n+\t\t\t\t\treg = <0>;\n+\t\t\t\t\tspi-max-frequency = <50000000>;\n+\t\t\t\t\tspi-rx-bus-width = <4>;\n+\t\t\t\t\tspi-tx-bus-width = <4>;\n+\t\t\t\t\tu-boot,dm-pre-reloc;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tmacb0: ethernet@f8008000 {\n+\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\tpinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;\n+\t\t\t\tphy-mode = \"rmii\";\n+\t\t\t\tstatus = \"okay\";\n+\n+\t\t\t\tethernet-phy@1 {\n+\t\t\t\t\treg = <0x1>;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\ti2c0: i2c@f8028000 {\n+\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\tpinctrl-0 = <&pinctrl_i2c0_default>;\n+\t\t\t\tstatus = \"okay\";\n+\n+\t\t\t\ti2c_eeprom: i2c_eeprom@50 {\n+\t\t\t\t\tcompatible = \"microchip,24aa02e48\";\n+\t\t\t\t\treg = <0x50>;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\ti2c1: i2c@fc028000 {\n+\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\tpinctrl-0 = <&pinctrl_i2c1_default>;\n+\t\t\t\tstatus = \"okay\";\n+\t\t\t};\n+\n+\t\t\tpioA: gpio@fc038000 {\n+\t\t\t\tpinctrl {\n+\t\t\t\t\tpinctrl_i2c0_default: i2c0_default {\n+\t\t\t\t\t\tpinmux = <PIN_PD21__TWD0>,\n+\t\t\t\t\t\t\t <PIN_PD22__TWCK0>;\n+\t\t\t\t\t\tbias-disable;\n+\t\t\t\t\t};\n+\n+\t\t\t\t\tpinctrl_i2c1_default: i2c1_default {\n+\t\t\t\t\t\tpinmux = <PIN_PD4__TWD1>,\n+\t\t\t\t\t\t\t <PIN_PD5__TWCK1>;\n+\t\t\t\t\t\tbias-disable;\n+\t\t\t\t\t};\n+\n+\t\t\t\t\tpinctrl_macb0_phy_irq: macb0_phy_irq {\n+\t\t\t\t\t\tpinmux = <PIN_PD31__GPIO>;\n+\t\t\t\t\t\tbias-disable;\n+\t\t\t\t\t};\n+\n+\t\t\t\t\tpinctrl_macb0_rmii: macb0_rmii {\n+\t\t\t\t\t\tpinmux = <PIN_PD9__GTXCK>,\n+\t\t\t\t\t\t\t <PIN_PD10__GTXEN>,\n+\t\t\t\t\t\t\t <PIN_PD11__GRXDV>,\n+\t\t\t\t\t\t\t <PIN_PD12__GRXER>,\n+\t\t\t\t\t\t\t <PIN_PD13__GRX0>,\n+\t\t\t\t\t\t\t <PIN_PD14__GRX1>,\n+\t\t\t\t\t\t\t <PIN_PD15__GTX0>,\n+\t\t\t\t\t\t\t <PIN_PD16__GTX1>,\n+\t\t\t\t\t\t\t <PIN_PD17__GMDC>,\n+\t\t\t\t\t\t\t <PIN_PD18__GMDIO>;\n+\t\t\t\t\t\tbias-disable;\n+\t\t\t\t\t};\n+\n+\t\t\t\t\tpinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default {\n+\t\t\t\t\t\tpinmux = <PIN_PB5__QSPI1_SCK>,\n+\t\t\t\t\t\t\t <PIN_PB6__QSPI1_CS>;\n+\t\t\t\t\t\tbias-disable;\n+\t\t\t\t\t\tu-boot,dm-pre-reloc;\n+\t\t\t\t\t};\n+\n+\t\t\t\t\tpinctrl_qspi1_dat_default: qspi1_dat_default {\n+\t\t\t\t\t\tpinmux = <PIN_PB7__QSPI1_IO0>,\n+\t\t\t\t\t\t\t <PIN_PB8__QSPI1_IO1>,\n+\t\t\t\t\t\t\t <PIN_PB9__QSPI1_IO2>,\n+\t\t\t\t\t\t\t <PIN_PB10__QSPI1_IO3>;\n+\t\t\t\t\t\tbias-pull-up;\n+\t\t\t\t\t\tu-boot,dm-pre-reloc;\n+\t\t\t\t\t};\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n+\t};\n+};\ndiff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig\nindex 20f7eeaf09..a70b956fbc 100644\n--- a/arch/arm/mach-at91/Kconfig\n+++ b/arch/arm/mach-at91/Kconfig\n@@ -99,6 +99,19 @@ config TARGET_SAMA5D2_XPLAINED\n \tselect SUPPORT_SPL\n \tselect BOARD_EARLY_INIT_F\n \n+config TARGET_SAMA5D27_SOM1_EK\n+\tbool \"SAMA5D27 SOM1 EK board\"\n+\tselect CPU_V7\n+\tselect SUPPORT_SPL\n+\tselect BOARD_EARLY_INIT_F\n+\tselect BOARD_LATE_INIT\n+\thelp\n+\t The SAMA5D27 SOM1 embeds SAMA5D2 SiP(System in Package),\n+\t a 64Mbit QSPI flash, KSZ8081 Phy and a Mac-address EEPROM\n+\t 24AA02E48. The SAMA5D2 SiP integrates the ARM Cortex-A5\n+\t processor-based SAMA5D2 MPU with up to 1 Gbit DDR2-SDRAM\n+\t in a single package.\n+\n config TARGET_SAMA5D3_XPLAINED\n \tbool \"SAMA5D3 Xplained board\"\n \tselect CPU_V7\n@@ -181,6 +194,7 @@ source \"board/atmel/at91sam9rlek/Kconfig\"\n source \"board/atmel/at91sam9x5ek/Kconfig\"\n source \"board/atmel/sama5d2_ptc/Kconfig\"\n source \"board/atmel/sama5d2_xplained/Kconfig\"\n+source \"board/atmel/sama5d27_som1_ek/Kconfig\"\n source \"board/atmel/sama5d3_xplained/Kconfig\"\n source \"board/atmel/sama5d3xek/Kconfig\"\n source \"board/atmel/sama5d4_xplained/Kconfig\"\ndiff --git a/board/atmel/sama5d27_som1_ek/Kconfig b/board/atmel/sama5d27_som1_ek/Kconfig\nnew file mode 100644\nindex 0000000000..3276214d8c\n--- /dev/null\n+++ b/board/atmel/sama5d27_som1_ek/Kconfig\n@@ -0,0 +1,15 @@\n+if TARGET_SAMA5D27_SOM1_EK\n+\n+config SYS_BOARD\n+\tdefault \"sama5d27_som1_ek\"\n+\n+config SYS_VENDOR\n+\tdefault \"atmel\"\n+\n+config SYS_SOC\n+\tdefault \"at91\"\n+\n+config SYS_CONFIG_NAME\n+\tdefault \"sama5d27_som1_ek\"\n+\n+endif\ndiff --git a/board/atmel/sama5d27_som1_ek/MAINTAINERS b/board/atmel/sama5d27_som1_ek/MAINTAINERS\nnew file mode 100644\nindex 0000000000..609583c341\n--- /dev/null\n+++ b/board/atmel/sama5d27_som1_ek/MAINTAINERS\n@@ -0,0 +1,6 @@\n+SAMA5D27 SOM1 EK BOARD\n+M:\tWenyou Yang <wenyou.yang@microchip.com>\n+S:\tMaintained\n+F:\tboard/atmel/sama5d27_som1_ek/\n+F:\tinclude/configs/sama5d27_som1_ek.h\n+F:\tconfigs/sama5d27_som1_ek_mmc_defconfig\ndiff --git a/board/atmel/sama5d27_som1_ek/Makefile b/board/atmel/sama5d27_som1_ek/Makefile\nnew file mode 100644\nindex 0000000000..4ab242c4ac\n--- /dev/null\n+++ b/board/atmel/sama5d27_som1_ek/Makefile\n@@ -0,0 +1,8 @@\n+#\n+# Copyright (C) 2017 Microchip Corporation\n+#\t\t Wenyou Yang <wenyou.yang@microchip.com>\n+#\n+# SPDX-License-Identifier:\tGPL-2.0+\n+#\n+\n+obj-y += sama5d27_som1_ek.o\ndiff --git a/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c\nnew file mode 100644\nindex 0000000000..80d772518d\n--- /dev/null\n+++ b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c\n@@ -0,0 +1,189 @@\n+/*\n+ * Copyright (C) 2017 Microchip Corporation\n+ *\t\t Wenyou.Yang <wenyou.yang@microchip.com>\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#include <common.h>\n+#include <debug_uart.h>\n+#include <asm/io.h>\n+#include <asm/arch/at91_common.h>\n+#include <asm/arch/atmel_pio4.h>\n+#include <asm/arch/atmel_mpddrc.h>\n+#include <asm/arch/atmel_sdhci.h>\n+#include <asm/arch/clk.h>\n+#include <asm/arch/gpio.h>\n+#include <asm/arch/sama5d2.h>\n+\n+DECLARE_GLOBAL_DATA_PTR;\n+\n+static void board_usb_hw_init(void)\n+{\n+\tatmel_pio4_set_pio_output(AT91_PIO_PORTB, 10, 1);\n+}\n+\n+#ifdef CONFIG_BOARD_LATE_INIT\n+int board_late_init(void)\n+{\n+#ifdef CONFIG_DM_VIDEO\n+\tat91_video_show_board_info();\n+#endif\n+\treturn 0;\n+}\n+#endif\n+\n+#ifdef CONFIG_DEBUG_UART_BOARD_INIT\n+static void board_uart1_hw_init(void)\n+{\n+\tatmel_pio4_set_a_periph(AT91_PIO_PORTD, 2, 1);\t/* URXD1 */\n+\tatmel_pio4_set_a_periph(AT91_PIO_PORTD, 3, 0);\t/* UTXD1 */\n+\n+\tat91_periph_clk_enable(ATMEL_ID_UART1);\n+}\n+\n+void board_debug_uart_init(void)\n+{\n+\tboard_uart1_hw_init();\n+}\n+#endif\n+\n+#ifdef CONFIG_BOARD_EARLY_INIT_F\n+int board_early_init_f(void)\n+{\n+#ifdef CONFIG_DEBUG_UART\n+\tdebug_uart_init();\n+#endif\n+\n+\treturn 0;\n+}\n+#endif\n+\n+int board_init(void)\n+{\n+\t/* address of boot parameters */\n+\tgd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;\n+\n+#ifdef CONFIG_CMD_USB\n+\tboard_usb_hw_init();\n+#endif\n+\n+\treturn 0;\n+}\n+\n+int dram_init(void)\n+{\n+\tgd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,\n+\t\t\t\t CONFIG_SYS_SDRAM_SIZE);\n+\treturn 0;\n+}\n+\n+#define MAC24AA_MAC_OFFSET\t0xfa\n+\n+#ifdef CONFIG_MISC_INIT_R\n+int misc_init_r(void)\n+{\n+#ifdef CONFIG_I2C_EEPROM\n+\tat91_set_ethaddr(MAC24AA_MAC_OFFSET);\n+#endif\n+\treturn 0;\n+}\n+#endif\n+\n+/* SPL */\n+#ifdef CONFIG_SPL_BUILD\n+void spl_board_init(void)\n+{\n+}\n+\n+static void ddrc_conf(struct atmel_mpddrc_config *ddrc)\n+{\n+\tddrc->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);\n+\n+\tddrc->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |\n+\t\t ATMEL_MPDDRC_CR_NR_ROW_13 |\n+\t\t ATMEL_MPDDRC_CR_CAS_DDR_CAS3 |\n+\t\t ATMEL_MPDDRC_CR_DIC_DS |\n+\t\t ATMEL_MPDDRC_CR_ZQ_LONG |\n+\t\t ATMEL_MPDDRC_CR_NB_8BANKS |\n+\t\t ATMEL_MPDDRC_CR_DECOD_INTERLEAVED |\n+\t\t ATMEL_MPDDRC_CR_UNAL_SUPPORTED);\n+\n+\tddrc->rtr = 0x511;\n+\n+\tddrc->tpr0 = ((7 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET) |\n+\t\t (3 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET) |\n+\t\t (3 << ATMEL_MPDDRC_TPR0_TWR_OFFSET) |\n+\t\t (9 << ATMEL_MPDDRC_TPR0_TRC_OFFSET) |\n+\t\t (3 << ATMEL_MPDDRC_TPR0_TRP_OFFSET) |\n+\t\t (4 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET) |\n+\t\t (4 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET) |\n+\t\t (2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET));\n+\n+\tddrc->tpr1 = ((22 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET) |\n+\t\t (23 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET) |\n+\t\t (200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET) |\n+\t\t (3 << ATMEL_MPDDRC_TPR1_TXP_OFFSET));\n+\n+\tddrc->tpr2 = ((2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET) |\n+\t\t (8 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET) |\n+\t\t (4 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET) |\n+\t\t (4 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET) |\n+\t\t (8 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET));\n+}\n+\n+void mem_init(void)\n+{\n+\tstruct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;\n+\tstruct atmel_mpddr *mpddrc = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC;\n+\tstruct atmel_mpddrc_config ddrc_config;\n+\tu32 reg;\n+\n+\tddrc_conf(&ddrc_config);\n+\n+\tat91_periph_clk_enable(ATMEL_ID_MPDDRC);\n+\twritel(AT91_PMC_DDR, &pmc->scer);\n+\n+\treg = readl(&mpddrc->io_calibr);\n+\treg &= ~ATMEL_MPDDRC_IO_CALIBR_RDIV;\n+\treg |= ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_55;\n+\treg &= ~ATMEL_MPDDRC_IO_CALIBR_TZQIO;\n+\treg |= ATMEL_MPDDRC_IO_CALIBR_TZQIO_(101);\n+\twritel(reg, &mpddrc->io_calibr);\n+\n+\twritel(ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_ONE_CYCLE,\n+\t &mpddrc->rd_data_path);\n+\n+\tddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config);\n+\n+\twritel(0x3, &mpddrc->cal_mr4);\n+\twritel(64, &mpddrc->tim_cal);\n+}\n+\n+void at91_pmc_init(void)\n+{\n+\tu32 tmp;\n+\n+\t/*\n+\t * while coming from the ROM code, we run on PLLA @ 492 MHz / 164 MHz\n+\t * so we need to slow down and configure MCKR accordingly.\n+\t * This is why we have a special flavor of the switching function.\n+\t */\n+\ttmp = AT91_PMC_MCKR_PLLADIV_2 |\n+\t AT91_PMC_MCKR_MDIV_3 |\n+\t AT91_PMC_MCKR_CSS_MAIN;\n+\tat91_mck_init_down(tmp);\n+\n+\ttmp = AT91_PMC_PLLAR_29 |\n+\t AT91_PMC_PLLXR_PLLCOUNT(0x3f) |\n+\t AT91_PMC_PLLXR_MUL(40) |\n+\t AT91_PMC_PLLXR_DIV(1);\n+\tat91_plla_init(tmp);\n+\n+\ttmp = AT91_PMC_MCKR_H32MXDIV |\n+\t AT91_PMC_MCKR_PLLADIV_2 |\n+\t AT91_PMC_MCKR_MDIV_3 |\n+\t AT91_PMC_MCKR_CSS_PLLA;\n+\tat91_mck_init(tmp);\n+}\n+#endif\ndiff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig\nnew file mode 100644\nindex 0000000000..18d51131e6\n--- /dev/null\n+++ b/configs/sama5d27_som1_ek_mmc_defconfig\n@@ -0,0 +1,88 @@\n+CONFIG_ARM=y\n+CONFIG_ARCH_AT91=y\n+CONFIG_TARGET_SAMA5D27_SOM1_EK=y\n+CONFIG_SPL_GPIO_SUPPORT=y\n+CONFIG_SPL_LIBCOMMON_SUPPORT=y\n+CONFIG_SPL_LIBGENERIC_SUPPORT=y\n+CONFIG_SYS_MALLOC_F_LEN=0x2000\n+CONFIG_SPL_MMC_SUPPORT=y\n+CONFIG_SPL_SERIAL_SUPPORT=y\n+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y\n+CONFIG_SPL_LIBDISK_SUPPORT=y\n+CONFIG_SPL_FAT_SUPPORT=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"at91-sama5d27_som1_ek\"\n+CONFIG_DEBUG_UART=y\n+CONFIG_FIT=y\n+CONFIG_SYS_EXTRA_OPTIONS=\"SAMA5D2\"\n+CONFIG_SD_BOOT=y\n+CONFIG_BOOTDELAY=3\n+# CONFIG_DISPLAY_BOARDINFO is not set\n+CONFIG_SPL=y\n+CONFIG_SPL_SEPARATE_BSS=y\n+CONFIG_HUSH_PARSER=y\n+CONFIG_CMD_BOOTZ=y\n+# CONFIG_CMD_IMI is not set\n+# CONFIG_CMD_IMLS is not set\n+# CONFIG_CMD_FLASH is not set\n+# CONFIG_CMD_FPGA is not set\n+CONFIG_CMD_I2C=y\n+# CONFIG_CMD_LOADS is not set\n+CONFIG_CMD_MMC=y\n+CONFIG_CMD_SF=y\n+CONFIG_CMD_USB=y\n+CONFIG_CMD_DHCP=y\n+CONFIG_CMD_PING=y\n+CONFIG_CMD_EXT4=y\n+CONFIG_CMD_FAT=y\n+CONFIG_OF_CONTROL=y\n+CONFIG_SPL_OF_CONTROL=y\n+CONFIG_OF_SPL_REMOVE_PROPS=\"interrupts interrupt-parent dmas dma-names\"\n+CONFIG_ENV_IS_IN_FAT=y\n+CONFIG_DM=y\n+CONFIG_SPL_DM=y\n+CONFIG_SPL_DM_SEQ_ALIAS=y\n+CONFIG_CLK=y\n+CONFIG_SPL_CLK=y\n+CONFIG_CLK_AT91=y\n+CONFIG_AT91_UTMI=y\n+CONFIG_AT91_H32MX=y\n+CONFIG_AT91_GENERIC_CLK=y\n+CONFIG_DM_GPIO=y\n+CONFIG_ATMEL_PIO4=y\n+CONFIG_DM_I2C=y\n+CONFIG_SYS_I2C_AT91=y\n+CONFIG_I2C_EEPROM=y\n+CONFIG_DM_MMC=y\n+CONFIG_MMC_SDHCI=y\n+CONFIG_MMC_SDHCI_ATMEL=y\n+CONFIG_DM_SPI_FLASH=y\n+CONFIG_SPI_FLASH=y\n+CONFIG_SPI_FLASH_ATMEL=y\n+CONFIG_SPI_FLASH_MACRONIX=y\n+CONFIG_SPI_FLASH_STMICRO=y\n+CONFIG_SPI_FLASH_SST=y\n+CONFIG_DM_ETH=y\n+CONFIG_MACB=y\n+CONFIG_PINCTRL=y\n+CONFIG_SPL_PINCTRL=y\n+CONFIG_PINCTRL_AT91PIO4=y\n+CONFIG_DM_SERIAL=y\n+CONFIG_DEBUG_UART_ATMEL=y\n+CONFIG_DEBUG_UART_BASE=0xf8020000\n+CONFIG_DEBUG_UART_CLOCK=82000000\n+CONFIG_DEBUG_UART_BOARD_INIT=y\n+CONFIG_DEBUG_UART_ANNOUNCE=y\n+CONFIG_ATMEL_USART=y\n+CONFIG_DM_SPI=y\n+CONFIG_ATMEL_SPI=y\n+CONFIG_TIMER=y\n+CONFIG_SPL_TIMER=y\n+CONFIG_ATMEL_PIT_TIMER=y\n+CONFIG_USB=y\n+CONFIG_DM_USB=y\n+CONFIG_USB_EHCI_HCD=y\n+CONFIG_USB_STORAGE=y\n+CONFIG_USB_GADGET=y\n+CONFIG_USB_GADGET_ATMEL_USBA=y\n+CONFIG_DM_VIDEO=y\n+CONFIG_ATMEL_HLCD=y\ndiff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_som1_ek.h\nnew file mode 100644\nindex 0000000000..fdf19ad680\n--- /dev/null\n+++ b/include/configs/sama5d27_som1_ek.h\n@@ -0,0 +1,92 @@\n+/*\n+ * Configuration file for the SAMA5D27 SOM1 EK Board.\n+ *\n+ * Copyright (C) 2017 Microchip Corporation\n+ *\t\t Wenyou Yang <wenyou.yang@microchip.com>\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#ifndef __CONFIG_H\n+#define __CONFIG_H\n+\n+#include \"at91-sama5_common.h\"\n+\n+#undef CONFIG_SYS_TEXT_BASE\n+#undef CONFIG_SYS_AT91_MAIN_CLOCK\n+#define CONFIG_SYS_TEXT_BASE\t\t0x23f00000\n+#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */\n+\n+#define CONFIG_MISC_INIT_R\n+\n+/* SDRAM */\n+#define CONFIG_NR_DRAM_BANKS\t\t1\n+#define CONFIG_SYS_SDRAM_BASE\t\t0x20000000\n+#define CONFIG_SYS_SDRAM_SIZE\t\t0x8000000\n+\n+#ifdef CONFIG_SPL_BUILD\n+#define CONFIG_SYS_INIT_SP_ADDR\t\t0x218000\n+#else\n+#define CONFIG_SYS_INIT_SP_ADDR \\\n+\t(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)\n+#endif\n+\n+#define CONFIG_SYS_LOAD_ADDR\t\t0x22000000 /* load address */\n+\n+/* NAND flash */\n+#undef CONFIG_CMD_NAND\n+\n+/* SPI flash */\n+#define CONFIG_SF_DEFAULT_SPEED\t\t66000000\n+\n+#undef CONFIG_BOOTCOMMAND\n+#ifdef CONFIG_SD_BOOT\n+/* u-boot env in sd/mmc card */\n+#define FAT_ENV_INTERFACE\t\"mmc\"\n+#define FAT_ENV_DEVICE_AND_PART\t\"0\"\n+#define FAT_ENV_FILE\t\t\"uboot.env\"\n+#define CONFIG_ENV_SIZE\t\t0x4000\n+/* bootstrap + u-boot + env in sd card */\n+#define CONFIG_BOOTCOMMAND\t\"fatload mmc 0:1 0x21000000 at91-sama5d27_som1_ek.dtb; \" \\\n+\t\t\t\t\"fatload mmc 0:1 0x22000000 zImage; \" \\\n+\t\t\t\t\"bootz 0x22000000 - 0x21000000\"\n+#undef CONFIG_BOOTARGS\n+#define CONFIG_BOOTARGS \\\n+\t\"console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait\"\n+#endif\n+\n+#ifdef CONFIG_QSPI_BOOT\n+#define CONFIG_ENV_OFFSET\t\t0xb0000\n+#define CONFIG_ENV_SIZE\t\t\t0x10000\n+#define CONFIG_ENV_SECT_SIZE\t\t0x10000\n+#define CONFIG_BOOTCOMMAND\t\t\"sf probe 0; \"\t\t\t\t\\\n+\t\t\t\t\t\"sf read 0x21000000 0xc0000 0x20000; \"\t\\\n+\t\t\t\t\t\"sf read 0x22000000 0xe0000 0x400000; \"\t\\\n+\t\t\t\t\t\"bootz 0x22000000 - 0x21000000\"\n+#undef CONFIG_BOOTARGS\n+#define CONFIG_BOOTARGS \\\n+\t\"console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait\"\n+#endif\n+\n+/* SPL */\n+#define CONFIG_SPL_FRAMEWORK\n+#define CONFIG_SPL_TEXT_BASE\t\t0x200000\n+#define CONFIG_SPL_MAX_SIZE\t\t0x10000\n+#define CONFIG_SPL_BSS_START_ADDR\t0x20000000\n+#define CONFIG_SPL_BSS_MAX_SIZE\t\t0x80000\n+#define CONFIG_SYS_SPL_MALLOC_START\t0x20080000\n+#define CONFIG_SYS_SPL_MALLOC_SIZE\t0x80000\n+\n+#define CONFIG_SYS_MONITOR_LEN\t\t(512 << 10)\n+\n+#ifdef CONFIG_SD_BOOT\n+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION\t1\n+#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME\t\t\"u-boot.img\"\n+#endif\n+\n+#ifdef CONFIG_QSPI_BOOT\n+#define CONFIG_SPL_SPI_LOAD\n+#define CONFIG_SYS_SPI_U_BOOT_OFFS\t0x10000\n+#endif\n+\n+#endif\n", "prefixes": [ "U-Boot", "v4", "12/12" ] }