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GET /api/patches/810394/?format=api
{ "id": 810394, "url": "http://patchwork.ozlabs.org/api/patches/810394/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20170906052343.17989-8-wenyou.yang@microchip.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170906052343.17989-8-wenyou.yang@microchip.com>", "list_archive_url": null, "date": "2017-09-06T05:23:38", "name": "[U-Boot,v4,07/12] ARM: at91: spl: Add mck function to lower rate while switching", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "87926d2bebf9bba26e4f1735e190ca05b7048f48", "submitter": { "id": 69532, "url": "http://patchwork.ozlabs.org/api/people/69532/?format=api", "name": "Wenyou Yang", "email": "Wenyou.Yang@microchip.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20170906052343.17989-8-wenyou.yang@microchip.com/mbox/", "series": [ { "id": 1695, "url": "http://patchwork.ozlabs.org/api/series/1695/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=1695", "date": "2017-09-06T05:23:31", "name": "board: atmel: Add new board SAMA5D27-SOM1-EK board.", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/1695/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/810394/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/810394/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xnBvm4lNZz9s7C\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 6 Sep 2017 15:28:52 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 671E0C21E28; Wed, 6 Sep 2017 05:26:40 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 92138C21E6E;\n\tWed, 6 Sep 2017 05:26:38 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 03796C21E64; Wed, 6 Sep 2017 05:25:42 +0000 (UTC)", "from eusmtp01.atmel.com (eusmtp01.atmel.com [212.144.249.242])\n\tby lists.denx.de (Postfix) with ESMTPS id 09461C21DBC\n\tfor <u-boot@lists.denx.de>; Wed, 6 Sep 2017 05:25:39 +0000 (UTC)", "from apsmtp01.atmel.com (10.168.254.31) by eusmtp01.atmel.com\n\t(10.145.145.30) with Microsoft SMTP Server id 14.3.235.1;\n\tWed, 6 Sep 2017 07:24:55 +0200", "from shaarm01.corp.atmel.com (10.168.254.13) by apsmtp01.atmel.com\n\t(10.168.254.31) with Microsoft SMTP Server id 14.3.235.1;\n\tWed, 6 Sep 2017 13:29:15 +0800" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.3 required=5.0 tests=RCVD_IN_DNSWL_MED\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "From": "Wenyou Yang <wenyou.yang@microchip.com>", "To": "U-Boot Mailing List <u-boot@lists.denx.de>", "Date": "Wed, 6 Sep 2017 13:23:38 +0800", "Message-ID": "<20170906052343.17989-8-wenyou.yang@microchip.com>", "X-Mailer": "git-send-email 2.13.0", "In-Reply-To": "<20170906052343.17989-1-wenyou.yang@microchip.com>", "References": "<20170906052343.17989-1-wenyou.yang@microchip.com>", "MIME-Version": "1.0", "Cc": "Marek Vasut <marex@denx.de>, Tom Rini <trini@konsulko.com>", "Subject": "[U-Boot] [PATCH v4 07/12] ARM: at91: spl: Add mck function to lower\n\trate while switching", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "Refer to the commit 70f8c8316ad(PMC: add new mck function to lower\nrate while switching) from AT91Bootstrap.\n\nWhile switching to a lower clock source, we must switch the clock\nsource first instead of last. Otherwise, we could end up with\ntoo high frequency on internal bus and peripherals.\nThis happen on SAMA5D2 as we exit from ROM code @396MHz.\n\nAdd a function pmc_mck_init_down() to allow this sequence.\n\nSigned-off-by: Wenyou Yang <wenyou.yang@microchip.com>\n---\n\nChanges in v4: None\nChanges in v3: None\nChanges in v2: None\n\n arch/arm/mach-at91/armv7/clock.c | 36 +++++++++++++++++++++++++++\n arch/arm/mach-at91/include/mach/at91_common.h | 1 +\n 2 files changed, 37 insertions(+)", "diff": "diff --git a/arch/arm/mach-at91/armv7/clock.c b/arch/arm/mach-at91/armv7/clock.c\nindex 2e55953799..8ae01f4020 100644\n--- a/arch/arm/mach-at91/armv7/clock.c\n+++ b/arch/arm/mach-at91/armv7/clock.c\n@@ -150,6 +150,42 @@ void at91_mck_init(u32 mckr)\n \t\t;\n }\n \n+void at91_mck_init_down(u32 mckr)\n+{\n+\tstruct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;\n+\tu32 tmp;\n+\n+\ttmp = readl(&pmc->mckr);\n+\ttmp &= (~AT91_PMC_MCKR_CSS_MASK);\n+\ttmp |= (mckr & AT91_PMC_MCKR_CSS_MASK);\n+\twritel(tmp, &pmc->mckr);\n+\n+\twhile (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))\n+\t\t;\n+\n+#ifdef CPU_HAS_H32MXDIV\n+\ttmp = readl(&pmc->mckr);\n+\ttmp &= (~AT91_PMC_MCKR_H32MXDIV);\n+\ttmp |= (mckr & AT91_PMC_MCKR_H32MXDIV);\n+\twritel(tmp, &pmc->mckr);\n+#endif\n+\n+\ttmp = readl(&pmc->mckr);\n+\ttmp &= (~AT91_PMC_MCKR_PLLADIV_MASK);\n+\ttmp |= (mckr & AT91_PMC_MCKR_PLLADIV_MASK);\n+\twritel(tmp, &pmc->mckr);\n+\n+\ttmp = readl(&pmc->mckr);\n+\ttmp &= (~AT91_PMC_MCKR_MDIV_MASK);\n+\ttmp |= (mckr & AT91_PMC_MCKR_MDIV_MASK);\n+\twritel(tmp, &pmc->mckr);\n+\n+\ttmp = readl(&pmc->mckr);\n+\ttmp &= (~AT91_PMC_MCKR_PRES_MASK);\n+\ttmp |= (mckr & AT91_PMC_MCKR_PRES_MASK);\n+\twritel(tmp, &pmc->mckr);\n+}\n+\n int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div)\n {\n \tstruct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;\ndiff --git a/arch/arm/mach-at91/include/mach/at91_common.h b/arch/arm/mach-at91/include/mach/at91_common.h\nindex 5416eb455d..0b09ce7b2e 100644\n--- a/arch/arm/mach-at91/include/mach/at91_common.h\n+++ b/arch/arm/mach-at91/include/mach/at91_common.h\n@@ -25,6 +25,7 @@ void at91_lcd_hw_init(void);\n void at91_plla_init(u32 pllar);\n void at91_pllb_init(u32 pllar);\n void at91_mck_init(u32 mckr);\n+void at91_mck_init_down(u32 mckr);\n void at91_pmc_init(void);\n void mem_init(void);\n void at91_phy_reset(void);\n", "prefixes": [ "U-Boot", "v4", "07/12" ] }