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GET /api/patches/810370/?format=api
{ "id": 810370, "url": "http://patchwork.ozlabs.org/api/patches/810370/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1504664087-26473-5-git-send-email-kever.yang@rock-chips.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1504664087-26473-5-git-send-email-kever.yang@rock-chips.com>", "list_archive_url": null, "date": "2017-09-06T02:14:31", "name": "[U-Boot,04/10] rockchip: rk322x: enable tpl support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "45a8a72d5b69b49ea29ef66c992938d0ee9a7209", "submitter": { "id": 64532, "url": "http://patchwork.ozlabs.org/api/people/64532/?format=api", "name": "Kever Yang", "email": "kever.yang@rock-chips.com" }, "delegate": { "id": 69486, "url": "http://patchwork.ozlabs.org/api/users/69486/?format=api", "username": "ptomsich", "first_name": "Philipp", "last_name": "Tomsich", "email": "philipp.tomsich@theobroma-systems.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1504664087-26473-5-git-send-email-kever.yang@rock-chips.com/mbox/", "series": [ { "id": 1682, "url": "http://patchwork.ozlabs.org/api/series/1682/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=1682", "date": "2017-09-06T02:14:28", "name": "rockchip: add tpl and OPTEE support for rk3229", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/1682/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/810370/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/810370/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"M+kgKXGk\"; dkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xn6hS3ftBz9sR9\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 6 Sep 2017 12:18:48 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 35279C21EDE; Wed, 6 Sep 2017 02:16:04 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 7F164C21EB4;\n\tWed, 6 Sep 2017 02:15:34 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 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s=20161025;\n\th=x-gm-message-state:sender:from:to:cc:subject:date:message-id\n\t:in-reply-to:references;\n\tbh=NH6ZbhiFm0uOOerw6H7iSdSZjpUnH2lKhfJXbPopdRQ=;\n\tb=Deb43THlQIK1bON3cSb9ZZSwQm+NjF9nFMIyK24dzO1s2J3DQ2LHnv35eFbAUY72rW\n\trHJVO+88gjlFyMsUAmwiOhlOQL8cdMr5B/AuzfI14YyS8Hy1NQ5yCjsoKnAe7UoU0M+O\n\tJBvPg6F1hzKROy2gKqCZMhdkWxjUbTgpzNc0DdFBPBQNB6Ht93owP7yyQJx0HnOHGyMd\n\tdbYGB4d+5f2/+iRcdyiwiq8rtag9FhI3r9eCS2Y36GJbg5IKaJppKYL8wAphJX+4ZQYe\n\tZDv2APTCnI8kn7bVkkM8ooaoBQe1Mecn/bFmVBeVx81PjFYeH9lSEn4UxrmcvuZ3tUzC\n\tD1Kw==", "X-Gm-Message-State": "AHPjjUjLjIsYAyny/Adb/FQrK+vSzbpIdFnv8kHcXEIgTDwgrirceZTH\n\tJKy+GQhWInX9Q2k9", "X-Google-Smtp-Source": "ADKCNb6Q2HZX1/ogotjCWe8xsHYTy1ecQNXW5WqSmk+Xu5ve0WJ3SU4/jLC0uordZr9qW2W4UzgO3g==", "X-Received": "by 10.101.72.199 with SMTP id o7mr6279212pgs.450.1504664120230; \n\tTue, 05 Sep 2017 19:15:20 -0700 (PDT)", "From": "Kever Yang <kever.yang@rock-chips.com>", "To": "u-boot@lists.denx.de", "Date": "Wed, 6 Sep 2017 10:14:31 +0800", "Message-Id": "<1504664087-26473-5-git-send-email-kever.yang@rock-chips.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1504664087-26473-1-git-send-email-kever.yang@rock-chips.com>", "References": "<1504664087-26473-1-git-send-email-kever.yang@rock-chips.com>", "Cc": "Albert Aribaud <albert.u.boot@aribaud.net>, vagrant@debian.org,\n\tJacob Chen <jacob2.chen@rock-chips.com>", "Subject": "[U-Boot] [PATCH 04/10] rockchip: rk322x: enable tpl support", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "Move original spl to tpl, and add spl to load next stage firmware,\nadapt all the address and option for them.\n\nSigned-off-by: Kever Yang <kever.yang@rock-chips.com>\n---\n\n arch/arm/mach-rockchip/Kconfig | 9 ++++\n arch/arm/mach-rockchip/Makefile | 3 +-\n arch/arm/mach-rockchip/rk322x-board-spl.c | 66 ++++++-----------------\n arch/arm/mach-rockchip/rk322x-board-tpl.c | 81 ++++++++++++++++++++++++++++\n arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds | 13 +++++\n include/configs/rk322x_common.h | 12 +++--\n 6 files changed, 128 insertions(+), 56 deletions(-)\n create mode 100644 arch/arm/mach-rockchip/rk322x-board-tpl.c\n create mode 100644 arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds", "diff": "diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig\nindex d9b25d5..e1bc947 100644\n--- a/arch/arm/mach-rockchip/Kconfig\n+++ b/arch/arm/mach-rockchip/Kconfig\n@@ -32,9 +32,18 @@ config ROCKCHIP_RK322X\n \tbool \"Support Rockchip RK3228/RK3229\"\n \tselect CPU_V7\n \tselect SUPPORT_SPL\n+\tselect SUPPORT_TPL\n \tselect SPL\n+\tselect TPL\n+\tselect TPL_NEEDS_SEPARATE_TEXT_BASE if SPL\n+\tselect TPL_NEEDS_SEPARATE_STACK if TPL\n+\tselect SPL_DRIVERS_MISC_SUPPORT\n+\timply SPL_SERIAL_SUPPORT\n+\timply TPL_SERIAL_SUPPORT\n \tselect ROCKCHIP_BROM_HELPER\n \tselect DEBUG_UART_BOARD_INIT\n+\tselect TPL_LIBCOMMON_SUPPORT\n+\tselect TPL_LIBGENERIC_SUPPORT\n \thelp\n \t The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7\n \t including NEON and GPU, Mali-400 graphics, several DDR3 options\ndiff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile\nindex 79e9704..5ef0938 100644\n--- a/arch/arm/mach-rockchip/Makefile\n+++ b/arch/arm/mach-rockchip/Makefile\n@@ -13,10 +13,11 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o\n \n obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o\n obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o\n+obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o\n \n obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o\n obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o\n-obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o\n+obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o spl-boot-order.o\n obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o\n obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o\n obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o\ndiff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c\nindex 4ddb8ba..71e641e 100644\n--- a/arch/arm/mach-rockchip/rk322x-board-spl.c\n+++ b/arch/arm/mach-rockchip/rk322x-board-spl.c\n@@ -5,77 +5,43 @@\n */\n \n #include <common.h>\n-#include <debug_uart.h>\n #include <dm.h>\n-#include <ram.h>\n #include <spl.h>\n-#include <asm/io.h>\n-#include <asm/arch/bootrom.h>\n-#include <asm/arch/cru_rk322x.h>\n-#include <asm/arch/grf_rk322x.h>\n-#include <asm/arch/hardware.h>\n-#include <asm/arch/timer.h>\n-#include <asm/arch/uart.h>\n+\n+DECLARE_GLOBAL_DATA_PTR;\n \n u32 spl_boot_device(void)\n {\n \treturn BOOT_DEVICE_MMC1;\n }\n-DECLARE_GLOBAL_DATA_PTR;\n-\n-#define GRF_BASE\t0x11000000\n-#define SGRF_BASE\t0x10140000\n \n-#define DEBUG_UART_BASE\t0x11030000\n+u32 spl_boot_mode(const u32 boot_device)\n+{\n+\treturn MMCSD_MODE_RAW;\n+}\n \n void board_debug_uart_init(void)\n {\n-static struct rk322x_grf * const grf = (void *)GRF_BASE;\n-\t/* Enable early UART2 channel 1 on the RK322x */\n-\trk_clrsetreg(&grf->gpio1b_iomux,\n-\t\t GPIO1B1_MASK | GPIO1B2_MASK,\n-\t\t GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |\n-\t\t GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);\n-\t/* Set channel C as UART2 input */\n-\trk_clrsetreg(&grf->con_iomux,\n-\t\t CON_IOMUX_UART2SEL_MASK,\n-\t\t CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);\n }\n \n-#define SGRF_DDR_CON0 0x10150000\n void board_init_f(ulong dummy)\n {\n-\tstruct udevice *dev;\n \tint ret;\n \n-\t/*\n-\t * Debug UART can be used from here if required:\n-\t *\n-\t * debug_uart_init();\n-\t * printch('a');\n-\t * printhex8(0x1234);\n-\t * printascii(\"string\");\n-\t */\n-\tdebug_uart_init();\n-\tprintascii(\"SPL Init\");\n-\n \tret = spl_early_init();\n \tif (ret) {\n-\t\tdebug(\"spl_early_init() failed: %d\\n\", ret);\n+\t\tprintf(\"spl_early_init() failed: %d\\n\", ret);\n \t\thang();\n \t}\n+\tpreloader_console_init();\n+}\n \n-\trockchip_timer_init();\n-\tprintf(\"timer init done\\n\");\n-\tret = uclass_get_device(UCLASS_RAM, 0, &dev);\n-\tif (ret) {\n-\t\tprintf(\"DRAM init failed: %d\\n\", ret);\n-\t\treturn;\n-\t}\n+#ifdef CONFIG_SPL_LOAD_FIT\n+int board_fit_config_name_match(const char *name)\n+{\n+\t/* Just empty function now - can't decide what to choose */\n+\tdebug(\"%s: %s\\n\", __func__, name);\n \n-\t/* Disable the ddr secure region setting to make it non-secure */\n-\trk_clrreg(SGRF_DDR_CON0, 0x4000);\n-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)\n-\tback_to_bootrom();\n-#endif\n+\treturn 0;\n }\n+#endif\ndiff --git a/arch/arm/mach-rockchip/rk322x-board-tpl.c b/arch/arm/mach-rockchip/rk322x-board-tpl.c\nnew file mode 100644\nindex 0000000..5277dd6\n--- /dev/null\n+++ b/arch/arm/mach-rockchip/rk322x-board-tpl.c\n@@ -0,0 +1,81 @@\n+/*\n+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd\n+ *\n+ * SPDX-License-Identifier: GPL-2.0+\n+ */\n+\n+#include <common.h>\n+#include <debug_uart.h>\n+#include <dm.h>\n+#include <ram.h>\n+#include <spl.h>\n+#include <asm/io.h>\n+#include <asm/arch/bootrom.h>\n+#include <asm/arch/cru_rk322x.h>\n+#include <asm/arch/grf_rk322x.h>\n+#include <asm/arch/hardware.h>\n+#include <asm/arch/timer.h>\n+#include <asm/arch/uart.h>\n+\n+u32 spl_boot_device(void)\n+{\n+\treturn BOOT_DEVICE_MMC1;\n+}\n+DECLARE_GLOBAL_DATA_PTR;\n+\n+#define GRF_BASE\t0x11000000\n+#define SGRF_BASE\t0x10140000\n+\n+#define DEBUG_UART_BASE\t0x11030000\n+\n+void board_debug_uart_init(void)\n+{\n+static struct rk322x_grf * const grf = (void *)GRF_BASE;\n+\t/* Enable early UART2 channel 1 on the RK322x */\n+\trk_clrsetreg(&grf->gpio1b_iomux,\n+\t\t GPIO1B1_MASK | GPIO1B2_MASK,\n+\t\t GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |\n+\t\t GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);\n+\t/* Set channel C as UART2 input */\n+\trk_clrsetreg(&grf->con_iomux,\n+\t\t CON_IOMUX_UART2SEL_MASK,\n+\t\t CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);\n+}\n+\n+#define SGRF_DDR_CON0 0x10150000\n+void board_init_f(ulong dummy)\n+{\n+\tstruct udevice *dev;\n+\tint ret;\n+\n+\t/*\n+\t * Debug UART can be used from here if required:\n+\t *\n+\t * debug_uart_init();\n+\t * printch('a');\n+\t * printhex8(0x1234);\n+\t * printascii(\"string\");\n+\t */\n+\tdebug_uart_init();\n+\tprintascii(\"TPL Init\");\n+\n+\tret = spl_early_init();\n+\tif (ret) {\n+\t\tdebug(\"spl_early_init() failed: %d\\n\", ret);\n+\t\thang();\n+\t}\n+\n+\trockchip_timer_init();\n+\tprintf(\"timer init done\\n\");\n+\tret = uclass_get_device(UCLASS_RAM, 0, &dev);\n+\tif (ret) {\n+\t\tprintf(\"DRAM init failed: %d\\n\", ret);\n+\t\treturn;\n+\t}\n+\n+\t/* Disable the ddr secure region setting to make it non-secure */\n+\trk_clrreg(SGRF_DDR_CON0, 0x4000);\n+#if defined(CONFIG_TPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_TPL_BOARD_INIT)\n+\tback_to_bootrom();\n+#endif\n+}\ndiff --git a/arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds b/arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds\nnew file mode 100644\nindex 0000000..841c803\n--- /dev/null\n+++ b/arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds\n@@ -0,0 +1,13 @@\n+/*\n+ * Copyright (C) 2017 Rockchip Electronic Co.,Ltd\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#undef CONFIG_SPL_TEXT_BASE\n+#define CONFIG_SPL_TEXT_BASE CONFIG_TPL_TEXT_BASE\n+\n+#undef CONFIG_SPL_MAX_SIZE\n+#define CONFIG_SPL_MAX_SIZE CONFIG_TPL_MAX_SIZE\n+\n+#include \"../../cpu/u-boot-spl.lds\"\ndiff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h\nindex 7630bc5..ba207d6 100644\n--- a/include/configs/rk322x_common.h\n+++ b/include/configs/rk322x_common.h\n@@ -22,11 +22,13 @@\n \n #define CONFIG_SPL_FRAMEWORK\n #define CONFIG_SYS_NS16550_MEM32\n-#define CONFIG_SYS_TEXT_BASE\t\t0x60000000\n-#define CONFIG_SYS_INIT_SP_ADDR\t\t0x60100000\n-#define CONFIG_SYS_LOAD_ADDR\t\t0x60800800\n-#define CONFIG_SPL_STACK\t\t0x10088000\n-#define CONFIG_SPL_TEXT_BASE\t\t0x10081004\n+#define CONFIG_SYS_TEXT_BASE\t\t0x61000000\n+#define CONFIG_SYS_INIT_SP_ADDR\t\t0x61100000\n+#define CONFIG_SYS_LOAD_ADDR\t\t0x61800800\n+#define CONFIG_SPL_TEXT_BASE\t\t0x60000000\n+\n+#define CONFIG_TPL_STACK\t\t0x10088000\n+#define CONFIG_TPL_TEXT_BASE\t\t0x10081004\n \n #define CONFIG_ROCKCHIP_MAX_INIT_SIZE\t(28 << 10)\n #define CONFIG_ROCKCHIP_CHIP_TAG\t\"RK32\"\n", "prefixes": [ "U-Boot", "04/10" ] }