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GET /api/patches/810313/?format=api
{ "id": 810313, "url": "http://patchwork.ozlabs.org/api/patches/810313/?format=api", "web_url": "http://patchwork.ozlabs.org/project/openvswitch/patch/20170905223945.10908-1-aserdean@ovn.org/", "project": { "id": 47, "url": "http://patchwork.ozlabs.org/api/projects/47/?format=api", "name": "Open vSwitch", "link_name": "openvswitch", "list_id": "ovs-dev.openvswitch.org", "list_email": "ovs-dev@openvswitch.org", "web_url": "http://openvswitch.org/", "scm_url": "git@github.com:openvswitch/ovs.git", "webscm_url": "https://github.com/openvswitch/ovs", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170905223945.10908-1-aserdean@ovn.org>", "list_archive_url": null, "date": "2017-09-05T22:39:45", "name": "[ovs-dev,v2] ovs-atomic-msvc: Add atomics x64 builds", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "e6d0dd34141202fd799a01565e388e23c3005524", "submitter": { "id": 72181, "url": "http://patchwork.ozlabs.org/api/people/72181/?format=api", "name": "Alin-Gabriel Serdean", "email": "aserdean@ovn.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/openvswitch/patch/20170905223945.10908-1-aserdean@ovn.org/mbox/", "series": [ { "id": 1661, "url": "http://patchwork.ozlabs.org/api/series/1661/?format=api", "web_url": "http://patchwork.ozlabs.org/project/openvswitch/list/?series=1661", "date": "2017-09-05T22:39:45", "name": "[ovs-dev,v2] ovs-atomic-msvc: Add atomics x64 builds", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/1661/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/810313/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/810313/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<ovs-dev-bounces@openvswitch.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "dev@openvswitch.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "ovs-dev@mail.linuxfoundation.org" ], "Authentication-Results": "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=openvswitch.org\n\t(client-ip=140.211.169.12; helo=mail.linuxfoundation.org;\n\tenvelope-from=ovs-dev-bounces@openvswitch.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from mail.linuxfoundation.org (mail.linuxfoundation.org\n\t[140.211.169.12])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xn1r36qcTz9sP3\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 6 Sep 2017 08:40:03 +1000 (AEST)", "from mail.linux-foundation.org (localhost [127.0.0.1])\n\tby mail.linuxfoundation.org (Postfix) with ESMTP id F1ABCAAC;\n\tTue, 5 Sep 2017 22:39:59 +0000 (UTC)", "from smtp1.linuxfoundation.org (smtp1.linux-foundation.org\n\t[172.17.192.35])\n\tby mail.linuxfoundation.org (Postfix) with ESMTPS id 308B1AAC\n\tfor <dev@openvswitch.org>; Tue, 5 Sep 2017 22:39:58 +0000 (UTC)", "from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net\n\t[217.70.183.195])\n\tby smtp1.linuxfoundation.org (Postfix) with ESMTPS id 8BB07422\n\tfor <dev@openvswitch.org>; Tue, 5 Sep 2017 22:39:57 +0000 (UTC)", "from localhost.localdomain (unknown [79.114.121.216])\n\t(Authenticated sender: aserdean@ovn.org)\n\tby relay3-d.mail.gandi.net (Postfix) with ESMTPSA id A8D7AA80C8;\n\tWed, 6 Sep 2017 00:39:55 +0200 (CEST)" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Originating-IP": "79.114.121.216", "From": "Alin Gabriel Serdean <aserdean@ovn.org>", "To": "dev@openvswitch.org", "Date": "Wed, 6 Sep 2017 01:39:45 +0300", "Message-Id": "<20170905223945.10908-1-aserdean@ovn.org>", "X-Mailer": "git-send-email 2.10.2.windows.1", "X-Spam-Status": "No, score=-0.7 required=5.0 tests=RCVD_IN_DNSWL_LOW\n\tautolearn=disabled version=3.3.1", "X-Spam-Checker-Version": "SpamAssassin 3.3.1 (2010-03-16) on\n\tsmtp1.linux-foundation.org", "Cc": "Alin Gabriel Serdean <aserdean@ovn.org>", "Subject": "[ovs-dev] [PATCH v2] ovs-atomic-msvc: Add atomics x64 builds", "X-BeenThere": "ovs-dev@openvswitch.org", "X-Mailman-Version": "2.1.12", "Precedence": "list", "List-Id": "<ovs-dev.openvswitch.org>", "List-Unsubscribe": "<https://mail.openvswitch.org/mailman/options/ovs-dev>,\n\t<mailto:ovs-dev-request@openvswitch.org?subject=unsubscribe>", "List-Archive": "<http://mail.openvswitch.org/pipermail/ovs-dev/>", "List-Post": "<mailto:ovs-dev@openvswitch.org>", "List-Help": "<mailto:ovs-dev-request@openvswitch.org?subject=help>", "List-Subscribe": "<https://mail.openvswitch.org/mailman/listinfo/ovs-dev>,\n\t<mailto:ovs-dev-request@openvswitch.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "ovs-dev-bounces@openvswitch.org", "Errors-To": "ovs-dev-bounces@openvswitch.org" }, "content": "This patch enables atomics on x64 builds.\n\nReuse the atomics defined for x86 and add atomics for 64 bit reads/writes.\n\nBefore this patch the cmap test gives us:\n$ ./tests/ovstest.exe test-cmap benchmark 10000000 3 1\nBenchmarking with n=10000000, 3 threads, 1.00% mutations, batch size 1:\ncmap insert: 20100 ms\ncmap iterate: 2967 ms\nbatch search: 10929 ms\ncmap destroy: 13489 ms\n\ncmap insert: 20079 ms\ncmap iterate: 2953 ms\ncmap search: 10559 ms\ncmap destroy: 13486 ms\n\nhmap insert: 2021 ms\nhmap iterate: 1162 ms\nhmap search: 5152 ms\nhmap destroy: 1158 ms\n\nAfter this change we have:\n$ ./tests/ovstest.exe test-cmap benchmark 10000000 3 1\nBenchmarking with n=10000000, 3 threads, 1.00% mutations, batch size 1:\ncmap insert: 2953 ms\ncmap iterate: 267 ms\nbatch search: 2193 ms\ncmap destroy: 2037 ms\n\ncmap insert: 2909 ms\ncmap iterate: 267 ms\ncmap search: 2167 ms\ncmap destroy: 2087 ms\n\nhmap insert: 1853 ms\nhmap iterate: 1086 ms\nhmap search: 4395 ms\nhmap destroy: 1140 ms\n\nWe should probably revisit this file and investigate it further to see if\nwe can squeeze more performance.\n\nAs a side effect fix tests on x64 because usage of `ovs-atomic-pthreads.h`\nis currently broken.\n\nSigned-off-by: Alin Gabriel Serdean <aserdean@ovn.org>\nSuggested-by: Ben Pfaff <blp@ovn.org>\n---\nv2: Change commit message.\n---\n lib/ovs-atomic-msvc.h | 12 ++++++++++++\n lib/ovs-atomic.h | 2 +-\n 2 files changed, 13 insertions(+), 1 deletion(-)", "diff": "diff --git a/lib/ovs-atomic-msvc.h b/lib/ovs-atomic-msvc.h\nindex c6a7db3..0b041c6 100644\n--- a/lib/ovs-atomic-msvc.h\n+++ b/lib/ovs-atomic-msvc.h\n@@ -107,6 +107,7 @@ atomic_signal_fence(memory_order order)\n * InterlockedExchange64Acquire() available. So we are forced to use\n * InterlockedExchange64() which uses full memory barrier for everything\n * greater than 'memory_order_relaxed'. */\n+#ifdef _M_IX86\n #define atomic_store64(DST, SRC, ORDER) \\\n if (ORDER == memory_order_relaxed) { \\\n InterlockedExchangeNoFence64((int64_t volatile *) (DST), \\\n@@ -114,6 +115,11 @@ atomic_signal_fence(memory_order order)\n } else { \\\n InterlockedExchange64((int64_t volatile *) (DST), (int64_t) (SRC));\\\n }\n+#elif _M_X64\n+/* 64 bit writes are atomic on amd64 if 64 bit aligned. */\n+#define atomic_store64(DST, SRC, ORDER) \\\n+ atomic_storeX(64, DST, SRC, ORDER)\n+#endif\n \n /* Used for 8 and 16 bit variations. */\n #define atomic_storeX(X, DST, SRC, ORDER) \\\n@@ -160,11 +166,17 @@ atomic_signal_fence(memory_order order)\n /* MSVC converts 64 bit reads into two instructions. So there is\n * a possibility that an interrupt can make a 64 bit read non-atomic even\n * when 8 byte aligned. So use fully memory barrier InterlockedOr64(). */\n+#ifdef _M_IX86\n #define atomic_read64(SRC, DST, ORDER) \\\n __pragma (warning(push)) \\\n __pragma (warning(disable:4047)) \\\n *(DST) = InterlockedOr64((int64_t volatile *) (SRC), 0); \\\n __pragma (warning(pop))\n+#elif _M_X64\n+/* 64 bit reads are atomic on amd64 if 64 bit aligned. */\n+#define atomic_read64(SRC, DST, ORDER) \\\n+ *(DST) = *(SRC);\n+#endif\n \n #define atomic_read(SRC, DST) \\\n atomic_read_explicit(SRC, DST, memory_order_seq_cst)\ndiff --git a/lib/ovs-atomic.h b/lib/ovs-atomic.h\nindex f1f2c38..c835eb7 100644\n--- a/lib/ovs-atomic.h\n+++ b/lib/ovs-atomic.h\n@@ -335,7 +335,7 @@\n #include \"ovs-atomic-i586.h\"\n #elif HAVE_GCC4_ATOMICS\n #include \"ovs-atomic-gcc4+.h\"\n- #elif _MSC_VER && _M_IX86 >= 500\n+ #elif _MSC_VER\n #include \"ovs-atomic-msvc.h\"\n #else\n /* ovs-atomic-pthreads implementation is provided for portability.\n", "prefixes": [ "ovs-dev", "v2" ] }