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GET /api/patches/810161/?format=api
{ "id": 810161, "url": "http://patchwork.ozlabs.org/api/patches/810161/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20170905131114.28934-1-marek.vasut+renesas@gmail.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170905131114.28934-1-marek.vasut+renesas@gmail.com>", "list_archive_url": null, "date": "2017-09-05T13:11:14", "name": "[U-Boot] ARM: rmobile: Fix SD divider settings on Gen3", "commit_ref": "183f5fd3caec9266432a7cbd50f59cec8bbddc6a", "pull_url": null, "state": "accepted", "archived": false, "hash": "9c221144ff8c8531f604eb82cda3c34c2bb9e53f", "submitter": { "id": 1124, "url": "http://patchwork.ozlabs.org/api/people/1124/?format=api", "name": "Marek Vasut", "email": "marek.vasut@gmail.com" }, "delegate": { "id": 1750, "url": "http://patchwork.ozlabs.org/api/users/1750/?format=api", "username": "iwamatsu", "first_name": "Nobuhiro", "last_name": "Iwamatsu", "email": "iwamatsu@nigauri.org" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20170905131114.28934-1-marek.vasut+renesas@gmail.com/mbox/", "series": [ { "id": 1581, "url": "http://patchwork.ozlabs.org/api/series/1581/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=1581", "date": "2017-09-05T13:11:14", "name": "[U-Boot] ARM: rmobile: Fix SD divider settings on Gen3", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/1581/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/810161/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/810161/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"GbyE0oPq\"; dkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xmnDF353tz9t24\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 5 Sep 2017 23:11:41 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 0F1D7C21E09; Tue, 5 Sep 2017 13:11:38 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id C86F4C21C57;\n\tTue, 5 Sep 2017 13:11:35 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid F25BFC21C57; Tue, 5 Sep 2017 13:11:34 +0000 (UTC)", "from mail-wm0-f66.google.com (mail-wm0-f66.google.com\n\t[74.125.82.66])\n\tby lists.denx.de (Postfix) with ESMTPS id 74F02C21C45\n\tfor <u-boot@lists.denx.de>; Tue, 5 Sep 2017 13:11:34 +0000 (UTC)", "by mail-wm0-f66.google.com with SMTP id p17so2937818wmd.3\n\tfor <u-boot@lists.denx.de>; Tue, 05 Sep 2017 06:11:34 -0700 (PDT)", "from chi.lan (cst-prg-84-35.cust.vodafone.cz. [46.135.84.35])\n\tby smtp.gmail.com with ESMTPSA id 1sm585964wmq.10.2017.09.05.06.11.31\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tTue, 05 Sep 2017 06:11:32 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=FREEMAIL_FROM,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id;\n\tbh=8qSg0/aJgNZWPgkX5Tz2zu5vdXgw9vep2/3ZP9uS0xo=;\n\tb=GbyE0oPqdXQfeM/aG3E7Hro9yUQ6+joErkvZ4QPOrWdfmvFKKh+5zxy9TKWIzO7zK1\n\t08zE4TEogeYyh9vwa3Zw1kDF5uFKBK5YpAfjGjFKGHLxLl7CzRyWZmIBWiLtHg5bN78I\n\tj0hnpMjMexujEEobpA0EXDCrRw7EBFeULKafnN7hk7v8tJSmdThvnNeE5PW7Bb7Fo3aW\n\t3O78DYDt+5V2mXPjDTEuius6Q+jMtHDhEMo/mJ7u2B0yPf3dGT+VFnPkHSxjvL3Zirpc\n\tt0+CzBm4WzCqjMy2zX3xwiaXQE4pMvf+9i2aDTBVIG8VzTpRl/JoGnjfBPp0GENOCK3R\n\t0Sag==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id;\n\tbh=8qSg0/aJgNZWPgkX5Tz2zu5vdXgw9vep2/3ZP9uS0xo=;\n\tb=KrLFWgmhvw31dLIupn1Fmt2RbYDVahfIuoBbQOMpIfR5xjiRDRHpvEFfNjqA+vGLZ/\n\tDrtC9Tbr5RO0Yzdas6YMP6N7zxZyTUYxUAQs/mNuhIaAAafxMZCuN5TkEE4LYuXeAlYh\n\tGQ770MAv3Up/yRsIO9cLyNV25wVeaOCONJTpE2YviVZxOoBOE8ZdZiZujsuSrhcO9E3C\n\tlRH3pdaUuraZ2h28bb9vdxPNidFQYNQPNYnGmZjDrIKxmwxVKp7LQVnteXCEhTtwy4t8\n\tEXwgFZDvcPwPaBTk0q8xhAAG6Y0adHwNMAPZy8IxtBs0gCxVkJ+pZ3MxNkj6uQhS0IjC\n\tL5ow==", "X-Gm-Message-State": "AHPjjUhjOxNNRULRiw6GueEwA546fvY1A8/LnI92g/Pzw35kSJ6XlL88\n\tGKPsnN0oevfbx9WM3c4=", "X-Google-Smtp-Source": "ADKCNb670MOissVVyuGY7JWwI8MBXfQ6aJTD8NIKIpkfuXwaIxC/JZ+06ldgRezafZPrBtQ8HYDKwA==", "X-Received": "by 10.28.127.195 with SMTP id a186mr2429566wmd.20.1504617093486; \n\tTue, 05 Sep 2017 06:11:33 -0700 (PDT)", "From": "Marek Vasut <marek.vasut@gmail.com>", "X-Google-Original-From": "Marek Vasut <marek.vasut+renesas@gmail.com>", "To": "u-boot@lists.denx.de", "Date": "Tue, 5 Sep 2017 15:11:14 +0200", "Message-Id": "<20170905131114.28934-1-marek.vasut+renesas@gmail.com>", "X-Mailer": "git-send-email 2.13.2", "Cc": "Marek Vasut <marek.vasut+renesas@gmail.com>", "Subject": "[U-Boot] [PATCH] ARM: rmobile: Fix SD divider settings on Gen3", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "On RCar M3 and on RCar H3 newer than and not including ES1.0, the SD clock\nmust be divided by 4 rather than 2 because a hardware workaround present\nonly in the H3 ES1.0 has been removed from these chips. U-Boot currently\nonly supports M3 and H3 ES 2.0 and newer, so configure the SD pre-divider\nto 4 to prevent SD instability.\n\nSigned-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>\nCc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>\n---\n board/renesas/salvator-x/salvator-x.c | 8 ++++----\n board/renesas/ulcb/ulcb.c | 8 ++++----\n 2 files changed, 8 insertions(+), 8 deletions(-)", "diff": "diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c\nindex 2695de5dbf..e260117802 100644\n--- a/board/renesas/salvator-x/salvator-x.c\n+++ b/board/renesas/salvator-x/salvator-x.c\n@@ -74,10 +74,10 @@ int board_early_init_f(void)\n \t/* SDHI0, 3 */\n \tmstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD0_MSTP314 | SD3_MSTP311);\n \n-\twritel(0, SD0CKCR);\n-\twritel(0, SD1CKCR);\n-\twritel(0, SD2CKCR);\n-\twritel(0, SD3CKCR);\n+\twritel(1, SD0CKCR);\n+\twritel(1, SD1CKCR);\n+\twritel(1, SD2CKCR);\n+\twritel(1, SD3CKCR);\n \n #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)\n \t/* DVFS for reset */\ndiff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c\nindex 2b6cc612c8..dc23228f4f 100644\n--- a/board/renesas/ulcb/ulcb.c\n+++ b/board/renesas/ulcb/ulcb.c\n@@ -72,10 +72,10 @@ int board_early_init_f(void)\n \t/* SDHI0 */\n \tmstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD0_MSTP314);\n \n-\twritel(0, SD0CKCR);\n-\twritel(0, SD1CKCR);\n-\twritel(0, SD2CKCR);\n-\twritel(0, SD3CKCR);\n+\twritel(1, SD0CKCR);\n+\twritel(1, SD1CKCR);\n+\twritel(1, SD2CKCR);\n+\twritel(1, SD3CKCR);\n \n #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)\n \t/* DVFS for reset */\n", "prefixes": [ "U-Boot" ] }