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GET /api/patches/810027/?format=api
{ "id": 810027, "url": "http://patchwork.ozlabs.org/api/patches/810027/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1504602267-31283-4-git-send-email-patrice.chotard@st.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1504602267-31283-4-git-send-email-patrice.chotard@st.com>", "list_archive_url": null, "date": "2017-09-05T09:04:20", "name": "[U-Boot,v10,03/10] mmc: sti_sdhci: Use reset framework", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "f38aed823e40c8fabf57e321f4c4f46929aa8e30", "submitter": { "id": 63958, "url": "http://patchwork.ozlabs.org/api/people/63958/?format=api", "name": "Patrice CHOTARD", "email": "patrice.chotard@st.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1504602267-31283-4-git-send-email-patrice.chotard@st.com/mbox/", "series": [ { "id": 1524, "url": "http://patchwork.ozlabs.org/api/series/1524/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=1524", "date": "2017-09-05T09:04:18", "name": "STiH410-B2260: add reset, usb and fastboot support", "version": 10, "mbox": "http://patchwork.ozlabs.org/series/1524/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/810027/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/810027/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xmh1V3pfDz9s7m\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 5 Sep 2017 19:17:02 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 26E8CC21EE5; Tue, 5 Sep 2017 09:10:17 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id DFC5EC21D8B;\n\tTue, 5 Sep 2017 09:09:31 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid CD815C21F49; Tue, 5 Sep 2017 09:06:04 +0000 (UTC)", "from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com\n\t[91.207.212.93])\n\tby lists.denx.de (Postfix) with ESMTPS id 3DF17C21FB1\n\tfor <u-boot@lists.denx.de>; Tue, 5 Sep 2017 09:04:42 +0000 (UTC)", "from pps.filterd (m0046660.ppops.net [127.0.0.1])\n\tby mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv857e9RK012880; Tue, 5 Sep 2017 11:04:34 +0200", "from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35])\n\tby mx08-00178001.pphosted.com with ESMTP id 2cqhs56wk6-1\n\t(version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT);\n\tTue, 05 Sep 2017 11:04:34 +0200", "from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9])\n\tby beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 897F442;\n\tTue, 5 Sep 2017 09:04:32 +0000 (GMT)", "from Webmail-eu.st.com (sfhdag6node3.st.com [10.75.127.18])\n\tby zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 6B920110C;\n\tTue, 5 Sep 2017 09:04:32 +0000 (GMT)", "from localhost (10.75.127.44) by SFHDAG6NODE3.st.com (10.75.127.18)\n\twith Microsoft SMTP Server (TLS) id 15.0.1178.4;\n\tTue, 5 Sep 2017 11:04:31 +0200" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.7 required=5.0 tests=RCVD_IN_DNSWL_LOW\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "From": "<patrice.chotard@st.com>", "To": "<u-boot@lists.denx.de>, <albert.u.boot@aribaud.net>, <sjg@chromium.org>, \n\t<jh80.chung@samsung.com>, <marex@denx.de>", "Date": "Tue, 5 Sep 2017 11:04:20 +0200", "Message-ID": "<1504602267-31283-4-git-send-email-patrice.chotard@st.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1504602267-31283-1-git-send-email-patrice.chotard@st.com>", "References": "<1504602267-31283-1-git-send-email-patrice.chotard@st.com>", "MIME-Version": "1.0", "X-Originating-IP": "[10.75.127.44]", "X-ClientProxiedBy": "SFHDAG5NODE1.st.com (10.75.127.13) To SFHDAG6NODE3.st.com\n\t(10.75.127.18)", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-05_03:, , signatures=0", "Subject": "[U-Boot] [PATCH v10 03/10] mmc: sti_sdhci: Use reset framework", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Patrice Chotard <patrice.chotard@st.com>\n\nSigned-off-by: Patrice Chotard <patrice.chotard@st.com>\nReviewed-by: Jaehoon Chung <jh80.chung@samsung.com>\nReviewed-by: Simon Glass <sjg@chromium.org>\n---\nv10:\t_ none\nv9:\t_ none\nv8:\t_ none\nv7:\t_ none\nv6:\t_ add reviewed-by Simon Glass\nv5:\t_ none\nv4:\t_ none\nv3:\t_ none\nv2:\t_ none\n drivers/mmc/sti_sdhci.c | 35 ++++++++++++++++++++---------------\n 1 file changed, 20 insertions(+), 15 deletions(-)", "diff": "diff --git a/drivers/mmc/sti_sdhci.c b/drivers/mmc/sti_sdhci.c\nindex 714afd9..d8b5888 100644\n--- a/drivers/mmc/sti_sdhci.c\n+++ b/drivers/mmc/sti_sdhci.c\n@@ -8,6 +8,7 @@\n #include <common.h>\n #include <dm.h>\n #include <mmc.h>\n+#include <reset-uclass.h>\n #include <sdhci.h>\n #include <asm/arch/sdhci.h>\n \n@@ -16,15 +17,10 @@ DECLARE_GLOBAL_DATA_PTR;\n struct sti_sdhci_plat {\n \tstruct mmc_config cfg;\n \tstruct mmc mmc;\n+\tstruct reset_ctl reset;\n \tint instance;\n };\n \n-/*\n- * used to get access to MMC1 reset,\n- * will be removed when STi reset driver will be available\n- */\n-#define STIH410_SYSCONF5_BASE\t\t0x092b0000\n-\n /**\n * sti_mmc_core_config: configure the Arasan HC\n * @dev : udevice\n@@ -37,17 +33,19 @@ struct sti_sdhci_plat {\n * W/o these settings the SDHCI could configure and use the embedded controller\n * with limited features.\n */\n-static void sti_mmc_core_config(struct udevice *dev)\n+static int sti_mmc_core_config(struct udevice *dev)\n {\n \tstruct sti_sdhci_plat *plat = dev_get_platdata(dev);\n \tstruct sdhci_host *host = dev_get_priv(dev);\n-\tunsigned long *sysconf;\n+\tint ret;\n \n \t/* only MMC1 has a reset line */\n \tif (plat->instance) {\n-\t\tsysconf = (unsigned long *)(STIH410_SYSCONF5_BASE +\n-\t\t\t ST_MMC_CCONFIG_REG_5);\n-\t\tgeneric_set_bit(SYSCONF_MMC1_ENABLE_BIT, sysconf);\n+\t\tret = reset_deassert(&plat->reset);\n+\t\tif (ret < 0) {\n+\t\t\terror(\"MMC1 deassert failed: %d\", ret);\n+\t\t\treturn ret;\n+\t\t}\n \t}\n \n \twritel(STI_FLASHSS_MMC_CORE_CONFIG_1,\n@@ -66,6 +64,8 @@ static void sti_mmc_core_config(struct udevice *dev)\n \t}\n \twritel(STI_FLASHSS_MMC_CORE_CONFIG4,\n \t host->ioaddr + FLASHSS_MMC_CORE_CONFIG_4);\n+\n+\treturn 0;\n }\n \n static int sti_sdhci_probe(struct udevice *dev)\n@@ -80,13 +80,18 @@ static int sti_sdhci_probe(struct udevice *dev)\n \t * MMC0 is wired to the SD slot,\n \t * MMC1 is wired on the high speed connector\n \t */\n-\n-\tif (fdt_getprop(gd->fdt_blob, dev_of_offset(dev), \"resets\", NULL))\n+\tret = reset_get_by_index(dev, 0, &plat->reset);\n+\tif (!ret)\n \t\tplat->instance = 1;\n \telse\n-\t\tplat->instance = 0;\n+\t\tif (ret == -ENOENT)\n+\t\t\tplat->instance = 0;\n+\t\telse\n+\t\t\treturn ret;\n \n-\tsti_mmc_core_config(dev);\n+\tret = sti_mmc_core_config(dev);\n+\tif (ret)\n+\t\treturn ret;\n \n \thost->quirks = SDHCI_QUIRK_WAIT_SEND_CMD |\n \t\t SDHCI_QUIRK_32BIT_DMA_ADDR |\n", "prefixes": [ "U-Boot", "v10", "03/10" ] }