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GET /api/patches/809929/?format=api
{ "id": 809929, "url": "http://patchwork.ozlabs.org/api/patches/809929/?format=api", "web_url": "http://patchwork.ozlabs.org/project/rtc-linux/patch/df7cab1d394816edcf06a803fa586afb94c5a2c6.1504588701.git.sathyanarayanan.kuppuswamy@linux.intel.com/", "project": { "id": 9, "url": "http://patchwork.ozlabs.org/api/projects/9/?format=api", "name": "Linux RTC development", "link_name": "rtc-linux", "list_id": "linux-rtc.vger.kernel.org", "list_email": "linux-rtc@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<df7cab1d394816edcf06a803fa586afb94c5a2c6.1504588701.git.sathyanarayanan.kuppuswamy@linux.intel.com>", "list_archive_url": null, "date": "2017-09-05T05:37:25", "name": "[RFC,v3,5/7] platform/x86: intel_punit_ipc: Use generic intel ipc device calls", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": false, "hash": "e9d6903c65e46efb2a7680094f64f15926af8bd9", "submitter": { "id": 66129, "url": "http://patchwork.ozlabs.org/api/people/66129/?format=api", "name": "Kuppuswamy Sathyanarayanan", "email": "sathyanarayanan.kuppuswamy@linux.intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/rtc-linux/patch/df7cab1d394816edcf06a803fa586afb94c5a2c6.1504588701.git.sathyanarayanan.kuppuswamy@linux.intel.com/mbox/", "series": [ { "id": 1490, "url": "http://patchwork.ozlabs.org/api/series/1490/?format=api", "web_url": "http://patchwork.ozlabs.org/project/rtc-linux/list/?series=1490", "date": "2017-09-05T05:37:20", "name": "PMC/PUNIT IPC driver cleanup", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/1490/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/809929/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/809929/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-rtc-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-rtc-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xmbB26tsBz9sNq\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 5 Sep 2017 15:39:06 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1754166AbdIEFjF (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tTue, 5 Sep 2017 01:39:05 -0400", "from mga01.intel.com ([192.55.52.88]:42427 \"EHLO mga01.intel.com\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1754111AbdIEFiP (ORCPT <rfc822;linux-rtc@vger.kernel.org>);\n\tTue, 5 Sep 2017 01:38:15 -0400", "from orsmga005.jf.intel.com ([10.7.209.41])\n\tby fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t04 Sep 2017 22:38:13 -0700", "from skuppusw-desk.jf.intel.com ([10.7.198.92])\n\tby orsmga005.jf.intel.com with ESMTP; 04 Sep 2017 22:38:13 -0700" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.41,478,1498546800\"; d=\"scan'208\";a=\"145505106\"", "From": "sathyanarayanan.kuppuswamy@linux.intel.com", "To": "a.zummo@towertech.it, x86@kernel.org, wim@iguana.be,\n\tmingo@redhat.com, alexandre.belloni@free-electrons.com,\n\tqipeng.zha@intel.com, hpa@zytor.com, dvhart@infradead.org,\n\ttglx@linutronix.de, lee.jones@linaro.org, andy@infradead.org,\n\tsouvik.k.chakravarty@intel.com", "Cc": "linux-rtc@vger.kernel.org, linux-watchdog@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org,\n\tsathyaosid@gmail.com, Kuppuswamy Sathyanarayanan \n\t<sathyanarayanan.kuppuswamy@linux.intel.com>", "Subject": "[RFC v3 5/7] platform/x86: intel_punit_ipc: Use generic intel ipc\n\tdevice calls", "Date": "Mon, 4 Sep 2017 22:37:25 -0700", "Message-Id": "<df7cab1d394816edcf06a803fa586afb94c5a2c6.1504588701.git.sathyanarayanan.kuppuswamy@linux.intel.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<cover.1504588701.git.sathyanarayanan.kuppuswamy@linux.intel.com>", "References": "<cover.1504588701.git.sathyanarayanan.kuppuswamy@linux.intel.com>", "Sender": "linux-rtc-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-rtc.vger.kernel.org>", "X-Mailing-List": "linux-rtc@vger.kernel.org" }, "content": "From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>\n\nRemoved redundant IPC helper functions and refactored the driver to use\nAPIs provided by generic IPC driver. This patch also cleans-up PUNIT IPC\nuser drivers to use APIs provided by generic IPC driver.\n\nSigned-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>\n---\n arch/x86/include/asm/intel_punit_ipc.h | 125 +++++------\n drivers/platform/x86/Kconfig | 1 +\n drivers/platform/x86/intel_punit_ipc.c | 297 +++++++++-----------------\n drivers/platform/x86/intel_telemetry_pltdrv.c | 96 +++++----\n 4 files changed, 216 insertions(+), 303 deletions(-)\n\nChanges since v1:\n * Removed custom APIs.\n * Cleaned up PUNIT IPC user drivers to use APIs provided by generic\n IPC driver.", "diff": "diff --git a/arch/x86/include/asm/intel_punit_ipc.h b/arch/x86/include/asm/intel_punit_ipc.h\nindex 201eb9d..cf1630c 100644\n--- a/arch/x86/include/asm/intel_punit_ipc.h\n+++ b/arch/x86/include/asm/intel_punit_ipc.h\n@@ -1,10 +1,8 @@\n #ifndef _ASM_X86_INTEL_PUNIT_IPC_H_\n #define _ASM_X86_INTEL_PUNIT_IPC_H_\n \n-/*\n- * Three types of 8bit P-Unit IPC commands are supported,\n- * bit[7:6]: [00]: BIOS; [01]: GTD; [10]: ISPD.\n- */\n+#include <linux/platform_data/x86/intel_ipc_dev.h>\n+\n typedef enum {\n \tBIOS_IPC = 0,\n \tGTDRIVER_IPC,\n@@ -12,61 +10,60 @@ typedef enum {\n \tRESERVED_IPC,\n } IPC_TYPE;\n \n-#define IPC_TYPE_OFFSET\t\t\t6\n-#define IPC_PUNIT_BIOS_CMD_BASE\t\t(BIOS_IPC << IPC_TYPE_OFFSET)\n-#define IPC_PUNIT_GTD_CMD_BASE\t\t(GTDDRIVER_IPC << IPC_TYPE_OFFSET)\n-#define IPC_PUNIT_ISPD_CMD_BASE\t\t(ISPDRIVER_IPC << IPC_TYPE_OFFSET)\n-#define IPC_PUNIT_CMD_TYPE_MASK\t\t(RESERVED_IPC << IPC_TYPE_OFFSET)\n+#define PUNIT_BIOS_IPC_DEV\t\t\t\"punit_bios_ipc\"\n+#define PUNIT_GTD_IPC_DEV\t\t\t\"punit_gtd_ipc\"\n+#define PUNIT_ISP_IPC_DEV\t\t\t\"punit_isp_ipc\"\n+#define PUNIT_PARAM_LEN\t\t\t\t3\n \n /* BIOS => Pcode commands */\n-#define IPC_PUNIT_BIOS_ZERO\t\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x00)\n-#define IPC_PUNIT_BIOS_VR_INTERFACE\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x01)\n-#define IPC_PUNIT_BIOS_READ_PCS\t\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x02)\n-#define IPC_PUNIT_BIOS_WRITE_PCS\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x03)\n-#define IPC_PUNIT_BIOS_READ_PCU_CONFIG\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x04)\n-#define IPC_PUNIT_BIOS_WRITE_PCU_CONFIG\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x05)\n-#define IPC_PUNIT_BIOS_READ_PL1_SETTING\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x06)\n-#define IPC_PUNIT_BIOS_WRITE_PL1_SETTING\t(IPC_PUNIT_BIOS_CMD_BASE | 0x07)\n-#define IPC_PUNIT_BIOS_TRIGGER_VDD_RAM\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x08)\n-#define IPC_PUNIT_BIOS_READ_TELE_INFO\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x09)\n-#define IPC_PUNIT_BIOS_READ_TELE_TRACE_CTRL\t(IPC_PUNIT_BIOS_CMD_BASE | 0x0a)\n-#define IPC_PUNIT_BIOS_WRITE_TELE_TRACE_CTRL\t(IPC_PUNIT_BIOS_CMD_BASE | 0x0b)\n-#define IPC_PUNIT_BIOS_READ_TELE_EVENT_CTRL\t(IPC_PUNIT_BIOS_CMD_BASE | 0x0c)\n-#define IPC_PUNIT_BIOS_WRITE_TELE_EVENT_CTRL\t(IPC_PUNIT_BIOS_CMD_BASE | 0x0d)\n-#define IPC_PUNIT_BIOS_READ_TELE_TRACE\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x0e)\n-#define IPC_PUNIT_BIOS_WRITE_TELE_TRACE\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x0f)\n-#define IPC_PUNIT_BIOS_READ_TELE_EVENT\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x10)\n-#define IPC_PUNIT_BIOS_WRITE_TELE_EVENT\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x11)\n-#define IPC_PUNIT_BIOS_READ_MODULE_TEMP\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x12)\n-#define IPC_PUNIT_BIOS_RESERVED\t\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x13)\n-#define IPC_PUNIT_BIOS_READ_VOLTAGE_OVER\t(IPC_PUNIT_BIOS_CMD_BASE | 0x14)\n-#define IPC_PUNIT_BIOS_WRITE_VOLTAGE_OVER\t(IPC_PUNIT_BIOS_CMD_BASE | 0x15)\n-#define IPC_PUNIT_BIOS_READ_RATIO_OVER\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x16)\n-#define IPC_PUNIT_BIOS_WRITE_RATIO_OVER\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x17)\n-#define IPC_PUNIT_BIOS_READ_VF_GL_CTRL\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x18)\n-#define IPC_PUNIT_BIOS_WRITE_VF_GL_CTRL\t\t(IPC_PUNIT_BIOS_CMD_BASE | 0x19)\n-#define IPC_PUNIT_BIOS_READ_FM_SOC_TEMP_THRESH\t(IPC_PUNIT_BIOS_CMD_BASE | 0x1a)\n-#define IPC_PUNIT_BIOS_WRITE_FM_SOC_TEMP_THRESH\t(IPC_PUNIT_BIOS_CMD_BASE | 0x1b)\n+#define IPC_PUNIT_BIOS_ZERO\t\t\t(0x00)\n+#define IPC_PUNIT_BIOS_VR_INTERFACE\t\t(0x01)\n+#define IPC_PUNIT_BIOS_READ_PCS\t\t\t(0x02)\n+#define IPC_PUNIT_BIOS_WRITE_PCS\t\t(0x03)\n+#define IPC_PUNIT_BIOS_READ_PCU_CONFIG\t\t(0x04)\n+#define IPC_PUNIT_BIOS_WRITE_PCU_CONFIG\t\t(0x05)\n+#define IPC_PUNIT_BIOS_READ_PL1_SETTING\t\t(0x06)\n+#define IPC_PUNIT_BIOS_WRITE_PL1_SETTING\t(0x07)\n+#define IPC_PUNIT_BIOS_TRIGGER_VDD_RAM\t\t(0x08)\n+#define IPC_PUNIT_BIOS_READ_TELE_INFO\t\t(0x09)\n+#define IPC_PUNIT_BIOS_READ_TELE_TRACE_CTRL\t(0x0a)\n+#define IPC_PUNIT_BIOS_WRITE_TELE_TRACE_CTRL\t(0x0b)\n+#define IPC_PUNIT_BIOS_READ_TELE_EVENT_CTRL\t(0x0c)\n+#define IPC_PUNIT_BIOS_WRITE_TELE_EVENT_CTRL\t(0x0d)\n+#define IPC_PUNIT_BIOS_READ_TELE_TRACE\t\t(0x0e)\n+#define IPC_PUNIT_BIOS_WRITE_TELE_TRACE\t\t(0x0f)\n+#define IPC_PUNIT_BIOS_READ_TELE_EVENT\t\t(0x10)\n+#define IPC_PUNIT_BIOS_WRITE_TELE_EVENT\t\t(0x11)\n+#define IPC_PUNIT_BIOS_READ_MODULE_TEMP\t\t(0x12)\n+#define IPC_PUNIT_BIOS_RESERVED\t\t\t(0x13)\n+#define IPC_PUNIT_BIOS_READ_VOLTAGE_OVER\t(0x14)\n+#define IPC_PUNIT_BIOS_WRITE_VOLTAGE_OVER\t(0x15)\n+#define IPC_PUNIT_BIOS_READ_RATIO_OVER\t\t(0x16)\n+#define IPC_PUNIT_BIOS_WRITE_RATIO_OVER\t\t(0x17)\n+#define IPC_PUNIT_BIOS_READ_VF_GL_CTRL\t\t(0x18)\n+#define IPC_PUNIT_BIOS_WRITE_VF_GL_CTRL\t\t(0x19)\n+#define IPC_PUNIT_BIOS_READ_FM_SOC_TEMP_THRESH\t(0x1a)\n+#define IPC_PUNIT_BIOS_WRITE_FM_SOC_TEMP_THRESH\t(0x1b)\n \n /* GT Driver => Pcode commands */\n-#define IPC_PUNIT_GTD_ZERO\t\t\t(IPC_PUNIT_GTD_CMD_BASE | 0x00)\n-#define IPC_PUNIT_GTD_CONFIG\t\t\t(IPC_PUNIT_GTD_CMD_BASE | 0x01)\n-#define IPC_PUNIT_GTD_READ_ICCP_LIC_CDYN_SCAL\t(IPC_PUNIT_GTD_CMD_BASE | 0x02)\n-#define IPC_PUNIT_GTD_WRITE_ICCP_LIC_CDYN_SCAL\t(IPC_PUNIT_GTD_CMD_BASE | 0x03)\n-#define IPC_PUNIT_GTD_GET_WM_VAL\t\t(IPC_PUNIT_GTD_CMD_BASE | 0x06)\n-#define IPC_PUNIT_GTD_WRITE_CONFIG_WISHREQ\t(IPC_PUNIT_GTD_CMD_BASE | 0x07)\n-#define IPC_PUNIT_GTD_READ_REQ_DUTY_CYCLE\t(IPC_PUNIT_GTD_CMD_BASE | 0x16)\n-#define IPC_PUNIT_GTD_DIS_VOL_FREQ_CHG_REQUEST\t(IPC_PUNIT_GTD_CMD_BASE | 0x17)\n-#define IPC_PUNIT_GTD_DYNA_DUTY_CYCLE_CTRL\t(IPC_PUNIT_GTD_CMD_BASE | 0x1a)\n-#define IPC_PUNIT_GTD_DYNA_DUTY_CYCLE_TUNING\t(IPC_PUNIT_GTD_CMD_BASE | 0x1c)\n+#define IPC_PUNIT_GTD_ZERO\t\t\t(0x00)\n+#define IPC_PUNIT_GTD_CONFIG\t\t\t(0x01)\n+#define IPC_PUNIT_GTD_READ_ICCP_LIC_CDYN_SCAL\t(0x02)\n+#define IPC_PUNIT_GTD_WRITE_ICCP_LIC_CDYN_SCAL\t(0x03)\n+#define IPC_PUNIT_GTD_GET_WM_VAL\t\t(0x06)\n+#define IPC_PUNIT_GTD_WRITE_CONFIG_WISHREQ\t(0x07)\n+#define IPC_PUNIT_GTD_READ_REQ_DUTY_CYCLE\t(0x16)\n+#define IPC_PUNIT_GTD_DIS_VOL_FREQ_CHG_REQUEST\t(0x17)\n+#define IPC_PUNIT_GTD_DYNA_DUTY_CYCLE_CTRL\t(0x1a)\n+#define IPC_PUNIT_GTD_DYNA_DUTY_CYCLE_TUNING\t(0x1c)\n \n /* ISP Driver => Pcode commands */\n-#define IPC_PUNIT_ISPD_ZERO\t\t\t(IPC_PUNIT_ISPD_CMD_BASE | 0x00)\n-#define IPC_PUNIT_ISPD_CONFIG\t\t\t(IPC_PUNIT_ISPD_CMD_BASE | 0x01)\n-#define IPC_PUNIT_ISPD_GET_ISP_LTR_VAL\t\t(IPC_PUNIT_ISPD_CMD_BASE | 0x02)\n-#define IPC_PUNIT_ISPD_ACCESS_IU_FREQ_BOUNDS\t(IPC_PUNIT_ISPD_CMD_BASE | 0x03)\n-#define IPC_PUNIT_ISPD_READ_CDYN_LEVEL\t\t(IPC_PUNIT_ISPD_CMD_BASE | 0x04)\n-#define IPC_PUNIT_ISPD_WRITE_CDYN_LEVEL\t\t(IPC_PUNIT_ISPD_CMD_BASE | 0x05)\n+#define IPC_PUNIT_ISPD_ZERO\t\t\t(0x00)\n+#define IPC_PUNIT_ISPD_CONFIG\t\t\t(0x01)\n+#define IPC_PUNIT_ISPD_GET_ISP_LTR_VAL\t\t(0x02)\n+#define IPC_PUNIT_ISPD_ACCESS_IU_FREQ_BOUNDS\t(0x03)\n+#define IPC_PUNIT_ISPD_READ_CDYN_LEVEL\t\t(0x04)\n+#define IPC_PUNIT_ISPD_WRITE_CDYN_LEVEL\t\t(0x05)\n \n /* Error codes */\n #define IPC_PUNIT_ERR_SUCCESS\t\t\t0\n@@ -77,25 +74,11 @@ typedef enum {\n #define IPC_PUNIT_ERR_INVALID_VR_ID\t\t5\n #define IPC_PUNIT_ERR_VR_ERR\t\t\t6\n \n-#if IS_ENABLED(CONFIG_INTEL_PUNIT_IPC)\n-\n-int intel_punit_ipc_simple_command(int cmd, int para1, int para2);\n-int intel_punit_ipc_command(u32 cmd, u32 para1, u32 para2, u32 *in, u32 *out);\n-\n-#else\n-\n-static inline int intel_punit_ipc_simple_command(int cmd,\n-\t\t\t\t\t\t int para1, int para2)\n+static inline void punit_cmd_init(u32 *cmd, u32 param1, u32 param2, u32 param3)\n {\n-\treturn -ENODEV;\n+\tcmd[0] = param1;\n+\tcmd[1] = param2;\n+\tcmd[2] = param3;\n }\n \n-static inline int intel_punit_ipc_command(u32 cmd, u32 para1, u32 para2,\n-\t\t\t\t\t u32 *in, u32 *out)\n-{\n-\treturn -ENODEV;\n-}\n-\n-#endif /* CONFIG_INTEL_PUNIT_IPC */\n-\n #endif\ndiff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig\nindex 9df7cda..82479ca 100644\n--- a/drivers/platform/x86/Kconfig\n+++ b/drivers/platform/x86/Kconfig\n@@ -1083,6 +1083,7 @@ config SURFACE_3_BUTTON\n \n config INTEL_PUNIT_IPC\n \ttristate \"Intel P-Unit IPC Driver\"\n+\tselect REGMAP_MMIO\n \t---help---\n \t This driver provides support for Intel P-Unit Mailbox IPC mechanism,\n \t which is used to bridge the communications between kernel and P-Unit.\ndiff --git a/drivers/platform/x86/intel_punit_ipc.c b/drivers/platform/x86/intel_punit_ipc.c\nindex a47a41f..611ccfe 100644\n--- a/drivers/platform/x86/intel_punit_ipc.c\n+++ b/drivers/platform/x86/intel_punit_ipc.c\n@@ -18,18 +18,18 @@\n #include <linux/device.h>\n #include <linux/interrupt.h>\n #include <linux/platform_device.h>\n+#include <linux/platform_data/x86/intel_ipc_dev.h>\n+#include <linux/regmap.h>\n #include <asm/intel_punit_ipc.h>\n \n-/* IPC Mailbox registers */\n-#define OFFSET_DATA_LOW\t\t0x0\n-#define OFFSET_DATA_HIGH\t0x4\n /* bit field of interface register */\n #define\tCMD_RUN\t\t\tBIT(31)\n-#define\tCMD_ERRCODE_MASK\tGENMASK(7, 0)\n+#define CMD_ERRCODE_MASK\tGENMASK(7, 0)\n #define\tCMD_PARA1_SHIFT\t\t8\n #define\tCMD_PARA2_SHIFT\t\t16\n \n-#define CMD_TIMEOUT_SECONDS\t1\n+/* IPC PUNIT commands */\n+#define\tIPC_DEV_PUNIT_CMD_STATUS_ERR_MASK\tGENMASK(7, 0)\n \n enum {\n \tBASE_DATA = 0,\n@@ -39,187 +39,42 @@ enum {\n \n typedef struct {\n \tstruct device *dev;\n-\tstruct mutex lock;\n-\tint irq;\n-\tstruct completion cmd_complete;\n \t/* base of interface and data registers */\n \tvoid __iomem *base[RESERVED_IPC][BASE_MAX];\n+\tstruct intel_ipc_dev *ipc_dev[RESERVED_IPC];\n \tIPC_TYPE type;\n } IPC_DEV;\n \n static IPC_DEV *punit_ipcdev;\n \n-static inline u32 ipc_read_status(IPC_DEV *ipcdev, IPC_TYPE type)\n-{\n-\treturn readl(ipcdev->base[type][BASE_IFACE]);\n-}\n-\n-static inline void ipc_write_cmd(IPC_DEV *ipcdev, IPC_TYPE type, u32 cmd)\n-{\n-\twritel(cmd, ipcdev->base[type][BASE_IFACE]);\n-}\n-\n-static inline u32 ipc_read_data_low(IPC_DEV *ipcdev, IPC_TYPE type)\n-{\n-\treturn readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW);\n-}\n-\n-static inline u32 ipc_read_data_high(IPC_DEV *ipcdev, IPC_TYPE type)\n-{\n-\treturn readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH);\n-}\n-\n-static inline void ipc_write_data_low(IPC_DEV *ipcdev, IPC_TYPE type, u32 data)\n-{\n-\twritel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW);\n-}\n-\n-static inline void ipc_write_data_high(IPC_DEV *ipcdev, IPC_TYPE type, u32 data)\n-{\n-\twritel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH);\n-}\n+const char *ipc_dev_name[RESERVED_IPC] = {\n+\tPUNIT_BIOS_IPC_DEV,\n+\tPUNIT_GTD_IPC_DEV,\n+\tPUNIT_ISP_IPC_DEV\n+};\n \n-static const char *ipc_err_string(int error)\n-{\n-\tif (error == IPC_PUNIT_ERR_SUCCESS)\n-\t\treturn \"no error\";\n-\telse if (error == IPC_PUNIT_ERR_INVALID_CMD)\n-\t\treturn \"invalid command\";\n-\telse if (error == IPC_PUNIT_ERR_INVALID_PARAMETER)\n-\t\treturn \"invalid parameter\";\n-\telse if (error == IPC_PUNIT_ERR_CMD_TIMEOUT)\n-\t\treturn \"command timeout\";\n-\telse if (error == IPC_PUNIT_ERR_CMD_LOCKED)\n-\t\treturn \"command locked\";\n-\telse if (error == IPC_PUNIT_ERR_INVALID_VR_ID)\n-\t\treturn \"invalid vr id\";\n-\telse if (error == IPC_PUNIT_ERR_VR_ERR)\n-\t\treturn \"vr error\";\n-\telse\n-\t\treturn \"unknown error\";\n-}\n+static struct regmap_config punit_regmap_config = {\n+ .reg_bits = 32,\n+ .reg_stride = 4,\n+ .val_bits = 32,\n+};\n \n-static int intel_punit_ipc_check_status(IPC_DEV *ipcdev, IPC_TYPE type)\n+int pre_simple_cmd_fn(u32 *cmd_list, u32 cmdlen)\n {\n-\tint loops = CMD_TIMEOUT_SECONDS * USEC_PER_SEC;\n-\tint errcode;\n-\tint status;\n-\n-\tif (ipcdev->irq) {\n-\t\tif (!wait_for_completion_timeout(&ipcdev->cmd_complete,\n-\t\t\t\t\t\t CMD_TIMEOUT_SECONDS * HZ)) {\n-\t\t\tdev_err(ipcdev->dev, \"IPC timed out\\n\");\n-\t\t\treturn -ETIMEDOUT;\n-\t\t}\n-\t} else {\n-\t\twhile ((ipc_read_status(ipcdev, type) & CMD_RUN) && --loops)\n-\t\t\tudelay(1);\n-\t\tif (!loops) {\n-\t\t\tdev_err(ipcdev->dev, \"IPC timed out\\n\");\n-\t\t\treturn -ETIMEDOUT;\n-\t\t}\n-\t}\n+\tif (!cmd_list || cmdlen != PUNIT_PARAM_LEN)\n+\t\treturn -EINVAL;\n \n-\tstatus = ipc_read_status(ipcdev, type);\n-\terrcode = status & CMD_ERRCODE_MASK;\n-\tif (errcode) {\n-\t\tdev_err(ipcdev->dev, \"IPC failed: %s, IPC_STS=0x%x\\n\",\n-\t\t\tipc_err_string(errcode), status);\n-\t\treturn -EIO;\n-\t}\n+\tcmd_list[0] |= CMD_RUN | cmd_list[1] << CMD_PARA1_SHIFT |\n+\t\tcmd_list[2] << CMD_PARA1_SHIFT;\n \n \treturn 0;\n }\n \n-/**\n- * intel_punit_ipc_simple_command() - Simple IPC command\n- * @cmd:\tIPC command code.\n- * @para1:\tFirst 8bit parameter, set 0 if not used.\n- * @para2:\tSecond 8bit parameter, set 0 if not used.\n- *\n- * Send a IPC command to P-Unit when there is no data transaction\n- *\n- * Return:\tIPC error code or 0 on success.\n- */\n-int intel_punit_ipc_simple_command(int cmd, int para1, int para2)\n-{\n-\tIPC_DEV *ipcdev = punit_ipcdev;\n-\tIPC_TYPE type;\n-\tu32 val;\n-\tint ret;\n-\n-\tmutex_lock(&ipcdev->lock);\n-\n-\treinit_completion(&ipcdev->cmd_complete);\n-\ttype = (cmd & IPC_PUNIT_CMD_TYPE_MASK) >> IPC_TYPE_OFFSET;\n-\n-\tval = cmd & ~IPC_PUNIT_CMD_TYPE_MASK;\n-\tval |= CMD_RUN | para2 << CMD_PARA2_SHIFT | para1 << CMD_PARA1_SHIFT;\n-\tipc_write_cmd(ipcdev, type, val);\n-\tret = intel_punit_ipc_check_status(ipcdev, type);\n-\n-\tmutex_unlock(&ipcdev->lock);\n-\n-\treturn ret;\n-}\n-EXPORT_SYMBOL(intel_punit_ipc_simple_command);\n-\n-/**\n- * intel_punit_ipc_command() - IPC command with data and pointers\n- * @cmd:\tIPC command code.\n- * @para1:\tFirst 8bit parameter, set 0 if not used.\n- * @para2:\tSecond 8bit parameter, set 0 if not used.\n- * @in:\t\tInput data, 32bit for BIOS cmd, two 32bit for GTD and ISPD.\n- * @out:\tOutput data.\n- *\n- * Send a IPC command to P-Unit with data transaction\n- *\n- * Return:\tIPC error code or 0 on success.\n- */\n-int intel_punit_ipc_command(u32 cmd, u32 para1, u32 para2, u32 *in, u32 *out)\n-{\n-\tIPC_DEV *ipcdev = punit_ipcdev;\n-\tIPC_TYPE type;\n-\tu32 val;\n-\tint ret;\n-\n-\tmutex_lock(&ipcdev->lock);\n-\n-\treinit_completion(&ipcdev->cmd_complete);\n-\ttype = (cmd & IPC_PUNIT_CMD_TYPE_MASK) >> IPC_TYPE_OFFSET;\n-\n-\tif (in) {\n-\t\tipc_write_data_low(ipcdev, type, *in);\n-\t\tif (type == GTDRIVER_IPC || type == ISPDRIVER_IPC)\n-\t\t\tipc_write_data_high(ipcdev, type, *++in);\n-\t}\n-\n-\tval = cmd & ~IPC_PUNIT_CMD_TYPE_MASK;\n-\tval |= CMD_RUN | para2 << CMD_PARA2_SHIFT | para1 << CMD_PARA1_SHIFT;\n-\tipc_write_cmd(ipcdev, type, val);\n-\n-\tret = intel_punit_ipc_check_status(ipcdev, type);\n-\tif (ret)\n-\t\tgoto out;\n-\n-\tif (out) {\n-\t\t*out = ipc_read_data_low(ipcdev, type);\n-\t\tif (type == GTDRIVER_IPC || type == ISPDRIVER_IPC)\n-\t\t\t*++out = ipc_read_data_high(ipcdev, type);\n-\t}\n-\n-out:\n-\tmutex_unlock(&ipcdev->lock);\n-\treturn ret;\n-}\n-EXPORT_SYMBOL_GPL(intel_punit_ipc_command);\n-\n-static irqreturn_t intel_punit_ioc(int irq, void *dev_id)\n+/* Input data, 32bit for BIOS cmd, two 32bit for GTD and ISPD. */\n+int pre_raw_cmd_fn(u32 *cmd_list, u32 cmdlen, u8 *in, u32 inlen, u32 *out,\n+\t\tu32 outlen, u32 dptr, u32 sptr)\n {\n-\tIPC_DEV *ipcdev = dev_id;\n-\n-\tcomplete(&ipcdev->cmd_complete);\n-\treturn IRQ_HANDLED;\n+\treturn pre_simple_cmd_fn(cmd_list, cmdlen);\n }\n \n static int intel_punit_get_bars(struct platform_device *pdev)\n@@ -282,9 +137,71 @@ static int intel_punit_get_bars(struct platform_device *pdev)\n \treturn 0;\n }\n \n+static int punit_ipc_err_code(int status)\n+{\n+\treturn (status & CMD_ERRCODE_MASK);\n+}\n+\n+static int punit_ipc_busy_check(int status)\n+{\n+\treturn status | CMD_RUN;\n+}\n+\n+static struct intel_ipc_dev *intel_punit_ipc_dev_create(struct device *dev,\n+\t\tconst char *devname,\n+\t\tint irq,\n+\t\tvoid __iomem *base,\n+\t\tvoid __iomem *data)\n+{\n+\tstruct intel_ipc_dev_ops *ops;\n+\tstruct intel_ipc_dev_cfg *cfg;\n+\tstruct regmap *cmd_regs, *data_regs;\n+\n+ cfg = devm_kzalloc(dev, sizeof(*cfg), GFP_KERNEL);\n+ if (!cfg)\n+ return ERR_PTR(-ENOMEM);\n+\n+\tops = devm_kzalloc(dev, sizeof(*ops), GFP_KERNEL);\n+\tif (!ops)\n+\t\treturn ERR_PTR(-ENOMEM);\n+\n+ cmd_regs = devm_regmap_init_mmio_clk(dev, NULL, base,\n+\t\t\t&punit_regmap_config);\n+ if (IS_ERR(cmd_regs)) {\n+ dev_err(dev, \"cmd_regs regmap init failed\\n\");\n+ return ERR_CAST(cmd_regs);;\n+ }\n+\n+ data_regs = devm_regmap_init_mmio_clk(dev, NULL, data,\n+\t\t\t&punit_regmap_config);\n+ if (IS_ERR(data_regs)) {\n+ dev_err(dev, \"data_regs regmap init failed\\n\");\n+ return ERR_CAST(data_regs);;\n+ }\n+\n+\t/* set IPC dev ops */\n+\tops->to_err_code = punit_ipc_err_code;\n+\tops->busy_check = punit_ipc_busy_check;\n+\tops->pre_simple_cmd_fn = pre_simple_cmd_fn;\n+\tops->pre_raw_cmd_fn = pre_raw_cmd_fn;\n+\n+\tif (irq > 0)\n+\t cfg->mode = IPC_DEV_MODE_IRQ;\n+\telse\n+\t cfg->mode = IPC_DEV_MODE_POLLING;\n+\n+\tcfg->chan_type = IPC_CHANNEL_IA_PUNIT;\n+\tcfg->irq = irq;\n+\tcfg->irqflags = IRQF_NO_SUSPEND | IRQF_SHARED;\n+\tcfg->cmd_regs = cmd_regs;\n+\tcfg->data_regs = data_regs;\n+\n+\treturn devm_intel_ipc_dev_create(dev, devname, cfg, ops);\n+}\n+\n static int intel_punit_ipc_probe(struct platform_device *pdev)\n {\n-\tint irq, ret;\n+\tint irq, ret, i;\n \n \tpunit_ipcdev = devm_kzalloc(&pdev->dev,\n \t\t\t\t sizeof(*punit_ipcdev), GFP_KERNEL);\n@@ -294,35 +211,30 @@ static int intel_punit_ipc_probe(struct platform_device *pdev)\n \tplatform_set_drvdata(pdev, punit_ipcdev);\n \n \tirq = platform_get_irq(pdev, 0);\n-\tif (irq < 0) {\n-\t\tpunit_ipcdev->irq = 0;\n-\t\tdev_warn(&pdev->dev, \"Invalid IRQ, using polling mode\\n\");\n-\t} else {\n-\t\tret = devm_request_irq(&pdev->dev, irq, intel_punit_ioc,\n-\t\t\t\t IRQF_NO_SUSPEND, \"intel_punit_ipc\",\n-\t\t\t\t &punit_ipcdev);\n-\t\tif (ret) {\n-\t\t\tdev_err(&pdev->dev, \"Failed to request irq: %d\\n\", irq);\n-\t\t\treturn ret;\n-\t\t}\n-\t\tpunit_ipcdev->irq = irq;\n-\t}\n \n \tret = intel_punit_get_bars(pdev);\n \tif (ret)\n-\t\tgoto out;\n+\t\treturn ret;\n+\n+\tfor (i = 0; i < RESERVED_IPC; i++) {\n+\t\tpunit_ipcdev->ipc_dev[i] = intel_punit_ipc_dev_create(\n+\t\t\t\t&pdev->dev,\n+\t\t\t\tipc_dev_name[i],\n+\t\t\t\tirq,\n+\t\t\t\tpunit_ipcdev->base[i][BASE_IFACE],\n+\t\t\t\tpunit_ipcdev->base[i][BASE_DATA]);\n+\n+\t\tif (IS_ERR(punit_ipcdev->ipc_dev[i])) {\n+\t\t\tdev_err(&pdev->dev, \"%s create failed\\n\",\n+\t\t\t\t\tipc_dev_name[i]);\n+\t\t\treturn PTR_ERR(punit_ipcdev->ipc_dev[i]);\n+\t\t}\n+\t}\n \n \tpunit_ipcdev->dev = &pdev->dev;\n-\tmutex_init(&punit_ipcdev->lock);\n-\tinit_completion(&punit_ipcdev->cmd_complete);\n \n-out:\n \treturn ret;\n-}\n \n-static int intel_punit_ipc_remove(struct platform_device *pdev)\n-{\n-\treturn 0;\n }\n \n static const struct acpi_device_id punit_ipc_acpi_ids[] = {\n@@ -332,7 +244,6 @@ static const struct acpi_device_id punit_ipc_acpi_ids[] = {\n \n static struct platform_driver intel_punit_ipc_driver = {\n \t.probe = intel_punit_ipc_probe,\n-\t.remove = intel_punit_ipc_remove,\n \t.driver = {\n \t\t.name = \"intel_punit_ipc\",\n \t\t.acpi_match_table = ACPI_PTR(punit_ipc_acpi_ids),\ndiff --git a/drivers/platform/x86/intel_telemetry_pltdrv.c b/drivers/platform/x86/intel_telemetry_pltdrv.c\nindex 6ebdbd2..22c4ba9 100644\n--- a/drivers/platform/x86/intel_telemetry_pltdrv.c\n+++ b/drivers/platform/x86/intel_telemetry_pltdrv.c\n@@ -99,6 +99,7 @@ struct telem_ssram_region {\n };\n \n static struct telemetry_plt_config *telm_conf;\n+static struct intel_ipc_dev *punit_bios_ipc_dev;\n \n /*\n * The following counters are programmed by default during setup.\n@@ -128,7 +129,6 @@ static struct telemetry_evtmap\n \t{\"PMC_S0IX_BLOCK_IPS_CLOCKS\", 0x600B},\n };\n \n-\n static struct telemetry_evtmap\n \ttelemetry_apl_pss_default_events[TELEM_MAX_OS_ALLOCATED_EVENTS] = {\n \t{\"IA_CORE0_C6_RES\",\t\t\t0x0400},\n@@ -249,13 +249,12 @@ static inline int telemetry_plt_config_ioss_event(u32 evt_id, int index)\n static inline int telemetry_plt_config_pss_event(u32 evt_id, int index)\n {\n \tu32 write_buf;\n-\tint ret;\n+\tu32 cmd[PUNIT_PARAM_LEN] = {0};\n \n \twrite_buf = evt_id | TELEM_EVENT_ENABLE;\n-\tret = intel_punit_ipc_command(IPC_PUNIT_BIOS_WRITE_TELE_EVENT,\n-\t\t\t\t index, 0, &write_buf, NULL);\n-\n-\treturn ret;\n+\tpunit_cmd_init(cmd, IPC_PUNIT_BIOS_WRITE_TELE_EVENT, index, 0);\n+\treturn ipc_dev_raw_cmd(punit_bios_ipc_dev, cmd, PUNIT_PARAM_LEN,\n+\t\t\t(u8 *)&write_buf, sizeof(write_buf), NULL, 0, 0, 0);\n }\n \n static int telemetry_setup_iossevtconfig(struct telemetry_evtconfig evtconfig,\n@@ -401,6 +400,7 @@ static int telemetry_setup_pssevtconfig(struct telemetry_evtconfig evtconfig,\n \tint ret, index, idx;\n \tu32 *pss_evtmap;\n \tu32 telem_ctrl;\n+\tu32 cmd[PUNIT_PARAM_LEN] = {0};\n \n \tnum_pss_evts = evtconfig.num_evts;\n \tpss_period = evtconfig.period;\n@@ -408,8 +408,9 @@ static int telemetry_setup_pssevtconfig(struct telemetry_evtconfig evtconfig,\n \n \t/* PSS Config */\n \t/* Get telemetry EVENT CTL */\n-\tret = intel_punit_ipc_command(IPC_PUNIT_BIOS_READ_TELE_EVENT_CTRL,\n-\t\t\t\t 0, 0, NULL, &telem_ctrl);\n+\tpunit_cmd_init(cmd, IPC_PUNIT_BIOS_READ_TELE_EVENT_CTRL, 0, 0);\n+\tret = ipc_dev_raw_cmd(punit_bios_ipc_dev, cmd, PUNIT_PARAM_LEN, NULL,\n+\t\t\t0, &telem_ctrl, 1, 0, 0);\n \tif (ret) {\n \t\tpr_err(\"PSS TELEM_CTRL Read Failed\\n\");\n \t\treturn ret;\n@@ -417,8 +418,9 @@ static int telemetry_setup_pssevtconfig(struct telemetry_evtconfig evtconfig,\n \n \t/* Disable Telemetry */\n \tTELEM_DISABLE(telem_ctrl);\n-\tret = intel_punit_ipc_command(IPC_PUNIT_BIOS_WRITE_TELE_EVENT_CTRL,\n-\t\t\t\t 0, 0, &telem_ctrl, NULL);\n+\tpunit_cmd_init(cmd, IPC_PUNIT_BIOS_WRITE_TELE_EVENT_CTRL, 0, 0);\n+\tret = ipc_dev_raw_cmd(punit_bios_ipc_dev, cmd, PUNIT_PARAM_LEN,\n+\t\t\t(u8 *)&telem_ctrl, sizeof(telem_ctrl), NULL, 0, 0, 0);\n \tif (ret) {\n \t\tpr_err(\"PSS TELEM_CTRL Event Disable Write Failed\\n\");\n \t\treturn ret;\n@@ -429,9 +431,10 @@ static int telemetry_setup_pssevtconfig(struct telemetry_evtconfig evtconfig,\n \t\t/* Clear All Events */\n \t\tTELEM_CLEAR_EVENTS(telem_ctrl);\n \n-\t\tret = intel_punit_ipc_command(\n-\t\t\t\tIPC_PUNIT_BIOS_WRITE_TELE_EVENT_CTRL,\n-\t\t\t\t0, 0, &telem_ctrl, NULL);\n+\t\tpunit_cmd_init(cmd, IPC_PUNIT_BIOS_WRITE_TELE_EVENT_CTRL, 0, 0);\n+\t\tret = ipc_dev_raw_cmd(punit_bios_ipc_dev, cmd, PUNIT_PARAM_LEN,\n+\t\t\t\t(u8 *)&telem_ctrl, sizeof(telem_ctrl), NULL,\n+\t\t\t\t0, 0, 0);\n \t\tif (ret) {\n \t\t\tpr_err(\"PSS TELEM_CTRL Event Disable Write Failed\\n\");\n \t\t\treturn ret;\n@@ -455,9 +458,10 @@ static int telemetry_setup_pssevtconfig(struct telemetry_evtconfig evtconfig,\n \t\t/* Clear All Events */\n \t\tTELEM_CLEAR_EVENTS(telem_ctrl);\n \n-\t\tret = intel_punit_ipc_command(\n-\t\t\t\tIPC_PUNIT_BIOS_WRITE_TELE_EVENT_CTRL,\n-\t\t\t\t0, 0, &telem_ctrl, NULL);\n+\t\tpunit_cmd_init(cmd, IPC_PUNIT_BIOS_WRITE_TELE_EVENT_CTRL, 0, 0);\n+\t\tret = ipc_dev_raw_cmd(punit_bios_ipc_dev, cmd, PUNIT_PARAM_LEN,\n+\t\t\t\t(u8 *)&telem_ctrl, sizeof(telem_ctrl), NULL,\n+\t\t\t\t0, 0, 0);\n \t\tif (ret) {\n \t\t\tpr_err(\"PSS TELEM_CTRL Event Disable Write Failed\\n\");\n \t\t\treturn ret;\n@@ -506,8 +510,9 @@ static int telemetry_setup_pssevtconfig(struct telemetry_evtconfig evtconfig,\n \tTELEM_ENABLE_PERIODIC(telem_ctrl);\n \ttelem_ctrl |= pss_period;\n \n-\tret = intel_punit_ipc_command(IPC_PUNIT_BIOS_WRITE_TELE_EVENT_CTRL,\n-\t\t\t\t 0, 0, &telem_ctrl, NULL);\n+\tpunit_cmd_init(cmd, IPC_PUNIT_BIOS_WRITE_TELE_EVENT_CTRL, 0, 0);\n+\tret = ipc_dev_raw_cmd(punit_bios_ipc_dev, cmd, PUNIT_PARAM_LEN,\n+\t\t\t(u8 *)&telem_ctrl, sizeof(telem_ctrl), NULL, 0, 0, 0);\n \tif (ret) {\n \t\tpr_err(\"PSS TELEM_CTRL Event Enable Write Failed\\n\");\n \t\treturn ret;\n@@ -567,6 +572,7 @@ static int telemetry_setup(struct platform_device *pdev)\n {\n \tstruct telemetry_evtconfig pss_evtconfig, ioss_evtconfig;\n \tu32 read_buf, events, event_regs;\n+\tu32 cmd[PUNIT_PARAM_LEN] = {0};\n \tint ret;\n \n \tret = intel_pmc_ipc_command(PMC_IPC_PMC_TELEMTRY, IOSS_TELEM_INFO_READ,\n@@ -592,8 +598,9 @@ static int telemetry_setup(struct platform_device *pdev)\n \ttelm_conf->ioss_config.max_period = TELEM_MAX_PERIOD(read_buf);\n \n \t/* PUNIT Mailbox Setup */\n-\tret = intel_punit_ipc_command(IPC_PUNIT_BIOS_READ_TELE_INFO, 0, 0,\n-\t\t\t\t NULL, &read_buf);\n+\tpunit_cmd_init(cmd, IPC_PUNIT_BIOS_READ_TELE_INFO, 0, 0);\n+\tret = ipc_dev_raw_cmd(punit_bios_ipc_dev, cmd, PUNIT_PARAM_LEN,\n+\t\t\tNULL, 0, &read_buf, 1, 0, 0);\n \tif (ret) {\n \t\tdev_err(&pdev->dev, \"PSS TELEM_INFO Read Failed\\n\");\n \t\treturn ret;\n@@ -661,6 +668,7 @@ static int telemetry_plt_set_sampling_period(u8 pss_period, u8 ioss_period)\n {\n \tu32 telem_ctrl = 0;\n \tint ret = 0;\n+\tu32 cmd[PUNIT_PARAM_LEN] = {0};\n \n \tmutex_lock(&(telm_conf->telem_lock));\n \tif (ioss_period) {\n@@ -718,9 +726,9 @@ static int telemetry_plt_set_sampling_period(u8 pss_period, u8 ioss_period)\n \t\t}\n \n \t\t/* Get telemetry EVENT CTL */\n-\t\tret = intel_punit_ipc_command(\n-\t\t\t\tIPC_PUNIT_BIOS_READ_TELE_EVENT_CTRL,\n-\t\t\t\t0, 0, NULL, &telem_ctrl);\n+\t\tpunit_cmd_init(cmd, IPC_PUNIT_BIOS_READ_TELE_EVENT_CTRL, 0, 0);\n+\t\tret = ipc_dev_raw_cmd(punit_bios_ipc_dev, cmd, PUNIT_PARAM_LEN,\n+\t\t\t\tNULL, 0, &telem_ctrl, 1, 0, 0);\n \t\tif (ret) {\n \t\t\tpr_err(\"PSS TELEM_CTRL Read Failed\\n\");\n \t\t\tgoto out;\n@@ -728,9 +736,11 @@ static int telemetry_plt_set_sampling_period(u8 pss_period, u8 ioss_period)\n \n \t\t/* Disable Telemetry */\n \t\tTELEM_DISABLE(telem_ctrl);\n-\t\tret = intel_punit_ipc_command(\n-\t\t\t\tIPC_PUNIT_BIOS_WRITE_TELE_EVENT_CTRL,\n-\t\t\t\t0, 0, &telem_ctrl, NULL);\n+\t\tpunit_cmd_init(cmd, IPC_PUNIT_BIOS_WRITE_TELE_EVENT_CTRL, 0,\n+\t\t\t\t0);\n+\t\tret = ipc_dev_raw_cmd(punit_bios_ipc_dev, cmd, PUNIT_PARAM_LEN,\n+\t\t\t\t(u8 *)&telem_ctrl, sizeof(telem_ctrl), NULL,\n+\t\t\t\t0, 0, 0);\n \t\tif (ret) {\n \t\t\tpr_err(\"PSS TELEM_CTRL Event Disable Write Failed\\n\");\n \t\t\tgoto out;\n@@ -742,9 +752,11 @@ static int telemetry_plt_set_sampling_period(u8 pss_period, u8 ioss_period)\n \t\tTELEM_ENABLE_PERIODIC(telem_ctrl);\n \t\ttelem_ctrl |= pss_period;\n \n-\t\tret = intel_punit_ipc_command(\n-\t\t\t\tIPC_PUNIT_BIOS_WRITE_TELE_EVENT_CTRL,\n-\t\t\t\t0, 0, &telem_ctrl, NULL);\n+\t\tpunit_cmd_init(cmd, IPC_PUNIT_BIOS_WRITE_TELE_EVENT_CTRL, 0,\n+\t\t\t\t0);\n+\t\tret = ipc_dev_raw_cmd(punit_bios_ipc_dev, cmd, PUNIT_PARAM_LEN,\n+\t\t\t\t(u8 *)&telem_ctrl, sizeof(telem_ctrl), NULL,\n+\t\t\t\t0, 0, 0);\n \t\tif (ret) {\n \t\t\tpr_err(\"PSS TELEM_CTRL Event Enable Write Failed\\n\");\n \t\t\tgoto out;\n@@ -979,6 +991,7 @@ static int telemetry_plt_get_trace_verbosity(enum telemetry_unit telem_unit,\n {\n \tu32 temp = 0;\n \tint ret;\n+\tu32 cmd[PUNIT_PARAM_LEN] = {0};\n \n \tif (verbosity == NULL)\n \t\treturn -EINVAL;\n@@ -986,9 +999,9 @@ static int telemetry_plt_get_trace_verbosity(enum telemetry_unit telem_unit,\n \tmutex_lock(&(telm_conf->telem_trace_lock));\n \tswitch (telem_unit) {\n \tcase TELEM_PSS:\n-\t\tret = intel_punit_ipc_command(\n-\t\t\t\tIPC_PUNIT_BIOS_READ_TELE_TRACE_CTRL,\n-\t\t\t\t0, 0, NULL, &temp);\n+\t\tpunit_cmd_init(cmd, IPC_PUNIT_BIOS_READ_TELE_TRACE_CTRL, 0, 0);\n+\t\tret = ipc_dev_raw_cmd(punit_bios_ipc_dev, cmd, PUNIT_PARAM_LEN,\n+\t\t\t\tNULL, 0, &temp, 1, 0, 0);\n \t\tif (ret) {\n \t\t\tpr_err(\"PSS TRACE_CTRL Read Failed\\n\");\n \t\t\tgoto out;\n@@ -1024,15 +1037,16 @@ static int telemetry_plt_set_trace_verbosity(enum telemetry_unit telem_unit,\n {\n \tu32 temp = 0;\n \tint ret;\n+\tu32 cmd[PUNIT_PARAM_LEN] = {0};\n \n \tverbosity &= TELEM_TRC_VERBOSITY_MASK;\n \n \tmutex_lock(&(telm_conf->telem_trace_lock));\n \tswitch (telem_unit) {\n \tcase TELEM_PSS:\n-\t\tret = intel_punit_ipc_command(\n-\t\t\t\tIPC_PUNIT_BIOS_READ_TELE_TRACE_CTRL,\n-\t\t\t\t0, 0, NULL, &temp);\n+\t\tpunit_cmd_init(cmd, IPC_PUNIT_BIOS_READ_TELE_TRACE_CTRL, 0, 0);\n+\t\tret = ipc_dev_raw_cmd(punit_bios_ipc_dev, cmd, PUNIT_PARAM_LEN,\n+\t\t\t\tNULL, 0, &temp, 1, 0, 0);\n \t\tif (ret) {\n \t\t\tpr_err(\"PSS TRACE_CTRL Read Failed\\n\");\n \t\t\tgoto out;\n@@ -1040,10 +1054,10 @@ static int telemetry_plt_set_trace_verbosity(enum telemetry_unit telem_unit,\n \n \t\tTELEM_CLEAR_VERBOSITY_BITS(temp);\n \t\tTELEM_SET_VERBOSITY_BITS(temp, verbosity);\n-\n-\t\tret = intel_punit_ipc_command(\n-\t\t\t\tIPC_PUNIT_BIOS_WRITE_TELE_TRACE_CTRL,\n-\t\t\t\t0, 0, &temp, NULL);\n+\t\tpunit_cmd_init(cmd, IPC_PUNIT_BIOS_WRITE_TELE_EVENT_CTRL,\n+\t\t\t\t0, 0);\n+\t\tret = ipc_dev_raw_cmd(punit_bios_ipc_dev, cmd, PUNIT_PARAM_LEN,\n+\t\t\t\t(u8 *)&temp, sizeof(temp), NULL, 0, 0, 0);\n \t\tif (ret) {\n \t\t\tpr_err(\"PSS TRACE_CTRL Verbosity Set Failed\\n\");\n \t\t\tgoto out;\n@@ -1105,6 +1119,10 @@ static int telemetry_pltdrv_probe(struct platform_device *pdev)\n \tif (!id)\n \t\treturn -ENODEV;\n \n+\tpunit_bios_ipc_dev = intel_ipc_dev_get(PUNIT_BIOS_IPC_DEV);\n+\tif (IS_ERR_OR_NULL(punit_bios_ipc_dev))\n+\t\treturn PTR_ERR(punit_bios_ipc_dev);\n+\n \ttelm_conf = (struct telemetry_plt_config *)id->driver_data;\n \n \tres0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);\n", "prefixes": [ "RFC", "v3", "5/7" ] }