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{
    "id": 809928,
    "url": "http://patchwork.ozlabs.org/api/patches/809928/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/rtc-linux/patch/afcb57a5fe67cc2b5cb3c28328da11dd7727e5cd.1504588701.git.sathyanarayanan.kuppuswamy@linux.intel.com/",
    "project": {
        "id": 9,
        "url": "http://patchwork.ozlabs.org/api/projects/9/?format=api",
        "name": "Linux RTC development",
        "link_name": "rtc-linux",
        "list_id": "linux-rtc.vger.kernel.org",
        "list_email": "linux-rtc@vger.kernel.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<afcb57a5fe67cc2b5cb3c28328da11dd7727e5cd.1504588701.git.sathyanarayanan.kuppuswamy@linux.intel.com>",
    "list_archive_url": null,
    "date": "2017-09-05T05:37:26",
    "name": "[RFC,v3,6/7] platform/x86: intel_pmc_ipc: Use generic Intel IPC device calls",
    "commit_ref": null,
    "pull_url": null,
    "state": "not-applicable",
    "archived": false,
    "hash": "7106b7051e36162f84ad4d0741a389e24ab26a08",
    "submitter": {
        "id": 66129,
        "url": "http://patchwork.ozlabs.org/api/people/66129/?format=api",
        "name": "Kuppuswamy Sathyanarayanan",
        "email": "sathyanarayanan.kuppuswamy@linux.intel.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/rtc-linux/patch/afcb57a5fe67cc2b5cb3c28328da11dd7727e5cd.1504588701.git.sathyanarayanan.kuppuswamy@linux.intel.com/mbox/",
    "series": [
        {
            "id": 1490,
            "url": "http://patchwork.ozlabs.org/api/series/1490/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/rtc-linux/list/?series=1490",
            "date": "2017-09-05T05:37:20",
            "name": "PMC/PUNIT IPC driver cleanup",
            "version": 3,
            "mbox": "http://patchwork.ozlabs.org/series/1490/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/809928/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/809928/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<linux-rtc-owner@vger.kernel.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org",
        "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-rtc-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)",
        "Received": [
            "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xmb9q6TdJz9sP3\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue,  5 Sep 2017 15:38:55 +1000 (AEST)",
            "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1754167AbdIEFif (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tTue, 5 Sep 2017 01:38:35 -0400",
            "from mga01.intel.com ([192.55.52.88]:6025 \"EHLO mga01.intel.com\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1754115AbdIEFiQ (ORCPT <rfc822;linux-rtc@vger.kernel.org>);\n\tTue, 5 Sep 2017 01:38:16 -0400",
            "from orsmga005.jf.intel.com ([10.7.209.41])\n\tby fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t04 Sep 2017 22:38:13 -0700",
            "from skuppusw-desk.jf.intel.com ([10.7.198.92])\n\tby orsmga005.jf.intel.com with ESMTP; 04 Sep 2017 22:38:13 -0700"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.41,478,1498546800\"; d=\"scan'208\";a=\"145505109\"",
        "From": "sathyanarayanan.kuppuswamy@linux.intel.com",
        "To": "a.zummo@towertech.it, x86@kernel.org, wim@iguana.be,\n\tmingo@redhat.com, alexandre.belloni@free-electrons.com,\n\tqipeng.zha@intel.com, hpa@zytor.com, dvhart@infradead.org,\n\ttglx@linutronix.de, lee.jones@linaro.org, andy@infradead.org,\n\tsouvik.k.chakravarty@intel.com",
        "Cc": "linux-rtc@vger.kernel.org, linux-watchdog@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org,\n\tsathyaosid@gmail.com, Kuppuswamy Sathyanarayanan \n\t<sathyanarayanan.kuppuswamy@linux.intel.com>",
        "Subject": "[RFC v3 6/7] platform/x86: intel_pmc_ipc: Use generic Intel IPC\n\tdevice calls",
        "Date": "Mon,  4 Sep 2017 22:37:26 -0700",
        "Message-Id": "<afcb57a5fe67cc2b5cb3c28328da11dd7727e5cd.1504588701.git.sathyanarayanan.kuppuswamy@linux.intel.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": "<cover.1504588701.git.sathyanarayanan.kuppuswamy@linux.intel.com>",
        "References": "<cover.1504588701.git.sathyanarayanan.kuppuswamy@linux.intel.com>",
        "Sender": "linux-rtc-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<linux-rtc.vger.kernel.org>",
        "X-Mailing-List": "linux-rtc@vger.kernel.org"
    },
    "content": "From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>\n\nRemoved redundant IPC helper functions and refactored the driver to use\ngeneric IPC device driver APIs. Also, cleaned up the driver to minimize\nthe usage of global variable ipcdev by propogating the struct\nintel_pmc_ipc_dev pointer or by getting it from device private data.\n\nThis patch also cleans-up PMC IPC user drivers to use APIs provided\nby generic IPC driver.\n\nSigned-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>\n---\n arch/x86/include/asm/intel_pmc_ipc.h          |  37 +--\n drivers/mfd/intel_soc_pmic_bxtwc.c            |  18 +-\n drivers/platform/x86/intel_pmc_ipc.c          | 406 ++++++++++----------------\n drivers/platform/x86/intel_telemetry_pltdrv.c | 118 ++++----\n include/linux/mfd/intel_soc_pmic.h            |   2 +\n 5 files changed, 238 insertions(+), 343 deletions(-)\n\nChanges since v1:\n * Removed custom APIs.\n * Cleaned up PMC IPC user drivers to use APIs provided by generic\n   IPC driver.",
    "diff": "diff --git a/arch/x86/include/asm/intel_pmc_ipc.h b/arch/x86/include/asm/intel_pmc_ipc.h\nindex fac89eb..9fc7c3c 100644\n--- a/arch/x86/include/asm/intel_pmc_ipc.h\n+++ b/arch/x86/include/asm/intel_pmc_ipc.h\n@@ -1,10 +1,15 @@\n #ifndef _ASM_X86_INTEL_PMC_IPC_H_\n #define  _ASM_X86_INTEL_PMC_IPC_H_\n \n+#include <linux/platform_data/x86/intel_ipc_dev.h>\n+\n+#define INTEL_PMC_IPC_DEV\t\t\"intel_pmc_ipc\"\n+#define PMC_PARAM_LEN\t\t\t2\n+\n /* Commands */\n #define PMC_IPC_PMIC_ACCESS\t\t0xFF\n-#define\t\tPMC_IPC_PMIC_ACCESS_READ\t0x0\n-#define\t\tPMC_IPC_PMIC_ACCESS_WRITE\t0x1\n+#define\tPMC_IPC_PMIC_ACCESS_READ\t0x0\n+#define\tPMC_IPC_PMIC_ACCESS_WRITE\t0x1\n #define PMC_IPC_USB_PWR_CTRL\t\t0xF0\n #define PMC_IPC_PMIC_BLACKLIST_SEL\t0xEF\n #define PMC_IPC_PHY_CONFIG\t\t0xEE\n@@ -28,13 +33,14 @@\n #define PMC_GCR_TELEM_DEEP_S0IX_REG\t0x78\n #define PMC_GCR_TELEM_SHLW_S0IX_REG\t0x80\n \n+static inline void pmc_cmd_init(u32 *cmd, u32 param1, u32 param2)\n+{\n+\tcmd[0] = param1;\n+\tcmd[1] = param2;\n+}\n+\n #if IS_ENABLED(CONFIG_INTEL_PMC_IPC)\n \n-int intel_pmc_ipc_simple_command(int cmd, int sub);\n-int intel_pmc_ipc_raw_cmd(u32 cmd, u32 sub, u8 *in, u32 inlen,\n-\t\tu32 *out, u32 outlen, u32 dptr, u32 sptr);\n-int intel_pmc_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen,\n-\t\tu32 *out, u32 outlen);\n int intel_pmc_s0ix_counter_read(u64 *data);\n int intel_pmc_gcr_read(u32 offset, u32 *data);\n int intel_pmc_gcr_write(u32 offset, u32 data);\n@@ -42,23 +48,6 @@ int intel_pmc_gcr_update(u32 offset, u32 mask, u32 val);\n \n #else\n \n-static inline int intel_pmc_ipc_simple_command(int cmd, int sub)\n-{\n-\treturn -EINVAL;\n-}\n-\n-static inline int intel_pmc_ipc_raw_cmd(u32 cmd, u32 sub, u8 *in, u32 inlen,\n-\t\tu32 *out, u32 outlen, u32 dptr, u32 sptr)\n-{\n-\treturn -EINVAL;\n-}\n-\n-static inline int intel_pmc_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen,\n-\t\tu32 *out, u32 outlen)\n-{\n-\treturn -EINVAL;\n-}\n-\n static inline int intel_pmc_s0ix_counter_read(u64 *data)\n {\n \treturn -EINVAL;\ndiff --git a/drivers/mfd/intel_soc_pmic_bxtwc.c b/drivers/mfd/intel_soc_pmic_bxtwc.c\nindex 15bc052..ea60049 100644\n--- a/drivers/mfd/intel_soc_pmic_bxtwc.c\n+++ b/drivers/mfd/intel_soc_pmic_bxtwc.c\n@@ -271,6 +271,8 @@ static int regmap_ipc_byte_reg_read(void *context, unsigned int reg,\n \tu8 ipc_in[2];\n \tu8 ipc_out[4];\n \tstruct intel_soc_pmic *pmic = context;\n+\tu32 cmd[PMC_PARAM_LEN] = {PMC_IPC_PMIC_ACCESS,\n+\t\tPMC_IPC_PMIC_ACCESS_READ};\n \n \tif (!pmic)\n \t\treturn -EINVAL;\n@@ -284,9 +286,8 @@ static int regmap_ipc_byte_reg_read(void *context, unsigned int reg,\n \n \tipc_in[0] = reg;\n \tipc_in[1] = i2c_addr;\n-\tret = intel_pmc_ipc_command(PMC_IPC_PMIC_ACCESS,\n-\t\t\tPMC_IPC_PMIC_ACCESS_READ,\n-\t\t\tipc_in, sizeof(ipc_in), (u32 *)ipc_out, 1);\n+\tret = ipc_dev_raw_cmd(pmic->ipc_dev, cmd, PMC_PARAM_LEN, ipc_in,\n+\t\t\tsizeof(ipc_in), (u32 *)ipc_out, 1, 0, 0);\n \tif (ret) {\n \t\tdev_err(pmic->dev, \"Failed to read from PMIC\\n\");\n \t\treturn ret;\n@@ -303,6 +304,8 @@ static int regmap_ipc_byte_reg_write(void *context, unsigned int reg,\n \tint i2c_addr;\n \tu8 ipc_in[3];\n \tstruct intel_soc_pmic *pmic = context;\n+\tu32 cmd[PMC_PARAM_LEN] = {PMC_IPC_PMIC_ACCESS,\n+\t\tPMC_IPC_PMIC_ACCESS_WRITE};\n \n \tif (!pmic)\n \t\treturn -EINVAL;\n@@ -317,9 +320,8 @@ static int regmap_ipc_byte_reg_write(void *context, unsigned int reg,\n \tipc_in[0] = reg;\n \tipc_in[1] = i2c_addr;\n \tipc_in[2] = val;\n-\tret = intel_pmc_ipc_command(PMC_IPC_PMIC_ACCESS,\n-\t\t\tPMC_IPC_PMIC_ACCESS_WRITE,\n-\t\t\tipc_in, sizeof(ipc_in), NULL, 0);\n+\tret = ipc_dev_raw_cmd(pmic->ipc_dev, cmd, PMC_PARAM_LEN, ipc_in,\n+\t\t\tsizeof(ipc_in), NULL, 0, 0, 0);\n \tif (ret) {\n \t\tdev_err(pmic->dev, \"Failed to write to PMIC\\n\");\n \t\treturn ret;\n@@ -445,6 +447,10 @@ static int bxtwc_probe(struct platform_device *pdev)\n \tif (!pmic)\n \t\treturn -ENOMEM;\n \n+\tpmic->ipc_dev = intel_ipc_dev_get(INTEL_PMC_IPC_DEV);\n+\tif (IS_ERR_OR_NULL(pmic->ipc_dev))\n+\t\treturn PTR_ERR(pmic->ipc_dev);\n+\n \tret = platform_get_irq(pdev, 0);\n \tif (ret < 0) {\n \t\tdev_err(&pdev->dev, \"Invalid IRQ\\n\");\ndiff --git a/drivers/platform/x86/intel_pmc_ipc.c b/drivers/platform/x86/intel_pmc_ipc.c\nindex 40a25f8..c059676 100644\n--- a/drivers/platform/x86/intel_pmc_ipc.c\n+++ b/drivers/platform/x86/intel_pmc_ipc.c\n@@ -47,18 +47,8 @@\n  * The ARC handles the interrupt and services it, writing optional data to\n  * the IPC1 registers, updates the IPC_STS response register with the status.\n  */\n-#define IPC_CMD\t\t\t0x0\n-#define\t\tIPC_CMD_MSI\t\t0x100\n #define\t\tIPC_CMD_SIZE\t\t16\n #define\t\tIPC_CMD_SUBCMD\t\t12\n-#define IPC_STATUS\t\t0x04\n-#define\t\tIPC_STATUS_IRQ\t\t0x4\n-#define\t\tIPC_STATUS_ERR\t\t0x2\n-#define\t\tIPC_STATUS_BUSY\t\t0x1\n-#define IPC_SPTR\t\t0x08\n-#define IPC_DPTR\t\t0x0C\n-#define IPC_WRITE_BUFFER\t0x80\n-#define IPC_READ_BUFFER\t\t0x90\n \n /* Residency with clock rate at 19.2MHz to usecs */\n #define S0IX_RESIDENCY_IN_USECS(d, s)\t\t\\\n@@ -73,11 +63,6 @@\n  */\n #define IPC_DATA_BUFFER_SIZE\t16\n \n-#define IPC_LOOP_CNT\t\t3000000\n-#define IPC_MAX_SEC\t\t3\n-\n-#define IPC_TRIGGER_MODE_IRQ\t\ttrue\n-\n /* exported resources from IFWI */\n #define PLAT_RESOURCE_IPC_INDEX\t\t0\n #define PLAT_RESOURCE_IPC_SIZE\t\t0x1000\n@@ -117,39 +102,40 @@\n #define PMC_CFG_NO_REBOOT_EN\t\t(1 << 4)\n #define PMC_CFG_NO_REBOOT_DIS\t\t(0 << 4)\n \n+/* IPC PMC commands */\n+#define\tIPC_DEV_PMC_CMD_MSI\t\t\tBIT(8)\n+#define\tIPC_DEV_PMC_CMD_SIZE\t\t\t16\n+#define\tIPC_DEV_PMC_CMD_SUBCMD\t\t\t12\n+#define\tIPC_DEV_PMC_CMD_STATUS\t\t\tBIT(2)\n+#define\tIPC_DEV_PMC_CMD_STATUS_IRQ\t\tBIT(2)\n+#define\tIPC_DEV_PMC_CMD_STATUS_ERR\t\tBIT(1)\n+#define\tIPC_DEV_PMC_CMD_STATUS_ERR_MASK\t\tGENMASK(7, 0)\n+#define\tIPC_DEV_PMC_CMD_STATUS_BUSY\t\tBIT(0)\n+\n+/*IPC PMC reg offsets */\n+#define IPC_DEV_PMC_STATUS_OFFSET\t\t0x04\n+#define IPC_DEV_PMC_SPTR_OFFSET\t\t\t0x08\n+#define IPC_DEV_PMC_DPTR_OFFSET\t\t\t0x0C\n+#define IPC_DEV_PMC_WRBUF_OFFSET\t\t0x80\n+#define IPC_DEV_PMC_RBUF_OFFSET\t\t\t0x90\n+\n static struct intel_pmc_ipc_dev {\n \tstruct device *dev;\n+\tstruct intel_ipc_dev *pmc_ipc_dev;\n+\tstruct intel_ipc_dev_ops ops;\n+\tstruct intel_ipc_dev_cfg cfg;\n \tvoid __iomem *ipc_base;\n-\tbool irq_mode;\n-\tint irq;\n-\tint cmd;\n-\tstruct completion cmd_complete;\n \n \t/* gcr */\n \tvoid __iomem *gcr_mem_base;\n \tstruct regmap *gcr_regs;\n \n-\t/* Telemetry */\n-\tu8 telem_res_inval;\n } ipcdev;\n \n-static char *ipc_err_sources[] = {\n-\t[IPC_ERR_NONE] =\n-\t\t\"no error\",\n-\t[IPC_ERR_CMD_NOT_SUPPORTED] =\n-\t\t\"command not supported\",\n-\t[IPC_ERR_CMD_NOT_SERVICED] =\n-\t\t\"command not serviced\",\n-\t[IPC_ERR_UNABLE_TO_SERVICE] =\n-\t\t\"unable to service\",\n-\t[IPC_ERR_CMD_INVALID] =\n-\t\t\"command invalid\",\n-\t[IPC_ERR_CMD_FAILED] =\n-\t\t\"command failed\",\n-\t[IPC_ERR_EMSECURITY] =\n-\t\t\"Invalid Battery\",\n-\t[IPC_ERR_UNSIGNEDKERNEL] =\n-\t\t\"Unsigned kernel\",\n+static struct regmap_config pmc_regmap_config = {\n+        .reg_bits = 32,\n+        .reg_stride = 4,\n+        .val_bits = 32,\n };\n \n static struct regmap_config gcr_regmap_config = {\n@@ -160,40 +146,6 @@ static struct regmap_config gcr_regmap_config = {\n \t.max_register = PLAT_RESOURCE_GCR_SIZE,\n };\n \n-/* Prevent concurrent calls to the PMC */\n-static DEFINE_MUTEX(ipclock);\n-\n-static inline void ipc_send_command(u32 cmd)\n-{\n-\tipcdev.cmd = cmd;\n-\tif (ipcdev.irq_mode) {\n-\t\treinit_completion(&ipcdev.cmd_complete);\n-\t\tcmd |= IPC_CMD_MSI;\n-\t}\n-\twritel(cmd, ipcdev.ipc_base + IPC_CMD);\n-}\n-\n-static inline u32 ipc_read_status(void)\n-{\n-\treturn readl(ipcdev.ipc_base + IPC_STATUS);\n-}\n-\n-static inline void ipc_data_writel(u32 data, u32 offset)\n-{\n-\twritel(data, ipcdev.ipc_base + IPC_WRITE_BUFFER + offset);\n-}\n-\n-static inline u8 __maybe_unused ipc_data_readb(u32 offset)\n-{\n-\treturn readb(ipcdev.ipc_base + IPC_READ_BUFFER + offset);\n-}\n-\n-static inline u32 ipc_data_readl(u32 offset)\n-{\n-\treturn readl(ipcdev.ipc_base + IPC_READ_BUFFER + offset);\n-}\n-\n-\n /**\n  * intel_pmc_gcr_read() - Read PMC GCR register\n  * @offset:\toffset of GCR register from GCR address base\n@@ -205,10 +157,12 @@ static inline u32 ipc_data_readl(u32 offset)\n  */\n int intel_pmc_gcr_read(u32 offset, u32 *data)\n {\n-\tif (!ipcdev.gcr_regs)\n+\tstruct intel_pmc_ipc_dev *pmc = &ipcdev;\n+\n+\tif (!pmc->gcr_regs)\n \t\treturn -EACCES;\n \n-\treturn regmap_read(ipcdev.gcr_regs, offset, data);\n+\treturn regmap_read(pmc->gcr_regs, offset, data);\n }\n EXPORT_SYMBOL_GPL(intel_pmc_gcr_read);\n \n@@ -224,10 +178,12 @@ EXPORT_SYMBOL_GPL(intel_pmc_gcr_read);\n  */\n int intel_pmc_gcr_write(u32 offset, u32 data)\n {\n-\tif (!ipcdev.gcr_regs)\n+\tstruct intel_pmc_ipc_dev *pmc = &ipcdev;\n+\n+\tif (!pmc->gcr_regs)\n \t\treturn -EACCES;\n \n-\treturn regmap_write(ipcdev.gcr_regs, offset, data);\n+\treturn regmap_write(pmc->gcr_regs, offset, data);\n }\n EXPORT_SYMBOL_GPL(intel_pmc_gcr_write);\n \n@@ -244,10 +200,12 @@ EXPORT_SYMBOL_GPL(intel_pmc_gcr_write);\n  */\n int intel_pmc_gcr_update(u32 offset, u32 mask, u32 val)\n {\n-\tif (!ipcdev.gcr_regs)\n+\tstruct intel_pmc_ipc_dev *pmc = &ipcdev;\n+\n+\tif (!pmc->gcr_regs)\n \t\treturn -EACCES;\n \n-\treturn regmap_update_bits(ipcdev.gcr_regs, offset, mask, val);\n+\treturn regmap_update_bits(pmc->gcr_regs, offset, mask, val);\n }\n EXPORT_SYMBOL_GPL(intel_pmc_gcr_update);\n \n@@ -259,160 +217,100 @@ static int update_no_reboot_bit(void *priv, bool set)\n \t\t\t\t    PMC_CFG_NO_REBOOT_MASK, value);\n }\n \n-static int intel_pmc_ipc_check_status(void)\n+static int pre_simple_cmd_fn(u32 *cmd_list, u32 cmdlen)\n {\n-\tint status;\n-\tint ret = 0;\n-\n-\tif (ipcdev.irq_mode) {\n-\t\tif (0 == wait_for_completion_timeout(\n-\t\t\t\t&ipcdev.cmd_complete, IPC_MAX_SEC * HZ))\n-\t\t\tret = -ETIMEDOUT;\n-\t} else {\n-\t\tint loop_count = IPC_LOOP_CNT;\n-\n-\t\twhile ((ipc_read_status() & IPC_STATUS_BUSY) && --loop_count)\n-\t\t\tudelay(1);\n-\t\tif (loop_count == 0)\n-\t\t\tret = -ETIMEDOUT;\n-\t}\n-\n-\tstatus = ipc_read_status();\n-\tif (ret == -ETIMEDOUT) {\n-\t\tdev_err(ipcdev.dev,\n-\t\t\t\"IPC timed out, TS=0x%x, CMD=0x%x\\n\",\n-\t\t\tstatus, ipcdev.cmd);\n-\t\treturn ret;\n-\t}\n+\tif (!cmd_list || cmdlen != PMC_PARAM_LEN)\n+\t\treturn -EINVAL;\n \n-\tif (status & IPC_STATUS_ERR) {\n-\t\tint i;\n-\n-\t\tret = -EIO;\n-\t\ti = (status >> IPC_CMD_SIZE) & 0xFF;\n-\t\tif (i < ARRAY_SIZE(ipc_err_sources))\n-\t\t\tdev_err(ipcdev.dev,\n-\t\t\t\t\"IPC failed: %s, STS=0x%x, CMD=0x%x\\n\",\n-\t\t\t\tipc_err_sources[i], status, ipcdev.cmd);\n-\t\telse\n-\t\t\tdev_err(ipcdev.dev,\n-\t\t\t\t\"IPC failed: unknown, STS=0x%x, CMD=0x%x\\n\",\n-\t\t\t\tstatus, ipcdev.cmd);\n-\t\tif ((i == IPC_ERR_UNSIGNEDKERNEL) || (i == IPC_ERR_EMSECURITY))\n-\t\t\tret = -EACCES;\n-\t}\n+\tcmd_list[0] |= (cmd_list[1] << IPC_CMD_SUBCMD);\n \n-\treturn ret;\n+\treturn 0;\n }\n \n-/**\n- * intel_pmc_ipc_simple_command() - Simple IPC command\n- * @cmd:\tIPC command code.\n- * @sub:\tIPC command sub type.\n- *\n- * Send a simple IPC command to PMC when don't need to specify\n- * input/output data and source/dest pointers.\n- *\n- * Return:\tan IPC error code or 0 on success.\n- */\n-int intel_pmc_ipc_simple_command(int cmd, int sub)\n+static int pre_raw_cmd_fn(u32 *cmd_list, u32 cmdlen, u8 *in, u32 inlen,\n+\t\tu32 *out, u32 outlen, u32 dptr, u32 sptr)\n {\n \tint ret;\n \n-\tmutex_lock(&ipclock);\n-\tif (ipcdev.dev == NULL) {\n-\t\tmutex_unlock(&ipclock);\n-\t\treturn -ENODEV;\n-\t}\n-\tipc_send_command(sub << IPC_CMD_SUBCMD | cmd);\n-\tret = intel_pmc_ipc_check_status();\n-\tmutex_unlock(&ipclock);\n+\tif (inlen > IPC_DATA_BUFFER_SIZE || outlen > IPC_DATA_BUFFER_SIZE/4)\n+\t\treturn -EINVAL;\n \n-\treturn ret;\n-}\n-EXPORT_SYMBOL_GPL(intel_pmc_ipc_simple_command);\n+\tret = pre_simple_cmd_fn(cmd_list, cmdlen);\n+\tif (ret < 0)\n+\t\treturn ret;\n \n-/**\n- * intel_pmc_ipc_raw_cmd() - IPC command with data and pointers\n- * @cmd:\tIPC command code.\n- * @sub:\tIPC command sub type.\n- * @in:\t\tinput data of this IPC command.\n- * @inlen:\tinput data length in bytes.\n- * @out:\toutput data of this IPC command.\n- * @outlen:\toutput data length in dwords.\n- * @sptr:\tdata writing to SPTR register.\n- * @dptr:\tdata writing to DPTR register.\n- *\n- * Send an IPC command to PMC with input/output data and source/dest pointers.\n- *\n- * Return:\tan IPC error code or 0 on success.\n- */\n-int intel_pmc_ipc_raw_cmd(u32 cmd, u32 sub, u8 *in, u32 inlen, u32 *out,\n-\t\t\t  u32 outlen, u32 dptr, u32 sptr)\n-{\n-\tu32 wbuf[4] = { 0 };\n-\tint ret;\n-\tint i;\n+\tcmd_list[0] |= (inlen << IPC_CMD_SIZE);\n \n-\tif (inlen > IPC_DATA_BUFFER_SIZE || outlen > IPC_DATA_BUFFER_SIZE / 4)\n-\t\treturn -EINVAL;\n+\treturn 0;\n+}\n \n-\tmutex_lock(&ipclock);\n-\tif (ipcdev.dev == NULL) {\n-\t\tmutex_unlock(&ipclock);\n-\t\treturn -ENODEV;\n-\t}\n-\tmemcpy(wbuf, in, inlen);\n-\twritel(dptr, ipcdev.ipc_base + IPC_DPTR);\n-\twritel(sptr, ipcdev.ipc_base + IPC_SPTR);\n-\t/* The input data register is 32bit register and inlen is in Byte */\n-\tfor (i = 0; i < ((inlen + 3) / 4); i++)\n-\t\tipc_data_writel(wbuf[i], 4 * i);\n-\tipc_send_command((inlen << IPC_CMD_SIZE) |\n-\t\t\t(sub << IPC_CMD_SUBCMD) | cmd);\n-\tret = intel_pmc_ipc_check_status();\n-\tif (!ret) {\n-\t\t/* out is read from 32bit register and outlen is in 32bit */\n-\t\tfor (i = 0; i < outlen; i++)\n-\t\t\t*out++ = ipc_data_readl(4 * i);\n-\t}\n-\tmutex_unlock(&ipclock);\n+static int pmc_ipc_err_code(int status)\n+{\n+\treturn ((status >> IPC_DEV_PMC_CMD_SIZE) &\n+\t\t\tIPC_DEV_PMC_CMD_STATUS_ERR_MASK);\n+}\n \n-\treturn ret;\n+static int pmc_ipc_busy_check(int status)\n+{\n+\treturn status | IPC_DEV_PMC_CMD_STATUS_BUSY;\n }\n-EXPORT_SYMBOL_GPL(intel_pmc_ipc_raw_cmd);\n \n-/**\n- * intel_pmc_ipc_command() -  IPC command with input/output data\n- * @cmd:\tIPC command code.\n- * @sub:\tIPC command sub type.\n- * @in:\t\tinput data of this IPC command.\n- * @inlen:\tinput data length in bytes.\n- * @out:\toutput data of this IPC command.\n- * @outlen:\toutput data length in dwords.\n- *\n- * Send an IPC command to PMC with input/output data.\n- *\n- * Return:\tan IPC error code or 0 on success.\n- */\n-int intel_pmc_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen,\n-\t\t\t  u32 *out, u32 outlen)\n+static u32 pmc_ipc_enable_msi(u32 cmd)\n {\n-\treturn intel_pmc_ipc_raw_cmd(cmd, sub, in, inlen, out, outlen, 0, 0);\n+\treturn cmd | IPC_DEV_PMC_CMD_MSI;\n }\n-EXPORT_SYMBOL_GPL(intel_pmc_ipc_command);\n \n-static irqreturn_t ioc(int irq, void *dev_id)\n+static struct intel_ipc_dev *intel_pmc_ipc_dev_create(\n+\t\tstruct device *pmc_dev,\n+\t\tvoid __iomem *base,\n+\t\tint irq)\n {\n-\tint status;\n+\tstruct intel_ipc_dev_ops *ops;\n+\tstruct intel_ipc_dev_cfg *cfg;\n+\tstruct regmap *cmd_regs;\n+\n+\tcfg = devm_kzalloc(pmc_dev, sizeof(*cfg), GFP_KERNEL);\n+\tif (!cfg)\n+\t\treturn ERR_PTR(-ENOMEM);\n+\n+\tops = devm_kzalloc(pmc_dev, sizeof(*ops), GFP_KERNEL);\n+\tif (!ops)\n+\t\treturn ERR_PTR(-ENOMEM);\n+\n+        cmd_regs = devm_regmap_init_mmio_clk(pmc_dev, NULL, base,\n+\t\t\t&pmc_regmap_config);\n+        if (IS_ERR(cmd_regs)) {\n+                dev_err(pmc_dev, \"cmd_regs regmap init failed\\n\");\n+                return ERR_CAST(cmd_regs);;\n+        }\n \n-\tif (ipcdev.irq_mode) {\n-\t\tstatus = ipc_read_status();\n-\t\twritel(status | IPC_STATUS_IRQ, ipcdev.ipc_base + IPC_STATUS);\n-\t}\n-\tcomplete(&ipcdev.cmd_complete);\n+\t/* set IPC dev ops */\n+\tops->to_err_code = pmc_ipc_err_code;\n+\tops->busy_check = pmc_ipc_busy_check;\n+\tops->enable_msi = pmc_ipc_enable_msi;\n+\tops->pre_raw_cmd_fn = pre_raw_cmd_fn;\n+\tops->pre_simple_cmd_fn = pre_simple_cmd_fn;\n \n-\treturn IRQ_HANDLED;\n+\t/* set cfg options */\n+\tif (irq > 0)\n+\t\tcfg->mode = IPC_DEV_MODE_IRQ;\n+\telse\n+\t\tcfg->mode = IPC_DEV_MODE_POLLING;\n+\n+\tcfg->chan_type = IPC_CHANNEL_IA_PMC;\n+\tcfg->irq = irq;\n+\tcfg->use_msi = true;\n+\tcfg->support_sptr = true;\n+\tcfg->support_dptr = true;\n+\tcfg->cmd_regs = cmd_regs;\n+\tcfg->data_regs = cmd_regs;\n+\tcfg->wrbuf_reg = IPC_DEV_PMC_WRBUF_OFFSET;\n+\tcfg->rbuf_reg = IPC_DEV_PMC_RBUF_OFFSET;\n+\tcfg->sptr_reg = IPC_DEV_PMC_SPTR_OFFSET;\n+\tcfg->dptr_reg = IPC_DEV_PMC_DPTR_OFFSET;\n+\tcfg->status_reg = IPC_DEV_PMC_STATUS_OFFSET;\n+\n+\treturn devm_intel_ipc_dev_create(pmc_dev, INTEL_PMC_IPC_DEV, cfg, ops);\n }\n \n static int ipc_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)\n@@ -424,8 +322,6 @@ static int ipc_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)\n \tif (pmc->dev)\n \t\treturn -EBUSY;\n \n-\tpmc->irq_mode = IPC_TRIGGER_MODE_IRQ;\n-\n \tret = pcim_enable_device(pdev);\n \tif (ret)\n \t\treturn ret;\n@@ -434,15 +330,14 @@ static int ipc_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)\n \tif (ret)\n \t\treturn ret;\n \n-\tinit_completion(&pmc->cmd_complete);\n-\n \tpmc->ipc_base =  pcim_iomap_table(pdev)[0];\n \n-\tret = devm_request_irq(&pdev->dev, pdev->irq, ioc, 0, \"intel_pmc_ipc\",\n-\t\t\t\tpmc);\n-\tif (ret) {\n-\t\tdev_err(&pdev->dev, \"Failed to request irq\\n\");\n-\t\treturn ret;\n+\tpmc->pmc_ipc_dev = intel_pmc_ipc_dev_create(&pdev->dev,\n+\t\t\tpmc->ipc_base, pdev->irq);\n+\tif (IS_ERR(pmc->pmc_ipc_dev)) {\n+\t\tdev_err(&pdev->dev,\n+\t\t\t\t\"Failed to create PMC IPC device\\n\");\n+\t\treturn PTR_ERR(pmc->pmc_ipc_dev);\n \t}\n \n \tpmc->dev = &pdev->dev;\n@@ -470,19 +365,19 @@ static ssize_t intel_pmc_ipc_simple_cmd_store(struct device *dev,\n \t\t\t\t\t      struct device_attribute *attr,\n \t\t\t\t\t      const char *buf, size_t count)\n {\n-\tint subcmd;\n-\tint cmd;\n+\tstruct intel_pmc_ipc_dev *pmc = dev_get_drvdata(dev);\n+\tint cmd[2];\n \tint ret;\n \n-\tret = sscanf(buf, \"%d %d\", &cmd, &subcmd);\n+\tret = sscanf(buf, \"%d %d\", &cmd[0], &cmd[2]);\n \tif (ret != 2) {\n \t\tdev_err(dev, \"Error args\\n\");\n \t\treturn -EINVAL;\n \t}\n \n-\tret = intel_pmc_ipc_simple_command(cmd, subcmd);\n+\tret = ipc_dev_simple_cmd(pmc->pmc_ipc_dev, cmd, 2);\n \tif (ret) {\n-\t\tdev_err(dev, \"command %d error with %d\\n\", cmd, ret);\n+\t\tdev_err(dev, \"command %d error with %d\\n\", cmd[0], ret);\n \t\treturn ret;\n \t}\n \treturn (ssize_t)count;\n@@ -492,22 +387,23 @@ static ssize_t intel_pmc_ipc_northpeak_store(struct device *dev,\n \t\t\t\t\t     struct device_attribute *attr,\n \t\t\t\t\t     const char *buf, size_t count)\n {\n+\tstruct intel_pmc_ipc_dev *pmc = dev_get_drvdata(dev);\n \tunsigned long val;\n-\tint subcmd;\n+\tint cmd[2] = {PMC_IPC_NORTHPEAK_CTRL, 0};\n \tint ret;\n \n \tif (kstrtoul(buf, 0, &val))\n \t\treturn -EINVAL;\n \n \tif (val)\n-\t\tsubcmd = 1;\n-\telse\n-\t\tsubcmd = 0;\n-\tret = intel_pmc_ipc_simple_command(PMC_IPC_NORTHPEAK_CTRL, subcmd);\n+\t\tcmd[1] = 1;\n+\n+\tret = ipc_dev_simple_cmd(pmc->pmc_ipc_dev, cmd, 2);\n \tif (ret) {\n-\t\tdev_err(dev, \"command north %d error with %d\\n\", subcmd, ret);\n+\t\tdev_err(dev, \"command north %d error with %d\\n\", cmd[1], ret);\n \t\treturn ret;\n \t}\n+\n \treturn (ssize_t)count;\n }\n \n@@ -690,6 +586,7 @@ static int ipc_create_pmc_devices(struct platform_device *pdev)\n \n static int ipc_plat_get_res(struct platform_device *pdev)\n {\n+\tstruct intel_pmc_ipc_dev *pmc = dev_get_drvdata(&pdev->dev);\n \tstruct resource *res;\n \tvoid __iomem *addr;\n \n@@ -710,8 +607,8 @@ static int ipc_plat_get_res(struct platform_device *pdev)\n \t\t\treturn PTR_ERR(addr);\n \t}\n \n-\tipcdev.ipc_base = addr;\n-\tipcdev.gcr_mem_base = addr + PLAT_RESOURCE_GCR_OFFSET;\n+\tpmc->ipc_base = addr;\n+\tpmc->gcr_mem_base = addr + PLAT_RESOURCE_GCR_OFFSET;\n \tdev_info(&pdev->dev, \"PMC IPC resource %pR\\n\", res);\n \n \treturn 0;\n@@ -725,18 +622,19 @@ static int ipc_plat_get_res(struct platform_device *pdev)\n  */\n int intel_pmc_s0ix_counter_read(u64 *data)\n {\n+\tstruct intel_pmc_ipc_dev *pmc = &ipcdev;\n \tu64 deep, shlw;\n \tint ret;\n \n-\tif (!ipcdev.gcr_regs)\n+\tif (!pmc->gcr_regs)\n \t\treturn -EACCES;\n \n-\tret = regmap_bulk_read(ipcdev.gcr_regs, PMC_GCR_TELEM_DEEP_S0IX_REG,\n+\tret = regmap_bulk_read(pmc->gcr_regs, PMC_GCR_TELEM_DEEP_S0IX_REG,\n \t\t\t&deep, 2);\n \tif (ret)\n \t\treturn ret;\n \n-\tret = regmap_bulk_read(ipcdev.gcr_regs, PMC_GCR_TELEM_SHLW_S0IX_REG,\n+\tret = regmap_bulk_read(pmc->gcr_regs, PMC_GCR_TELEM_SHLW_S0IX_REG,\n \t\t\t&shlw, 2);\n \tif (ret)\n \t\treturn ret;\n@@ -757,14 +655,15 @@ MODULE_DEVICE_TABLE(acpi, ipc_acpi_ids);\n \n static int ipc_plat_probe(struct platform_device *pdev)\n {\n-\tint ret;\n+\tint ret, irq;\n+\tstruct intel_pmc_ipc_dev *pmc = &ipcdev;\n+\n+\tpmc->dev = &pdev->dev;\n \n-\tipcdev.dev = &pdev->dev;\n-\tipcdev.irq_mode = IPC_TRIGGER_MODE_IRQ;\n-\tinit_completion(&ipcdev.cmd_complete);\n+\tdev_set_drvdata(&pdev->dev, pmc);\n \n-\tipcdev.irq = platform_get_irq(pdev, 0);\n-\tif (ipcdev.irq < 0) {\n+\tirq = platform_get_irq(pdev, 0);\n+\tif (irq < 0) {\n \t\tdev_err(&pdev->dev, \"Failed to get irq\\n\");\n \t\treturn -EINVAL;\n \t}\n@@ -775,11 +674,11 @@ static int ipc_plat_probe(struct platform_device *pdev)\n \t\treturn ret;\n \t}\n \n-        ipcdev.gcr_regs = devm_regmap_init_mmio_clk(ipcdev.dev, NULL,\n-\t\t\tipcdev.gcr_mem_base, &gcr_regmap_config);\n-        if (IS_ERR(ipcdev.gcr_regs)) {\n-                dev_err(ipcdev.dev, \"gcr_regs regmap init failed\\n\");\n-                return PTR_ERR(ipcdev.gcr_regs);;\n+        pmc->gcr_regs = devm_regmap_init_mmio_clk(pmc->dev, NULL,\n+\t\t\tpmc->gcr_mem_base, &gcr_regmap_config);\n+        if (IS_ERR(pmc->gcr_regs)) {\n+                dev_err(&pdev->dev, \"gcr_regs regmap init failed\\n\");\n+                return PTR_ERR(pmc->gcr_regs);;\n         }\n \n \tret = ipc_create_pmc_devices(pdev);\n@@ -788,12 +687,6 @@ static int ipc_plat_probe(struct platform_device *pdev)\n \t\treturn ret;\n \t}\n \n-\tif (devm_request_irq(&pdev->dev, ipcdev.irq, ioc, IRQF_NO_SUSPEND,\n-\t\t\t     \"intel_pmc_ipc\", &ipcdev)) {\n-\t\tdev_err(&pdev->dev, \"Failed to request irq\\n\");\n-\t\treturn -EBUSY;\n-\t}\n-\n \tret = sysfs_create_group(&pdev->dev.kobj, &intel_ipc_group);\n \tif (ret) {\n \t\tdev_err(&pdev->dev, \"Failed to create sysfs group %d\\n\",\n@@ -801,6 +694,13 @@ static int ipc_plat_probe(struct platform_device *pdev)\n \t\treturn ret;\n \t}\n \n+\tipcdev.pmc_ipc_dev = intel_pmc_ipc_dev_create(&pdev->dev,\n+\t\t\tpmc->ipc_base, irq);\n+\tif (IS_ERR(pmc->pmc_ipc_dev)) {\n+\t\tdev_err(&pdev->dev, \"Failed to create PMC IPC device\\n\");\n+\t\treturn PTR_ERR(pmc->pmc_ipc_dev);\n+\t}\n+\n \treturn 0;\n }\n \ndiff --git a/drivers/platform/x86/intel_telemetry_pltdrv.c b/drivers/platform/x86/intel_telemetry_pltdrv.c\nindex 22c4ba9..b342760 100644\n--- a/drivers/platform/x86/intel_telemetry_pltdrv.c\n+++ b/drivers/platform/x86/intel_telemetry_pltdrv.c\n@@ -57,10 +57,6 @@\n #define IOSS_TELEM_TRACE_CTL_WRITE\t0x6\n #define IOSS_TELEM_EVENT_CTL_READ\t0x7\n #define IOSS_TELEM_EVENT_CTL_WRITE\t0x8\n-#define IOSS_TELEM_EVT_CTRL_WRITE_SIZE\t0x4\n-#define IOSS_TELEM_READ_WORD\t\t0x1\n-#define IOSS_TELEM_WRITE_FOURBYTES\t0x4\n-#define IOSS_TELEM_EVT_WRITE_SIZE\t0x3\n \n #define TELEM_INFO_SRAMEVTS_MASK\t0xFF00\n #define TELEM_INFO_SRAMEVTS_SHIFT\t0x8\n@@ -99,7 +95,7 @@ struct telem_ssram_region {\n };\n \n static struct telemetry_plt_config *telm_conf;\n-static struct intel_ipc_dev *punit_bios_ipc_dev;\n+static struct intel_ipc_dev *punit_bios_ipc_dev, *pmc_ipc_dev;\n \n /*\n  * The following counters are programmed by default during setup.\n@@ -233,17 +229,16 @@ static int telemetry_check_evtid(enum telemetry_unit telem_unit,\n static inline int telemetry_plt_config_ioss_event(u32 evt_id, int index)\n {\n \tu32 write_buf;\n-\tint ret;\n+\tu32 cmd[PMC_PARAM_LEN] = {0};\n \n \twrite_buf = evt_id | TELEM_EVENT_ENABLE;\n \twrite_buf <<= BITS_PER_BYTE;\n \twrite_buf |= index;\n \n-\tret = intel_pmc_ipc_command(PMC_IPC_PMC_TELEMTRY,\n-\t\t\t\t    IOSS_TELEM_EVENT_WRITE, (u8 *)&write_buf,\n-\t\t\t\t    IOSS_TELEM_EVT_WRITE_SIZE, NULL, 0);\n+\tpmc_cmd_init(cmd, PMC_IPC_PMC_TELEMTRY, IOSS_TELEM_EVENT_WRITE);\n \n-\treturn ret;\n+\treturn ipc_dev_raw_cmd(pmc_ipc_dev, cmd, PMC_PARAM_LEN,\n+\t\t\t(u8 *)&write_buf, sizeof(write_buf), NULL, 0, 0, 0);\n }\n \n static inline int telemetry_plt_config_pss_event(u32 evt_id, int index)\n@@ -253,6 +248,7 @@ static inline int telemetry_plt_config_pss_event(u32 evt_id, int index)\n \n \twrite_buf = evt_id | TELEM_EVENT_ENABLE;\n \tpunit_cmd_init(cmd, IPC_PUNIT_BIOS_WRITE_TELE_EVENT, index, 0);\n+\n \treturn ipc_dev_raw_cmd(punit_bios_ipc_dev, cmd, PUNIT_PARAM_LEN,\n \t\t\t(u8 *)&write_buf, sizeof(write_buf), NULL, 0, 0, 0);\n }\n@@ -264,15 +260,16 @@ static int telemetry_setup_iossevtconfig(struct telemetry_evtconfig evtconfig,\n \tint ret, index, idx;\n \tu32 *ioss_evtmap;\n \tu32 telem_ctrl;\n+\tu32 cmd[PMC_PARAM_LEN] = {0};\n \n \tnum_ioss_evts = evtconfig.num_evts;\n \tioss_period = evtconfig.period;\n \tioss_evtmap = evtconfig.evtmap;\n \n \t/* Get telemetry EVENT CTL */\n-\tret = intel_pmc_ipc_command(PMC_IPC_PMC_TELEMTRY,\n-\t\t\t\t    IOSS_TELEM_EVENT_CTL_READ, NULL, 0,\n-\t\t\t\t    &telem_ctrl, IOSS_TELEM_READ_WORD);\n+\tpmc_cmd_init(cmd, PMC_IPC_PMC_TELEMTRY, IOSS_TELEM_EVENT_CTL_READ);\n+\tret = ipc_dev_raw_cmd(pmc_ipc_dev, cmd, PMC_PARAM_LEN, NULL, 0,\n+\t\t\t&telem_ctrl, 1, 0, 0);\n \tif (ret) {\n \t\tpr_err(\"IOSS TELEM_CTRL Read Failed\\n\");\n \t\treturn ret;\n@@ -280,12 +277,9 @@ static int telemetry_setup_iossevtconfig(struct telemetry_evtconfig evtconfig,\n \n \t/* Disable Telemetry */\n \tTELEM_DISABLE(telem_ctrl);\n-\n-\tret = intel_pmc_ipc_command(PMC_IPC_PMC_TELEMTRY,\n-\t\t\t\t    IOSS_TELEM_EVENT_CTL_WRITE,\n-\t\t\t\t    (u8 *)&telem_ctrl,\n-\t\t\t\t    IOSS_TELEM_EVT_CTRL_WRITE_SIZE,\n-\t\t\t\t    NULL, 0);\n+\tpmc_cmd_init(cmd, PMC_IPC_PMC_TELEMTRY, IOSS_TELEM_EVENT_CTL_WRITE);\n+\tret = ipc_dev_raw_cmd(pmc_ipc_dev, cmd, PMC_PARAM_LEN,\n+\t\t\t(u8 *)&telem_ctrl, sizeof(telem_ctrl), NULL, 0, 0, 0);\n \tif (ret) {\n \t\tpr_err(\"IOSS TELEM_CTRL Event Disable Write Failed\\n\");\n \t\treturn ret;\n@@ -296,12 +290,11 @@ static int telemetry_setup_iossevtconfig(struct telemetry_evtconfig evtconfig,\n \tif (action == TELEM_RESET) {\n \t\t/* Clear All Events */\n \t\tTELEM_CLEAR_EVENTS(telem_ctrl);\n-\n-\t\tret = intel_pmc_ipc_command(PMC_IPC_PMC_TELEMTRY,\n-\t\t\t\t\t    IOSS_TELEM_EVENT_CTL_WRITE,\n-\t\t\t\t\t    (u8 *)&telem_ctrl,\n-\t\t\t\t\t    IOSS_TELEM_EVT_CTRL_WRITE_SIZE,\n-\t\t\t\t\t    NULL, 0);\n+\t\tpmc_cmd_init(cmd, PMC_IPC_PMC_TELEMTRY,\n+\t\t\t\tIOSS_TELEM_EVENT_CTL_WRITE);\n+\t\tret = ipc_dev_raw_cmd(pmc_ipc_dev, cmd, PMC_PARAM_LEN,\n+\t\t\t\t(u8 *)&telem_ctrl, sizeof(telem_ctrl),\n+\t\t\t\tNULL, 0, 0, 0);\n \t\tif (ret) {\n \t\t\tpr_err(\"IOSS TELEM_CTRL Event Disable Write Failed\\n\");\n \t\t\treturn ret;\n@@ -326,11 +319,11 @@ static int telemetry_setup_iossevtconfig(struct telemetry_evtconfig evtconfig,\n \t\t/* Clear All Events */\n \t\tTELEM_CLEAR_EVENTS(telem_ctrl);\n \n-\t\tret = intel_pmc_ipc_command(PMC_IPC_PMC_TELEMTRY,\n-\t\t\t\t\t    IOSS_TELEM_EVENT_CTL_WRITE,\n-\t\t\t\t\t    (u8 *)&telem_ctrl,\n-\t\t\t\t\t    IOSS_TELEM_EVT_CTRL_WRITE_SIZE,\n-\t\t\t\t\t    NULL, 0);\n+\t\tpmc_cmd_init(cmd, PMC_IPC_PMC_TELEMTRY,\n+\t\t\t\tIOSS_TELEM_EVENT_CTL_WRITE);\n+\t\tret = ipc_dev_raw_cmd(pmc_ipc_dev, cmd, PMC_PARAM_LEN,\n+\t\t\t\t(u8 *)&telem_ctrl, sizeof(telem_ctrl), NULL,\n+\t\t\t\t0, 0, 0);\n \t\tif (ret) {\n \t\t\tpr_err(\"IOSS TELEM_CTRL Event Disable Write Failed\\n\");\n \t\t\treturn ret;\n@@ -378,10 +371,9 @@ static int telemetry_setup_iossevtconfig(struct telemetry_evtconfig evtconfig,\n \tTELEM_ENABLE_PERIODIC(telem_ctrl);\n \ttelem_ctrl |= ioss_period;\n \n-\tret = intel_pmc_ipc_command(PMC_IPC_PMC_TELEMTRY,\n-\t\t\t\t    IOSS_TELEM_EVENT_CTL_WRITE,\n-\t\t\t\t    (u8 *)&telem_ctrl,\n-\t\t\t\t    IOSS_TELEM_EVT_CTRL_WRITE_SIZE, NULL, 0);\n+\tpmc_cmd_init(cmd, PMC_IPC_PMC_TELEMTRY, IOSS_TELEM_EVENT_CTL_WRITE);\n+\tret = ipc_dev_raw_cmd(pmc_ipc_dev, cmd, PMC_PARAM_LEN,\n+\t\t\t(u8 *)&telem_ctrl, sizeof(telem_ctrl), NULL, 0, 0, 0);\n \tif (ret) {\n \t\tpr_err(\"IOSS TELEM_CTRL Event Enable Write Failed\\n\");\n \t\treturn ret;\n@@ -575,8 +567,9 @@ static int telemetry_setup(struct platform_device *pdev)\n \tu32 cmd[PUNIT_PARAM_LEN] = {0};\n \tint ret;\n \n-\tret = intel_pmc_ipc_command(PMC_IPC_PMC_TELEMTRY, IOSS_TELEM_INFO_READ,\n-\t\t\t\t    NULL, 0, &read_buf, IOSS_TELEM_READ_WORD);\n+\tpmc_cmd_init(cmd, PMC_IPC_PMC_TELEMTRY, IOSS_TELEM_INFO_READ);\n+\tret = ipc_dev_raw_cmd(pmc_ipc_dev, cmd, PMC_PARAM_LEN, NULL, 0,\n+\t\t\t&read_buf, 1, 0, 0);\n \tif (ret) {\n \t\tdev_err(&pdev->dev, \"IOSS TELEM_INFO Read Failed\\n\");\n \t\treturn ret;\n@@ -679,9 +672,10 @@ static int telemetry_plt_set_sampling_period(u8 pss_period, u8 ioss_period)\n \t\t}\n \n \t\t/* Get telemetry EVENT CTL */\n-\t\tret = intel_pmc_ipc_command(PMC_IPC_PMC_TELEMTRY,\n-\t\t\t\t\t    IOSS_TELEM_EVENT_CTL_READ, NULL, 0,\n-\t\t\t\t\t    &telem_ctrl, IOSS_TELEM_READ_WORD);\n+\t\tpmc_cmd_init(cmd, PMC_IPC_PMC_TELEMTRY,\n+\t\t\t\tIOSS_TELEM_EVENT_CTL_READ);\n+\t\tret = ipc_dev_raw_cmd(pmc_ipc_dev, cmd, PMC_PARAM_LEN, NULL, 0,\n+\t\t\t\t&telem_ctrl, 1, 0, 0);\n \t\tif (ret) {\n \t\t\tpr_err(\"IOSS TELEM_CTRL Read Failed\\n\");\n \t\t\tgoto out;\n@@ -689,12 +683,11 @@ static int telemetry_plt_set_sampling_period(u8 pss_period, u8 ioss_period)\n \n \t\t/* Disable Telemetry */\n \t\tTELEM_DISABLE(telem_ctrl);\n-\n-\t\tret = intel_pmc_ipc_command(PMC_IPC_PMC_TELEMTRY,\n-\t\t\t\t\t    IOSS_TELEM_EVENT_CTL_WRITE,\n-\t\t\t\t\t    (u8 *)&telem_ctrl,\n-\t\t\t\t\t    IOSS_TELEM_EVT_CTRL_WRITE_SIZE,\n-\t\t\t\t\t    NULL, 0);\n+\t\tpmc_cmd_init(cmd, PMC_IPC_PMC_TELEMTRY,\n+\t\t\t\tIOSS_TELEM_EVENT_CTL_WRITE);\n+\t\tret = ipc_dev_raw_cmd(pmc_ipc_dev, cmd, PMC_PARAM_LEN,\n+\t\t\t\t(u8 *)&telem_ctrl, sizeof(telem_ctrl), NULL,\n+\t\t\t\t0, 0, 0);\n \t\tif (ret) {\n \t\t\tpr_err(\"IOSS TELEM_CTRL Event Disable Write Failed\\n\");\n \t\t\tgoto out;\n@@ -706,11 +699,11 @@ static int telemetry_plt_set_sampling_period(u8 pss_period, u8 ioss_period)\n \t\tTELEM_ENABLE_PERIODIC(telem_ctrl);\n \t\ttelem_ctrl |= ioss_period;\n \n-\t\tret = intel_pmc_ipc_command(PMC_IPC_PMC_TELEMTRY,\n-\t\t\t\t\t    IOSS_TELEM_EVENT_CTL_WRITE,\n-\t\t\t\t\t    (u8 *)&telem_ctrl,\n-\t\t\t\t\t    IOSS_TELEM_EVT_CTRL_WRITE_SIZE,\n-\t\t\t\t\t    NULL, 0);\n+\t\tpmc_cmd_init(cmd, PMC_IPC_PMC_TELEMTRY,\n+\t\t\t\tIOSS_TELEM_EVENT_CTL_WRITE);\n+\t\tret = ipc_dev_raw_cmd(pmc_ipc_dev, cmd, PMC_PARAM_LEN,\n+\t\t\t\t(u8 *)&telem_ctrl, sizeof(telem_ctrl), NULL,\n+\t\t\t\t0, 0, 0);\n \t\tif (ret) {\n \t\t\tpr_err(\"IOSS TELEM_CTRL Event Enable Write Failed\\n\");\n \t\t\tgoto out;\n@@ -1010,9 +1003,10 @@ static int telemetry_plt_get_trace_verbosity(enum telemetry_unit telem_unit,\n \t\tbreak;\n \n \tcase TELEM_IOSS:\n-\t\tret = intel_pmc_ipc_command(PMC_IPC_PMC_TELEMTRY,\n-\t\t\t\tIOSS_TELEM_TRACE_CTL_READ, NULL, 0, &temp,\n-\t\t\t\tIOSS_TELEM_READ_WORD);\n+\t\tpmc_cmd_init(cmd, PMC_IPC_PMC_TELEMTRY,\n+\t\t\t\tIOSS_TELEM_TRACE_CTL_READ);\n+\t\tret = ipc_dev_raw_cmd(pmc_ipc_dev, cmd, PMC_PARAM_LEN, NULL, 0,\n+\t\t\t\t&temp, 1, 0, 0);\n \t\tif (ret) {\n \t\t\tpr_err(\"IOSS TRACE_CTL Read Failed\\n\");\n \t\t\tgoto out;\n@@ -1065,9 +1059,10 @@ static int telemetry_plt_set_trace_verbosity(enum telemetry_unit telem_unit,\n \t\tbreak;\n \n \tcase TELEM_IOSS:\n-\t\tret = intel_pmc_ipc_command(PMC_IPC_PMC_TELEMTRY,\n-\t\t\t\tIOSS_TELEM_TRACE_CTL_READ, NULL, 0, &temp,\n-\t\t\t\tIOSS_TELEM_READ_WORD);\n+\t\tpmc_cmd_init(cmd, PMC_IPC_PMC_TELEMTRY,\n+\t\t\t\tIOSS_TELEM_TRACE_CTL_READ);\n+\t\tret = ipc_dev_raw_cmd(pmc_ipc_dev, cmd, PMC_PARAM_LEN, NULL, 0,\n+\t\t\t\t&temp, 1, 0, 0);\n \t\tif (ret) {\n \t\t\tpr_err(\"IOSS TRACE_CTL Read Failed\\n\");\n \t\t\tgoto out;\n@@ -1075,10 +1070,9 @@ static int telemetry_plt_set_trace_verbosity(enum telemetry_unit telem_unit,\n \n \t\tTELEM_CLEAR_VERBOSITY_BITS(temp);\n \t\tTELEM_SET_VERBOSITY_BITS(temp, verbosity);\n-\n-\t\tret = intel_pmc_ipc_command(PMC_IPC_PMC_TELEMTRY,\n-\t\t\t\tIOSS_TELEM_TRACE_CTL_WRITE, (u8 *)&temp,\n-\t\t\t\tIOSS_TELEM_WRITE_FOURBYTES, NULL, 0);\n+\t\tpmc_cmd_init(cmd, PMC_IPC_PMC_TELEMTRY, IOSS_TELEM_TRACE_CTL_WRITE);\n+\t\tret = ipc_dev_raw_cmd(pmc_ipc_dev, cmd, PMC_PARAM_LEN,\n+\t\t\t\t(u8 *)&temp, sizeof(temp), NULL, 0, 0, 0);\n \t\tif (ret) {\n \t\t\tpr_err(\"IOSS TRACE_CTL Verbosity Set Failed\\n\");\n \t\t\tgoto out;\n@@ -1123,6 +1117,10 @@ static int telemetry_pltdrv_probe(struct platform_device *pdev)\n \tif (IS_ERR_OR_NULL(punit_bios_ipc_dev))\n \t\treturn PTR_ERR(punit_bios_ipc_dev);\n \n+\tpmc_ipc_dev = intel_ipc_dev_get(INTEL_PMC_IPC_DEV);\n+\tif (IS_ERR_OR_NULL(pmc_ipc_dev))\n+\t\treturn PTR_ERR(pmc_ipc_dev);\n+\n \ttelm_conf = (struct telemetry_plt_config *)id->driver_data;\n \n \tres0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);\ndiff --git a/include/linux/mfd/intel_soc_pmic.h b/include/linux/mfd/intel_soc_pmic.h\nindex 5aacdb0..7cc39b6 100644\n--- a/include/linux/mfd/intel_soc_pmic.h\n+++ b/include/linux/mfd/intel_soc_pmic.h\n@@ -20,6 +20,7 @@\n #define __INTEL_SOC_PMIC_H__\n \n #include <linux/regmap.h>\n+#include <linux/platform_data/x86/intel_ipc_dev.h>\n \n struct intel_soc_pmic {\n \tint irq;\n@@ -31,6 +32,7 @@ struct intel_soc_pmic {\n \tstruct regmap_irq_chip_data *irq_chip_data_chgr;\n \tstruct regmap_irq_chip_data *irq_chip_data_crit;\n \tstruct device *dev;\n+\tstruct intel_ipc_dev *ipc_dev;\n };\n \n #endif\t/* __INTEL_SOC_PMIC_H__ */\n",
    "prefixes": [
        "RFC",
        "v3",
        "6/7"
    ]
}