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GET /api/patches/809692/?format=api
{ "id": 809692, "url": "http://patchwork.ozlabs.org/api/patches/809692/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/1504533662-198084-3-git-send-email-imammedo@redhat.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1504533662-198084-3-git-send-email-imammedo@redhat.com>", "list_archive_url": null, "date": "2017-09-04T14:00:58", "name": "[2/6] cpu: make cpu_generic_init() abort QEMU on error", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "e69f868e3c7bb7c4f7ffce0bf1a15fe5063634fb", "submitter": { "id": 11305, "url": "http://patchwork.ozlabs.org/api/people/11305/?format=api", "name": "Igor Mammedov", "email": "imammedo@redhat.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/1504533662-198084-3-git-send-email-imammedo@redhat.com/mbox/", "series": [ { "id": 1390, "url": "http://patchwork.ozlabs.org/api/series/1390/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=1390", "date": "2017-09-04T14:00:57", "name": "generalize parsing of cpu_model (x86/arm)", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/1390/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/809692/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/809692/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ext-mx05.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com", "ext-mx05.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=imammedo@redhat.com" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xmBPB1jn6z9s75\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 5 Sep 2017 00:02:22 +1000 (AEST)", "from localhost ([::1]:44660 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dorxE-0003lU-BX\n\tfor incoming@patchwork.ozlabs.org; Mon, 04 Sep 2017 10:02:20 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:48016)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <imammedo@redhat.com>) id 1dorwI-0003fs-QJ\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 10:01:34 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <imammedo@redhat.com>) id 1dorwB-0003xZ-PC\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 10:01:22 -0400", "from mx1.redhat.com ([209.132.183.28]:40556)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <imammedo@redhat.com>) id 1dorwB-0003vi-Cf\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 10:01:15 -0400", "from smtp.corp.redhat.com\n\t(int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id 147A52C976F;\n\tMon, 4 Sep 2017 14:01:13 +0000 (UTC)", "from dell-r430-03.lab.eng.brq.redhat.com\n\t(dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60])\n\tby smtp.corp.redhat.com (Postfix) with ESMTP id DA951820A8;\n\tMon, 4 Sep 2017 14:01:05 +0000 (UTC)" ], "DMARC-Filter": "OpenDMARC Filter v1.3.2 mx1.redhat.com 147A52C976F", "From": "Igor Mammedov <imammedo@redhat.com>", "To": "qemu-devel@nongnu.org", "Date": "Mon, 4 Sep 2017 16:00:58 +0200", "Message-Id": "<1504533662-198084-3-git-send-email-imammedo@redhat.com>", "In-Reply-To": "<1504533662-198084-1-git-send-email-imammedo@redhat.com>", "References": "<1504533662-198084-1-git-send-email-imammedo@redhat.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "X-Scanned-By": "MIMEDefang 2.79 on 10.5.11.16", "X-Greylist": "Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.29]);\n\tMon, 04 Sep 2017 14:01:14 +0000 (UTC)", "Content-Transfer-Encoding": "quoted-printable", "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]", "X-Received-From": "209.132.183.28", "Subject": "[Qemu-devel] [PATCH 2/6] cpu: make cpu_generic_init() abort QEMU on\n\terror", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "Peter Maydell <peter.maydell@linaro.org>, Anthony Green\n\t<green@moxielogic.com>, \n\tMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>, Max Filippov\n\t<jcmvbkbc@gmail.com>, \t\"Edgar E. Iglesias\" <edgar.iglesias@gmail.com>,\n\tGuan Xuetao <gxt@mprc.pku.edu.cn>, Jia Liu <proljc@gmail.com>, \n\tMagnus Damm <magnus.damm@gmail.com>, Alexander Graf <agraf@suse.de>, \n\t=?utf-8?q?He?= =?utf-8?q?rv=C3=A9_Poussineau?= <hpoussin@reactos.org>,\n\tRichard Henderson <rth@twiddle.net>, Artyom Tarasenko\n\t<atar4qemu@gmail.com>, Andrew Jones <drjones@redhat.com>, Eduardo\n\tHabkost <ehabkost@redhat.com>, Riku Voipio <riku.voipio@iki.fi>, \n\tFabien Chouteau <chouteau@adacore.com>, Jan Kiszka <jan.kiszka@web.de>, \n\tYongbok Kim <yongbok.kim@imgtec.com>, Stafford Horne <shorne@gmail.com>, \n\tDavid Gibson <david@gibson.dropbear.id.au>, \n\tThomas Huth <huth@tuxfamily.org>, Bastian Koppelmann\n\t<kbastian@mail.uni-paderborn.de>, Laurent Vivier <laurent@vivier.eu>,\n\tMichael Walle <michael@walle.cc>, Aurelien Jarno <aurelien@aurel32.net>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "Almost every user of cpu_generic_init() checks for\nreturned NULL and then reports failure in a custom way\nand aborts process.\nSome users assume that call can't fail and don't check\nfor failure, though they should have checked for it.\n\nIn either cases cpu_generic_init() failure is fatal,\nso instead of checking for failure and reporting\nit various ways, make cpu_generic_init() report\nerrors in consistent way and terminate QEMU on failure.\n\nSigned-off-by: Igor Mammedov <imammedo@redhat.com>\n---\nEven though it's tree wide change, it's trivial so all\naffected call sites are included within one patch.\n\nCC: Richard Henderson <rth@twiddle.net> \nCC: Jan Kiszka <jan.kiszka@web.de> \nCC: Peter Maydell <peter.maydell@linaro.org> \nCC: Andrzej Zaborowski <balrogg@gmail.com> \nCC: Michael Walle <michael@walle.cc> \nCC: Thomas Huth <huth@tuxfamily.org> \nCC: Aurelien Jarno <aurelien@aurel32.net> \nCC: Yongbok Kim <yongbok.kim@imgtec.com> \nCC: \"Hervé Poussineau\" <hpoussin@reactos.org> \nCC: Anthony Green <green@moxielogic.com> \nCC: Jia Liu <proljc@gmail.com> \nCC: Stafford Horne <shorne@gmail.com> \nCC: Alexander Graf <agraf@suse.de> \nCC: David Gibson <david@gibson.dropbear.id.au> \nCC: \"Edgar E. Iglesias\" <edgar.iglesias@gmail.com> \nCC: Magnus Damm <magnus.damm@gmail.com> \nCC: Fabien Chouteau <chouteau@adacore.com> \nCC: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> \nCC: Artyom Tarasenko <atar4qemu@gmail.com> \nCC: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> \nCC: Guan Xuetao <gxt@mprc.pku.edu.cn> \nCC: Max Filippov <jcmvbkbc@gmail.com> \nCC: Riku Voipio <riku.voipio@iki.fi> \nCC: Laurent Vivier <laurent@vivier.eu> \n\n---\n include/qom/cpu.h | 3 ++-\n bsd-user/main.c | 4 ----\n hw/alpha/dp264.c | 4 ----\n hw/arm/musicpal.c | 4 ----\n hw/arm/omap1.c | 4 ----\n hw/arm/omap2.c | 4 ----\n hw/arm/pxa2xx.c | 8 --------\n hw/arm/strongarm.c | 5 -----\n hw/lm32/lm32_boards.c | 8 --------\n hw/lm32/milkymist.c | 4 ----\n hw/m68k/an5206.c | 4 ----\n hw/m68k/mcf5208.c | 4 ----\n hw/mips/cps.c | 4 ----\n hw/mips/mips_fulong2e.c | 4 ----\n hw/mips/mips_jazz.c | 4 ----\n hw/mips/mips_malta.c | 4 ----\n hw/mips/mips_mipssim.c | 4 ----\n hw/mips/mips_r4k.c | 4 ----\n hw/moxie/moxiesim.c | 4 ----\n hw/openrisc/openrisc_sim.c | 4 ----\n hw/ppc/e500.c | 4 ----\n hw/ppc/mac_newworld.c | 4 ----\n hw/ppc/mac_oldworld.c | 4 ----\n hw/ppc/ppc440_bamboo.c | 4 ----\n hw/ppc/ppc4xx_devs.c | 5 -----\n hw/ppc/prep.c | 9 ---------\n hw/ppc/virtex_ml507.c | 4 ----\n hw/sh4/r2d.c | 4 ----\n hw/sh4/shix.c | 4 ----\n hw/sparc/leon3.c | 4 ----\n hw/sparc/sun4m.c | 4 ----\n hw/sparc64/sparc64.c | 4 ----\n hw/tricore/tricore_testboard.c | 4 ----\n hw/unicore32/puv3.c | 4 ----\n hw/xtensa/sim.c | 5 -----\n hw/xtensa/xtfpga.c | 5 -----\n linux-user/main.c | 4 ----\n qom/cpu.c | 13 ++++++-------\n 38 files changed, 8 insertions(+), 169 deletions(-)", "diff": "diff --git a/include/qom/cpu.h b/include/qom/cpu.h\nindex a92a7d2..392ae75 100644\n--- a/include/qom/cpu.h\n+++ b/include/qom/cpu.h\n@@ -649,7 +649,8 @@ CPUState *cpu_create(const char *typename);\n *\n * processes optional parameters and registers them as global properties\n *\n- * Returns: type of CPU to create or %NULL if an error occurred.\n+ * Returns: type of CPU to create or prints error and terminates process\n+ * if an error occurred.\n */\n const char *cpu_parse_features(const char *typename, const char *cpu_model);\n \ndiff --git a/bsd-user/main.c b/bsd-user/main.c\nindex 8a6706a..836daac 100644\n--- a/bsd-user/main.c\n+++ b/bsd-user/main.c\n@@ -902,10 +902,6 @@ int main(int argc, char **argv)\n /* NOTE: we need to init the CPU at this stage to get\n qemu_host_page_size */\n cpu = cpu_init(cpu_model);\n- if (!cpu) {\n- fprintf(stderr, \"Unable to find CPU definition\\n\");\n- exit(1);\n- }\n env = cpu->env_ptr;\n #if defined(TARGET_SPARC) || defined(TARGET_PPC)\n cpu_reset(cpu);\ndiff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c\nindex 1c5a177..1b12130 100644\n--- a/hw/alpha/dp264.c\n+++ b/hw/alpha/dp264.c\n@@ -68,10 +68,6 @@ static void clipper_init(MachineState *machine)\n memset(cpus, 0, sizeof(cpus));\n for (i = 0; i < smp_cpus; ++i) {\n cpus[i] = ALPHA_CPU(cpu_generic_init(TYPE_ALPHA_CPU, cpu_model));\n- if (!cpus[i]) {\n- error_report(\"Unable to find CPU definition\");\n- exit(1);\n- }\n }\n \n cpus[0]->env.trap_arg0 = ram_size;\ndiff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c\nindex a8b3d46..64c8e09 100644\n--- a/hw/arm/musicpal.c\n+++ b/hw/arm/musicpal.c\n@@ -1594,10 +1594,6 @@ static void musicpal_init(MachineState *machine)\n cpu_model = \"arm926\";\n }\n cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, cpu_model));\n- if (!cpu) {\n- fprintf(stderr, \"Unable to find CPU definition\\n\");\n- exit(1);\n- }\n \n /* For now we use a fixed - the original - RAM size */\n memory_region_allocate_system_memory(ram, NULL, \"musicpal.ram\",\ndiff --git a/hw/arm/omap1.c b/hw/arm/omap1.c\nindex 400ba30..04e65ce 100644\n--- a/hw/arm/omap1.c\n+++ b/hw/arm/omap1.c\n@@ -3864,10 +3864,6 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,\n /* Core */\n s->mpu_model = omap310;\n s->cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, core));\n- if (s->cpu == NULL) {\n- fprintf(stderr, \"Unable to find CPU definition\\n\");\n- exit(1);\n- }\n s->sdram_size = sdram_size;\n s->sram_size = OMAP15XX_SRAM_SIZE;\n \ndiff --git a/hw/arm/omap2.c b/hw/arm/omap2.c\nindex ece25ae..5821477 100644\n--- a/hw/arm/omap2.c\n+++ b/hw/arm/omap2.c\n@@ -2262,10 +2262,6 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,\n /* Core */\n s->mpu_model = omap2420;\n s->cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, core ?: \"arm1136-r2\"));\n- if (s->cpu == NULL) {\n- fprintf(stderr, \"Unable to find CPU definition\\n\");\n- exit(1);\n- }\n s->sdram_size = sdram_size;\n s->sram_size = OMAP242X_SRAM_SIZE;\n \ndiff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c\nindex b0ac3cf..c16657d 100644\n--- a/hw/arm/pxa2xx.c\n+++ b/hw/arm/pxa2xx.c\n@@ -2067,10 +2067,6 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,\n revision = \"pxa270\";\n \n s->cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, revision));\n- if (s->cpu == NULL) {\n- fprintf(stderr, \"Unable to find CPU definition\\n\");\n- exit(1);\n- }\n s->reset = qemu_allocate_irq(pxa2xx_reset, s, 0);\n \n /* SDRAM & Internal Memory Storage */\n@@ -2197,10 +2193,6 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)\n s = g_new0(PXA2xxState, 1);\n \n s->cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, \"pxa255\"));\n- if (s->cpu == NULL) {\n- fprintf(stderr, \"Unable to find CPU definition\\n\");\n- exit(1);\n- }\n s->reset = qemu_allocate_irq(pxa2xx_reset, s, 0);\n \n /* SDRAM & Internal Memory Storage */\ndiff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c\nindex 884242b..c1145dd 100644\n--- a/hw/arm/strongarm.c\n+++ b/hw/arm/strongarm.c\n@@ -1599,11 +1599,6 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem,\n \n s->cpu = ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, rev));\n \n- if (!s->cpu) {\n- error_report(\"Unable to find CPU definition\");\n- exit(1);\n- }\n-\n memory_region_allocate_system_memory(&s->sdram, NULL, \"strongarm.sdram\",\n sdram_size);\n memory_region_add_subregion(sysmem, SA_SDCS0, &s->sdram);\ndiff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c\nindex eccf0ac..b0bb3ef 100644\n--- a/hw/lm32/lm32_boards.c\n+++ b/hw/lm32/lm32_boards.c\n@@ -105,10 +105,6 @@ static void lm32_evr_init(MachineState *machine)\n cpu_model = \"lm32-full\";\n }\n cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));\n- if (cpu == NULL) {\n- fprintf(stderr, \"qemu: unable to find CPU '%s'\\n\", cpu_model);\n- exit(1);\n- }\n \n env = &cpu->env;\n reset_info->cpu = cpu;\n@@ -206,10 +202,6 @@ static void lm32_uclinux_init(MachineState *machine)\n cpu_model = \"lm32-full\";\n }\n cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));\n- if (cpu == NULL) {\n- fprintf(stderr, \"qemu: unable to find CPU '%s'\\n\", cpu_model);\n- exit(1);\n- }\n \n env = &cpu->env;\n reset_info->cpu = cpu;\ndiff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c\nindex dffd879..4db4d2d 100644\n--- a/hw/lm32/milkymist.c\n+++ b/hw/lm32/milkymist.c\n@@ -112,10 +112,6 @@ milkymist_init(MachineState *machine)\n cpu_model = \"lm32-full\";\n }\n cpu = LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model));\n- if (cpu == NULL) {\n- fprintf(stderr, \"qemu: unable to find CPU '%s'\\n\", cpu_model);\n- exit(1);\n- }\n \n env = &cpu->env;\n reset_info->cpu = cpu;\ndiff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c\nindex 7b9b15d..9002c46 100644\n--- a/hw/m68k/an5206.c\n+++ b/hw/m68k/an5206.c\n@@ -43,10 +43,6 @@ static void an5206_init(MachineState *machine)\n cpu_model = \"m5206\";\n }\n cpu = M68K_CPU(cpu_generic_init(TYPE_M68K_CPU, cpu_model));\n- if (!cpu) {\n- error_report(\"Unable to find m68k CPU definition\");\n- exit(1);\n- }\n env = &cpu->env;\n \n /* Initialize CPU registers. */\ndiff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c\nindex 1a0f180..b9dde75 100644\n--- a/hw/m68k/mcf5208.c\n+++ b/hw/m68k/mcf5208.c\n@@ -233,10 +233,6 @@ static void mcf5208evb_init(MachineState *machine)\n cpu_model = \"m5208\";\n }\n cpu = M68K_CPU(cpu_generic_init(TYPE_M68K_CPU, cpu_model));\n- if (!cpu) {\n- fprintf(stderr, \"Unable to find m68k CPU definition\\n\");\n- exit(1);\n- }\n env = &cpu->env;\n \n /* Initialize CPU registers. */\ndiff --git a/hw/mips/cps.c b/hw/mips/cps.c\nindex 4ef337d..79d4c5e 100644\n--- a/hw/mips/cps.c\n+++ b/hw/mips/cps.c\n@@ -72,10 +72,6 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)\n \n for (i = 0; i < s->num_vp; i++) {\n cpu = cpu_mips_init(s->cpu_model);\n- if (cpu == NULL) {\n- error_setg(errp, \"%s: CPU initialization failed\", __func__);\n- return;\n- }\n \n /* Init internal devices */\n cpu_mips_irq_init_cpu(cpu);\ndiff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c\nindex 3532399..439a3d7 100644\n--- a/hw/mips/mips_fulong2e.c\n+++ b/hw/mips/mips_fulong2e.c\n@@ -281,10 +281,6 @@ static void mips_fulong2e_init(MachineState *machine)\n cpu_model = \"Loongson-2E\";\n }\n cpu = cpu_mips_init(cpu_model);\n- if (cpu == NULL) {\n- fprintf(stderr, \"Unable to find CPU definition\\n\");\n- exit(1);\n- }\n env = &cpu->env;\n \n qemu_register_reset(main_cpu_reset, cpu);\ndiff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c\nindex df2262a..ae10670 100644\n--- a/hw/mips/mips_jazz.c\n+++ b/hw/mips/mips_jazz.c\n@@ -152,10 +152,6 @@ static void mips_jazz_init(MachineState *machine,\n cpu_model = \"R4000\";\n }\n cpu = cpu_mips_init(cpu_model);\n- if (cpu == NULL) {\n- fprintf(stderr, \"Unable to find CPU definition\\n\");\n- exit(1);\n- }\n env = &cpu->env;\n qemu_register_reset(main_cpu_reset, cpu);\n \ndiff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c\nindex af678f5..c82e0af 100644\n--- a/hw/mips/mips_malta.c\n+++ b/hw/mips/mips_malta.c\n@@ -932,10 +932,6 @@ static void create_cpu_without_cps(const char *cpu_model,\n \n for (i = 0; i < smp_cpus; i++) {\n cpu = cpu_mips_init(cpu_model);\n- if (cpu == NULL) {\n- fprintf(stderr, \"Unable to find CPU definition\\n\");\n- exit(1);\n- }\n \n /* Init internal devices */\n cpu_mips_irq_init_cpu(cpu);\ndiff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c\nindex 07fc4c2..49cd38d 100644\n--- a/hw/mips/mips_mipssim.c\n+++ b/hw/mips/mips_mipssim.c\n@@ -164,10 +164,6 @@ mips_mipssim_init(MachineState *machine)\n #endif\n }\n cpu = cpu_mips_init(cpu_model);\n- if (cpu == NULL) {\n- fprintf(stderr, \"Unable to find CPU definition\\n\");\n- exit(1);\n- }\n env = &cpu->env;\n \n reset_info = g_malloc0(sizeof(ResetData));\ndiff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c\nindex 2f5ced7..60da607 100644\n--- a/hw/mips/mips_r4k.c\n+++ b/hw/mips/mips_r4k.c\n@@ -194,10 +194,6 @@ void mips_r4k_init(MachineState *machine)\n #endif\n }\n cpu = cpu_mips_init(cpu_model);\n- if (cpu == NULL) {\n- fprintf(stderr, \"Unable to find CPU definition\\n\");\n- exit(1);\n- }\n env = &cpu->env;\n \n reset_info = g_malloc0(sizeof(ResetData));\ndiff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c\nindex 4c27b45..5ea8dd3 100644\n--- a/hw/moxie/moxiesim.c\n+++ b/hw/moxie/moxiesim.c\n@@ -119,10 +119,6 @@ static void moxiesim_init(MachineState *machine)\n cpu_model = \"MoxieLite-moxie-cpu\";\n }\n cpu = MOXIE_CPU(cpu_generic_init(TYPE_MOXIE_CPU, cpu_model));\n- if (!cpu) {\n- fprintf(stderr, \"Unable to find CPU definition\\n\");\n- exit(1);\n- }\n env = &cpu->env;\n \n qemu_register_reset(main_cpu_reset, cpu);\ndiff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c\nindex 243d802..86bf284 100644\n--- a/hw/openrisc/openrisc_sim.c\n+++ b/hw/openrisc/openrisc_sim.c\n@@ -110,10 +110,6 @@ static void openrisc_sim_init(MachineState *machine)\n \n for (n = 0; n < smp_cpus; n++) {\n cpu = OPENRISC_CPU(cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model));\n- if (cpu == NULL) {\n- fprintf(stderr, \"Unable to find CPU definition!\\n\");\n- exit(1);\n- }\n qemu_register_reset(main_cpu_reset, cpu);\n main_cpu_reset(cpu);\n }\ndiff --git a/hw/ppc/e500.c b/hw/ppc/e500.c\nindex f0596f3..fc4786c 100644\n--- a/hw/ppc/e500.c\n+++ b/hw/ppc/e500.c\n@@ -821,10 +821,6 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)\n \n cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,\n machine->cpu_model));\n- if (cpu == NULL) {\n- fprintf(stderr, \"Unable to initialize CPU!\\n\");\n- exit(1);\n- }\n env = &cpu->env;\n cs = CPU(cpu);\n \ndiff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c\nindex d466634..33b46cb 100644\n--- a/hw/ppc/mac_newworld.c\n+++ b/hw/ppc/mac_newworld.c\n@@ -189,10 +189,6 @@ static void ppc_core99_init(MachineState *machine)\n for (i = 0; i < smp_cpus; i++) {\n cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,\n machine->cpu_model));\n- if (cpu == NULL) {\n- fprintf(stderr, \"Unable to find PowerPC CPU definition\\n\");\n- exit(1);\n- }\n env = &cpu->env;\n \n /* Set time-base frequency to 100 Mhz */\ndiff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c\nindex fcac399..193b904 100644\n--- a/hw/ppc/mac_oldworld.c\n+++ b/hw/ppc/mac_oldworld.c\n@@ -118,10 +118,6 @@ static void ppc_heathrow_init(MachineState *machine)\n for (i = 0; i < smp_cpus; i++) {\n cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,\n machine->cpu_model));\n- if (cpu == NULL) {\n- fprintf(stderr, \"Unable to find PowerPC CPU definition\\n\");\n- exit(1);\n- }\n env = &cpu->env;\n \n /* Set time-base frequency to 16.6 Mhz */\ndiff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c\nindex ca26398..f92d47f 100644\n--- a/hw/ppc/ppc440_bamboo.c\n+++ b/hw/ppc/ppc440_bamboo.c\n@@ -187,10 +187,6 @@ static void bamboo_init(MachineState *machine)\n machine->cpu_model = \"440EP\";\n }\n cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model));\n- if (cpu == NULL) {\n- fprintf(stderr, \"Unable to initialize CPU!\\n\");\n- exit(1);\n- }\n env = &cpu->env;\n \n if (env->mmu_model != POWERPC_MMU_BOOKE) {\ndiff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c\nindex 6b38ed7..88f3d4c 100644\n--- a/hw/ppc/ppc4xx_devs.c\n+++ b/hw/ppc/ppc4xx_devs.c\n@@ -57,11 +57,6 @@ PowerPCCPU *ppc4xx_init(const char *cpu_model,\n \n /* init CPUs */\n cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model));\n- if (cpu == NULL) {\n- fprintf(stderr, \"Unable to find PowerPC %s CPU definition\\n\",\n- cpu_model);\n- exit(1);\n- }\n env = &cpu->env;\n \n cpu_clk->cb = NULL; /* We don't care about CPU clock frequency changes */\ndiff --git a/hw/ppc/prep.c b/hw/ppc/prep.c\nindex 00f3321..94138a4 100644\n--- a/hw/ppc/prep.c\n+++ b/hw/ppc/prep.c\n@@ -522,10 +522,6 @@ static void ppc_prep_init(MachineState *machine)\n for (i = 0; i < smp_cpus; i++) {\n cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,\n machine->cpu_model));\n- if (cpu == NULL) {\n- fprintf(stderr, \"Unable to find PowerPC CPU definition\\n\");\n- exit(1);\n- }\n env = &cpu->env;\n \n if (env->flags & POWERPC_FLAG_RTC_CLK) {\n@@ -726,11 +722,6 @@ static void ibm_40p_init(MachineState *machine)\n machine->cpu_model = \"604\";\n }\n cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model));\n- if (!cpu) {\n- error_report(\"could not initialize CPU '%s'\",\n- machine->cpu_model);\n- exit(1);\n- }\n env = &cpu->env;\n if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {\n error_report(\"only 6xx bus is supported on this machine\");\ndiff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c\nindex d5fdc16..ed9b406 100644\n--- a/hw/ppc/virtex_ml507.c\n+++ b/hw/ppc/virtex_ml507.c\n@@ -97,10 +97,6 @@ static PowerPCCPU *ppc440_init_xilinx(ram_addr_t *ram_size,\n qemu_irq *irqs;\n \n cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model));\n- if (cpu == NULL) {\n- fprintf(stderr, \"Unable to initialize CPU!\\n\");\n- exit(1);\n- }\n env = &cpu->env;\n \n ppc_booke_timers_init(cpu, sysclk, 0/* no flags */);\ndiff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c\nindex 22bc534..16b9ed2 100644\n--- a/hw/sh4/r2d.c\n+++ b/hw/sh4/r2d.c\n@@ -247,10 +247,6 @@ static void r2d_init(MachineState *machine)\n }\n \n cpu = SUPERH_CPU(cpu_generic_init(TYPE_SUPERH_CPU, cpu_model));\n- if (cpu == NULL) {\n- fprintf(stderr, \"Unable to find CPU definition\\n\");\n- exit(1);\n- }\n env = &cpu->env;\n \n reset_info = g_malloc0(sizeof(ResetData));\ndiff --git a/hw/sh4/shix.c b/hw/sh4/shix.c\nindex 7f8a4b6..50ee36a 100644\n--- a/hw/sh4/shix.c\n+++ b/hw/sh4/shix.c\n@@ -57,10 +57,6 @@ static void shix_init(MachineState *machine)\n cpu_model = \"any\";\n \n cpu = SUPERH_CPU(cpu_generic_init(TYPE_SUPERH_CPU, cpu_model));\n- if (cpu == NULL) {\n- fprintf(stderr, \"Unable to find CPU definition\\n\");\n- exit(1);\n- }\n \n /* Allocate memory space */\n memory_region_init_ram(rom, NULL, \"shix.rom\", 0x4000, &error_fatal);\ndiff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c\nindex 56512ec..ec2816b 100644\n--- a/hw/sparc/leon3.c\n+++ b/hw/sparc/leon3.c\n@@ -127,10 +127,6 @@ static void leon3_generic_hw_init(MachineState *machine)\n }\n \n cpu = SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));\n- if (cpu == NULL) {\n- fprintf(stderr, \"qemu: Unable to find Sparc CPU definition\\n\");\n- exit(1);\n- }\n env = &cpu->env;\n \n cpu_sparc_set_id(env, 0);\ndiff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c\nindex cf47dca..e1bdd48 100644\n--- a/hw/sparc/sun4m.c\n+++ b/hw/sparc/sun4m.c\n@@ -798,10 +798,6 @@ static void cpu_devinit(const char *cpu_model, unsigned int id,\n CPUSPARCState *env;\n \n cpu = SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));\n- if (cpu == NULL) {\n- fprintf(stderr, \"qemu: Unable to find Sparc CPU definition\\n\");\n- exit(1);\n- }\n env = &cpu->env;\n \n cpu_sparc_set_id(env, id);\ndiff --git a/hw/sparc64/sparc64.c b/hw/sparc64/sparc64.c\nindex ecf38a4..097d529 100644\n--- a/hw/sparc64/sparc64.c\n+++ b/hw/sparc64/sparc64.c\n@@ -354,10 +354,6 @@ SPARCCPU *sparc64_cpu_devinit(const char *cpu_model,\n cpu_model = default_cpu_model;\n }\n cpu = SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model));\n- if (cpu == NULL) {\n- fprintf(stderr, \"Unable to find Sparc CPU definition\\n\");\n- exit(1);\n- }\n env = &cpu->env;\n \n env->tick = cpu_timer_create(\"tick\", cpu, tick_irq,\ndiff --git a/hw/tricore/tricore_testboard.c b/hw/tricore/tricore_testboard.c\nindex 3fcd8bb..0486f8a 100644\n--- a/hw/tricore/tricore_testboard.c\n+++ b/hw/tricore/tricore_testboard.c\n@@ -75,10 +75,6 @@ static void tricore_testboard_init(MachineState *machine, int board_id)\n machine->cpu_model = \"tc1796\";\n }\n cpu = TRICORE_CPU(cpu_generic_init(TYPE_TRICORE_CPU, machine->cpu_model));\n- if (!cpu) {\n- error_report(\"Unable to find CPU definition\");\n- exit(1);\n- }\n env = &cpu->env;\n memory_region_init_ram(ext_cram, NULL, \"powerlink_ext_c.ram\",\n 2 * 1024 * 1024, &error_fatal);\ndiff --git a/hw/unicore32/puv3.c b/hw/unicore32/puv3.c\nindex eb9862f..504ea46 100644\n--- a/hw/unicore32/puv3.c\n+++ b/hw/unicore32/puv3.c\n@@ -128,10 +128,6 @@ static void puv3_init(MachineState *machine)\n }\n \n cpu = UNICORE32_CPU(cpu_generic_init(TYPE_UNICORE32_CPU, cpu_model));\n- if (!cpu) {\n- error_report(\"Unable to find CPU definition\");\n- exit(1);\n- }\n env = &cpu->env;\n \n puv3_soc_init(env);\ndiff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c\nindex 1b4767f..b3580b1 100644\n--- a/hw/xtensa/sim.c\n+++ b/hw/xtensa/sim.c\n@@ -85,11 +85,6 @@ static void xtensa_sim_init(MachineState *machine)\n \n for (n = 0; n < smp_cpus; n++) {\n cpu = XTENSA_CPU(cpu_generic_init(TYPE_XTENSA_CPU, cpu_model));\n- if (cpu == NULL) {\n- error_report(\"unable to find CPU definition '%s'\",\n- cpu_model);\n- exit(EXIT_FAILURE);\n- }\n env = &cpu->env;\n \n env->sregs[PRID] = n;\ndiff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c\nindex 182ec1e..a19cceb 100644\n--- a/hw/xtensa/xtfpga.c\n+++ b/hw/xtensa/xtfpga.c\n@@ -233,11 +233,6 @@ static void lx_init(const LxBoardDesc *board, MachineState *machine)\n \n for (n = 0; n < smp_cpus; n++) {\n cpu = XTENSA_CPU(cpu_generic_init(TYPE_XTENSA_CPU, cpu_model));\n- if (cpu == NULL) {\n- error_report(\"unable to find CPU definition '%s'\",\n- cpu_model);\n- exit(EXIT_FAILURE);\n- }\n env = &cpu->env;\n \n env->sregs[PRID] = n;\ndiff --git a/linux-user/main.c b/linux-user/main.c\nindex 03666ef..829f974 100644\n--- a/linux-user/main.c\n+++ b/linux-user/main.c\n@@ -4323,10 +4323,6 @@ int main(int argc, char **argv, char **envp)\n /* NOTE: we need to init the CPU at this stage to get\n qemu_host_page_size */\n cpu = cpu_init(cpu_model);\n- if (!cpu) {\n- fprintf(stderr, \"Unable to find CPU definition\\n\");\n- exit(EXIT_FAILURE);\n- }\n env = cpu->env_ptr;\n cpu_reset(cpu);\n \ndiff --git a/qom/cpu.c b/qom/cpu.c\nindex d715890..307d638 100644\n--- a/qom/cpu.c\n+++ b/qom/cpu.c\n@@ -61,7 +61,7 @@ CPUState *cpu_create(const char *typename)\n if (err != NULL) {\n error_report_err(err);\n object_unref(OBJECT(cpu));\n- return NULL;\n+ exit(EXIT_FAILURE);\n }\n return cpu;\n }\n@@ -78,8 +78,9 @@ const char *cpu_parse_features(const char *typename, const char *cpu_model)\n \n oc = cpu_class_by_name(typename, model_pieces[0]);\n if (oc == NULL) {\n+ error_report(\"unable to find CPU model '%s'\", model_pieces[0]);\n g_strfreev(model_pieces);\n- return NULL;\n+ exit(EXIT_FAILURE);\n }\n \n cpu_type = object_class_get_name(oc);\n@@ -88,7 +89,7 @@ const char *cpu_parse_features(const char *typename, const char *cpu_model)\n g_strfreev(model_pieces);\n if (err != NULL) {\n error_report_err(err);\n- return NULL;\n+ exit(EXIT_FAILURE);\n }\n return cpu_type;\n }\n@@ -100,10 +101,8 @@ CPUState *cpu_generic_init(const char *typename, const char *cpu_model)\n */\n const char *cpu_type = cpu_parse_features(typename, cpu_model);\n \n- if (cpu_type) {\n- return cpu_create(cpu_type);\n- }\n- return NULL;\n+ assert(cpu_type);\n+ return cpu_create(cpu_type);\n }\n \n bool cpu_paging_enabled(const CPUState *cpu)\n", "prefixes": [ "2/6" ] }