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GET /api/patches/809647/?format=api
{ "id": 809647, "url": "http://patchwork.ozlabs.org/api/patches/809647/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/1504527967-29248-20-git-send-email-peter.maydell@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1504527967-29248-20-git-send-email-peter.maydell@linaro.org>", "list_archive_url": null, "date": "2017-09-04T12:25:50", "name": "[PULL,19/36] hw/arm/virt: add pmu interrupt state", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "bafe91747e7ef55fb06d4a2f0a90c7c1edc5bf6f", "submitter": { "id": 5111, "url": "http://patchwork.ozlabs.org/api/people/5111/?format=api", "name": "Peter Maydell", "email": "peter.maydell@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/1504527967-29248-20-git-send-email-peter.maydell@linaro.org/mbox/", "series": [ { "id": 1366, "url": "http://patchwork.ozlabs.org/api/series/1366/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=1366", "date": "2017-09-04T12:25:36", "name": "[PULL,01/36] target/arm: Use MMUAccessType enum rather than int", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/1366/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/809647/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/809647/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xm8db4fvZz9t2Z\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon, 4 Sep 2017 22:42:59 +1000 (AEST)", "from localhost ([::1]:59623 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1doqiP-0000MJ-P6\n\tfor incoming@patchwork.ozlabs.org; Mon, 04 Sep 2017 08:42:57 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:52685)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <pm215@archaic.org.uk>) id 1doqSX-00055N-0B\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 08:26:46 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <pm215@archaic.org.uk>) id 1doqSH-0004pv-MX\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 08:26:33 -0400", "from orth.archaic.org.uk ([2001:8b0:1d0::2]:37122)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <pm215@archaic.org.uk>)\n\tid 1doqSH-0004oE-Ew\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 08:26:17 -0400", "from pm215 by orth.archaic.org.uk with local (Exim 4.89)\n\t(envelope-from <pm215@archaic.org.uk>) id 1doqSG-0005XN-7H\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 13:26:16 +0100" ], "From": "Peter Maydell <peter.maydell@linaro.org>", "To": "qemu-devel@nongnu.org", "Date": "Mon, 4 Sep 2017 13:25:50 +0100", "Message-Id": "<1504527967-29248-20-git-send-email-peter.maydell@linaro.org>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1504527967-29248-1-git-send-email-peter.maydell@linaro.org>", "References": "<1504527967-29248-1-git-send-email-peter.maydell@linaro.org>", "X-detected-operating-system": "by eggs.gnu.org: Genre and OS details not\n\trecognized.", "X-Received-From": "2001:8b0:1d0::2", "Subject": "[Qemu-devel] [PULL 19/36] hw/arm/virt: add pmu interrupt state", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "From: Andrew Jones <drjones@redhat.com>\n\nMimicking gicv3-maintenance-interrupt, add the PMU's interrupt to\nCPU state.\n\nSigned-off-by: Andrew Jones <drjones@redhat.com>\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nMessage-id: 1500471597-2517-2-git-send-email-drjones@redhat.com\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\n---\n target/arm/cpu.h | 2 ++\n hw/arm/virt.c | 3 +++\n target/arm/cpu.c | 2 ++\n 3 files changed, 7 insertions(+)", "diff": "diff --git a/target/arm/cpu.h b/target/arm/cpu.h\nindex eabef00..92771d3 100644\n--- a/target/arm/cpu.h\n+++ b/target/arm/cpu.h\n@@ -585,6 +585,8 @@ struct ARMCPU {\n qemu_irq gt_timer_outputs[NUM_GTIMERS];\n /* GPIO output for GICv3 maintenance interrupt signal */\n qemu_irq gicv3_maintenance_interrupt;\n+ /* GPIO output for the PMU interrupt */\n+ qemu_irq pmu_interrupt;\n \n /* MemoryRegion to use for secure physical accesses */\n MemoryRegion *secure_memory;\ndiff --git a/hw/arm/virt.c b/hw/arm/virt.c\nindex 6b7a0fe..a06ec13 100644\n--- a/hw/arm/virt.c\n+++ b/hw/arm/virt.c\n@@ -610,6 +610,9 @@ static void create_gic(VirtMachineState *vms, qemu_irq *pic)\n qdev_connect_gpio_out_named(cpudev, \"gicv3-maintenance-interrupt\", 0,\n qdev_get_gpio_in(gicdev, ppibase\n + ARCH_GICV3_MAINT_IRQ));\n+ qdev_connect_gpio_out_named(cpudev, \"pmu-interrupt\", 0,\n+ qdev_get_gpio_in(gicdev, ppibase\n+ + VIRTUAL_PMU_IRQ));\n \n sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ));\n sysbus_connect_irq(gicbusdev, i + smp_cpus,\ndiff --git a/target/arm/cpu.c b/target/arm/cpu.c\nindex b241a63..41ae6ba 100644\n--- a/target/arm/cpu.c\n+++ b/target/arm/cpu.c\n@@ -508,6 +508,8 @@ static void arm_cpu_initfn(Object *obj)\n \n qdev_init_gpio_out_named(DEVICE(cpu), &cpu->gicv3_maintenance_interrupt,\n \"gicv3-maintenance-interrupt\", 1);\n+ qdev_init_gpio_out_named(DEVICE(cpu), &cpu->pmu_interrupt,\n+ \"pmu-interrupt\", 1);\n #endif\n \n /* DTB consumers generally don't in fact care what the 'compatible'\n", "prefixes": [ "PULL", "19/36" ] }