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GET /api/patches/809284/?format=api
{ "id": 809284, "url": "http://patchwork.ozlabs.org/api/patches/809284/?format=api", "web_url": "http://patchwork.ozlabs.org/project/buildroot/patch/e59117272e7f170eee83b2c0cf097638455f7e33.1504444617.git.yann.morin.1998@free.fr/", "project": { "id": 27, "url": "http://patchwork.ozlabs.org/api/projects/27/?format=api", "name": "Buildroot development", "link_name": "buildroot", "list_id": "buildroot.buildroot.org", "list_email": "buildroot@buildroot.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<e59117272e7f170eee83b2c0cf097638455f7e33.1504444617.git.yann.morin.1998@free.fr>", "list_archive_url": null, "date": "2017-09-03T13:17:42", "name": "[2/9] arch/arm: simplify hiding non 64-bit cores", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "88de99cbb680a415c8f68a87afbcab4035287bed", "submitter": { "id": 13903, "url": "http://patchwork.ozlabs.org/api/people/13903/?format=api", "name": "Yann E. MORIN", "email": "yann.morin.1998@free.fr" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/buildroot/patch/e59117272e7f170eee83b2c0cf097638455f7e33.1504444617.git.yann.morin.1998@free.fr/mbox/", "series": [ { "id": 1231, "url": "http://patchwork.ozlabs.org/api/series/1231/?format=api", "web_url": "http://patchwork.ozlabs.org/project/buildroot/list/?series=1231", "date": "2017-09-03T13:17:44", "name": "[1/9] arch/arm: re-order cores choice", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/1231/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/809284/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/809284/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<buildroot-bounces@busybox.net>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "buildroot@lists.busybox.net" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "buildroot@osuosl.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=busybox.net\n\t(client-ip=140.211.166.137; helo=fraxinus.osuosl.org;\n\tenvelope-from=buildroot-bounces@busybox.net;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"UcnBFEOm\"; dkim-atps=neutral" ], "Received": [ "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xlYSY5nXMz9s8J\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSun, 3 Sep 2017 23:18:05 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 2362E868BD;\n\tSun, 3 Sep 2017 13:18:01 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id KF5_RwcGRoCx; Sun, 3 Sep 2017 13:17:59 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 20D6A86830;\n\tSun, 3 Sep 2017 13:17:59 +0000 (UTC)", "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ash.osuosl.org (Postfix) with ESMTP id B25281C0DB4\n\tfor <buildroot@lists.busybox.net>;\n\tSun, 3 Sep 2017 13:17:56 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id ACB6286830\n\tfor <buildroot@lists.busybox.net>;\n\tSun, 3 Sep 2017 13:17:56 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id Q54UGfqx8KOS for <buildroot@lists.busybox.net>;\n\tSun, 3 Sep 2017 13:17:56 +0000 (UTC)", "from mail-wm0-f66.google.com (mail-wm0-f66.google.com\n\t[74.125.82.66])\n\tby fraxinus.osuosl.org (Postfix) with ESMTPS id E20B88679B\n\tfor <buildroot@buildroot.org>; Sun, 3 Sep 2017 13:17:55 +0000 (UTC)", "by mail-wm0-f66.google.com with SMTP id e204so4144542wma.2\n\tfor <buildroot@buildroot.org>; Sun, 03 Sep 2017 06:17:55 -0700 (PDT)", "from localhost.localdomain\n\t(2a01cb0886107300d59898fcbeacd7d5.ipv6.abo.wanadoo.fr.\n\t[2a01:cb08:8610:7300:d598:98fc:beac:d7d5])\n\tby smtp.gmail.com with ESMTPSA id\n\tc139sm6351605wmh.32.2017.09.03.06.17.52\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tSun, 03 Sep 2017 06:17:53 -0700 (PDT)" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=sender:from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=AUqm9NtUuzReWP/aVdMDHwaIPjczx/0H/UZpP9Vun2M=;\n\tb=UcnBFEOmvef+0UtQqkqmSvpIBIvlmMid968J4EmF6ZHce/dCkhAlhxsmy6/pOYQKAA\n\tLkqFM036V5GaAblZEdASJr62qMxMPwMJLWcelDig7PmofSFiBPGbnDzyP/rKXlFGb2OQ\n\twZ23izbpyxw+djRb+a6S0oT1vxzqUEpkCJ+yOoOjpnj28Z1u2je0oHMOwzujS60bgdra\n\tA6szGXHM3PO3ojE/QCJxFIPo8SHVUxYrCIUmSZXDtcoupzyiiyN/zMoxPNE0GhRkXmXg\n\tdjIk//JemNx+5epIlbW0tVTQbMKVZOSoJ/8Li1YvgHNpOupe3S+EfzxZ5aFBHbilakLl\n\tmk6A==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:sender:from:to:cc:subject:date:message-id\n\t:in-reply-to:references;\n\tbh=AUqm9NtUuzReWP/aVdMDHwaIPjczx/0H/UZpP9Vun2M=;\n\tb=Eg9opLoneww9/Qc3E4hV1vAKK3O84gEJcP73fDtv0kWS1ReTj6QYf7gjXZU7pqyx7s\n\tIgKua3HpB8J19ZEh9CBM+9wiNncEW4fSz3ZLgIFfv52Xs5shGVSsGCCtrStq7oG8Wz3P\n\tOnN/SUqdKObVLYYNxW37QG8Wqz4kSufmzXzoy7VS6oISjcT+I5hHP6WnvobWH+KsOxuX\n\tm9BSh3cFDeWs7JZ0qrCAXXflVGqJ2CrP1p5X4LWcsMs8+uaJoaSerpvH+jFLg7aofcdm\n\tr4eaU6xsHybEK72BfYsQY8J+bmLVc5QLGsLYO4/LnMuR/R4zW0zREfcH7TmFaUdmavwL\n\tq3Dw==", "X-Gm-Message-State": "AHPjjUjUSeQWOSmHIZidwF7iGHqhHTeL/dc/FxUXM/jGexAX7snVUm2a\n\tfBuRd8drCPkN2Etc", "X-Google-Smtp-Source": "ADKCNb5Bvwa9bApzTvKMDfwrvOhgKLdzHm8SVn27MRH57DjUxOCecE129LeHcP/ZM+1LfHXcv/fFRA==", "X-Received": "by 10.28.58.17 with SMTP id h17mr1992376wma.150.1504444674088;\n\tSun, 03 Sep 2017 06:17:54 -0700 (PDT)", "From": "\"Yann E. MORIN\" <yann.morin.1998@free.fr>", "To": "buildroot@buildroot.org", "Date": "Sun, 3 Sep 2017 15:17:42 +0200", "Message-Id": "<e59117272e7f170eee83b2c0cf097638455f7e33.1504444617.git.yann.morin.1998@free.fr>", "X-Mailer": "git-send-email 2.11.0", "In-Reply-To": "<cover.1504444617.git.yann.morin.1998@free.fr>", "References": "<cover.1504444617.git.yann.morin.1998@free.fr>", "Cc": "Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,\n\t\"Yann E. MORIN\" <yann.morin.1998@free.fr>", "Subject": "[Buildroot] [PATCH 2/9] arch/arm: simplify hiding non 64-bit cores", "X-BeenThere": "buildroot@busybox.net", "X-Mailman-Version": "2.1.18-1", "Precedence": "list", "List-Id": "Discussion and development of buildroot <buildroot.busybox.net>", "List-Unsubscribe": "<http://lists.busybox.net/mailman/options/buildroot>,\n\t<mailto:buildroot-request@busybox.net?subject=unsubscribe>", "List-Archive": "<http://lists.busybox.net/pipermail/buildroot/>", "List-Post": "<mailto:buildroot@busybox.net>", "List-Help": "<mailto:buildroot-request@busybox.net?subject=help>", "List-Subscribe": "<http://lists.busybox.net/mailman/listinfo/buildroot>,\n\t<mailto:buildroot-request@busybox.net?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "buildroot-bounces@busybox.net", "Sender": "\"buildroot\" <buildroot-bounces@busybox.net>" }, "content": "Now that the cores are all oredered correctly, we can just enclose all\nthe non 64-bit cores inside a big if-block, rather than have each of\nthem have the dependency.\n\nSigned-off-by: \"Yann E. MORIN\" <yann.morin.1998@free.fr>\nCc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>\n---\n arch/Config.in.arm | 31 ++-----------------------------\n 1 file changed, 2 insertions(+), 29 deletions(-)", "diff": "diff --git a/arch/Config.in.arm b/arch/Config.in.arm\nindex 66dce3a562..c2b7931528 100644\n--- a/arch/Config.in.arm\n+++ b/arch/Config.in.arm\n@@ -68,37 +68,32 @@ choice\n \thelp\n \t Specific CPU variant to use\n \n+if !BR2_ARCH_IS_64\n comment \"armv4 cores\"\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_arm920t\n \tbool \"arm920t\"\n \tselect BR2_ARM_CPU_HAS_ARM\n \tselect BR2_ARM_CPU_HAS_THUMB\n \tselect BR2_ARM_CPU_ARMV4\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_arm922t\n \tbool \"arm922t\"\n \tselect BR2_ARM_CPU_HAS_ARM\n \tselect BR2_ARM_CPU_HAS_THUMB\n \tselect BR2_ARM_CPU_ARMV4\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_fa526\n \tbool \"fa526/626\"\n \tselect BR2_ARM_CPU_HAS_ARM\n \tselect BR2_ARM_CPU_ARMV4\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_strongarm\n \tbool \"strongarm sa110/sa1100\"\n \tselect BR2_ARM_CPU_HAS_ARM\n \tselect BR2_ARM_CPU_ARMV4\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n \n comment \"armv5 cores\"\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_arm926t\n \tbool \"arm926t\"\n \tselect BR2_ARM_CPU_HAS_ARM\n@@ -106,30 +101,25 @@ config BR2_arm926t\n \tselect BR2_ARM_CPU_HAS_THUMB\n \tselect BR2_ARM_CPU_ARMV5\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_iwmmxt\n \tbool \"iwmmxt\"\n \tselect BR2_ARM_CPU_HAS_ARM\n \tselect BR2_ARM_CPU_ARMV5\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_xscale\n \tbool \"xscale\"\n \tselect BR2_ARM_CPU_HAS_ARM\n \tselect BR2_ARM_CPU_HAS_THUMB\n \tselect BR2_ARM_CPU_ARMV5\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n \n comment \"armv6 cores\"\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_arm1136j_s\n \tbool \"arm1136j-s\"\n \tselect BR2_ARM_CPU_HAS_ARM\n \tselect BR2_ARM_CPU_HAS_THUMB\n \tselect BR2_ARM_CPU_ARMV6\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_arm1136jf_s\n \tbool \"arm1136jf-s\"\n \tselect BR2_ARM_CPU_HAS_ARM\n@@ -137,14 +127,12 @@ config BR2_arm1136jf_s\n \tselect BR2_ARM_CPU_HAS_THUMB\n \tselect BR2_ARM_CPU_ARMV6\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_arm1176jz_s\n \tbool \"arm1176jz-s\"\n \tselect BR2_ARM_CPU_HAS_ARM\n \tselect BR2_ARM_CPU_HAS_THUMB\n \tselect BR2_ARM_CPU_ARMV6\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_arm1176jzf_s\n \tbool \"arm1176jzf-s\"\n \tselect BR2_ARM_CPU_HAS_ARM\n@@ -152,7 +140,6 @@ config BR2_arm1176jzf_s\n \tselect BR2_ARM_CPU_HAS_THUMB\n \tselect BR2_ARM_CPU_ARMV6\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_arm11mpcore\n \tbool \"mpcore\"\n \tselect BR2_ARM_CPU_HAS_ARM\n@@ -160,10 +147,8 @@ config BR2_arm11mpcore\n \tselect BR2_ARM_CPU_HAS_THUMB\n \tselect BR2_ARM_CPU_ARMV6\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n \n comment \"armv7a cores\"\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_cortex_a5\n \tbool \"cortex-A5\"\n \tselect BR2_ARM_CPU_HAS_ARM\n@@ -172,7 +157,6 @@ config BR2_cortex_a5\n \tselect BR2_ARM_CPU_HAS_THUMB2\n \tselect BR2_ARM_CPU_ARMV7A\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_cortex_a7\n \tbool \"cortex-A7\"\n \tselect BR2_ARM_CPU_HAS_ARM\n@@ -181,7 +165,6 @@ config BR2_cortex_a7\n \tselect BR2_ARM_CPU_HAS_THUMB2\n \tselect BR2_ARM_CPU_ARMV7A\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_cortex_a8\n \tbool \"cortex-A8\"\n \tselect BR2_ARM_CPU_HAS_ARM\n@@ -190,7 +173,6 @@ config BR2_cortex_a8\n \tselect BR2_ARM_CPU_HAS_THUMB2\n \tselect BR2_ARM_CPU_ARMV7A\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_cortex_a9\n \tbool \"cortex-A9\"\n \tselect BR2_ARM_CPU_HAS_ARM\n@@ -199,7 +181,6 @@ config BR2_cortex_a9\n \tselect BR2_ARM_CPU_HAS_THUMB2\n \tselect BR2_ARM_CPU_ARMV7A\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_cortex_a12\n \tbool \"cortex-A12\"\n \tselect BR2_ARM_CPU_HAS_ARM\n@@ -208,7 +189,6 @@ config BR2_cortex_a12\n \tselect BR2_ARM_CPU_HAS_THUMB2\n \tselect BR2_ARM_CPU_ARMV7A\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_cortex_a15\n \tbool \"cortex-A15\"\n \tselect BR2_ARM_CPU_HAS_ARM\n@@ -217,7 +197,6 @@ config BR2_cortex_a15\n \tselect BR2_ARM_CPU_HAS_THUMB2\n \tselect BR2_ARM_CPU_ARMV7A\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_cortex_a15_a7\n \tbool \"cortex-A15/A7 big.LITTLE\"\n \tselect BR2_ARM_CPU_HAS_ARM\n@@ -227,7 +206,6 @@ config BR2_cortex_a15_a7\n \tselect BR2_ARM_CPU_ARMV7A\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n \tselect BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_cortex_a17\n \tbool \"cortex-A17\"\n \tselect BR2_ARM_CPU_HAS_ARM\n@@ -237,7 +215,6 @@ config BR2_cortex_a17\n \tselect BR2_ARM_CPU_ARMV7A\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n \tselect BR2_ARCH_NEEDS_GCC_AT_LEAST_5\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_cortex_a17_a7\n \tbool \"cortex-A17/A7 big.LITTLE\"\n \tselect BR2_ARM_CPU_HAS_ARM\n@@ -247,27 +224,23 @@ config BR2_cortex_a17_a7\n \tselect BR2_ARM_CPU_ARMV7A\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n \tselect BR2_ARCH_NEEDS_GCC_AT_LEAST_5\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_pj4\n \tbool \"pj4\"\n \tselect BR2_ARM_CPU_HAS_ARM\n \tselect BR2_ARM_CPU_HAS_VFPV3\n \tselect BR2_ARM_CPU_ARMV7A\n \tselect BR2_ARCH_HAS_MMU_OPTIONAL\n-\tdepends on !BR2_ARCH_IS_64\n \n comment \"armv7m cores\"\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_cortex_m3\n \tbool \"cortex-M3\"\n \tselect BR2_ARM_CPU_HAS_THUMB2\n \tselect BR2_ARM_CPU_ARMV7M\n-\tdepends on !BR2_ARCH_IS_64\n config BR2_cortex_m4\n \tbool \"cortex-M4\"\n \tselect BR2_ARM_CPU_HAS_THUMB2\n \tselect BR2_ARM_CPU_ARMV7M\n-\tdepends on !BR2_ARCH_IS_64\n+endif # !BR2_ARCH_IS_64\n \n comment \"armv8 cores\"\n config BR2_cortex_a53\n", "prefixes": [ "2/9" ] }