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GET /api/patches/809087/?format=api
{ "id": 809087, "url": "http://patchwork.ozlabs.org/api/patches/809087/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/patch/20170902152126.17286-22-jiri@resnulli.us/", "project": { "id": 7, "url": "http://patchwork.ozlabs.org/api/projects/7/?format=api", "name": "Linux network development", "link_name": "netdev", "list_id": "netdev.vger.kernel.org", "list_email": "netdev@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170902152126.17286-22-jiri@resnulli.us>", "list_archive_url": null, "date": "2017-09-02T15:21:26", "name": "[net-next,21/21] mlxsw: reg: Add Routing Tunnel Decap Properties Register", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e6dfab8b937b5c8369b2026b203e05a3d6aeb33d", "submitter": { "id": 15321, "url": "http://patchwork.ozlabs.org/api/people/15321/?format=api", "name": "Jiri Pirko", "email": "jiri@resnulli.us" }, "delegate": { "id": 34, "url": "http://patchwork.ozlabs.org/api/users/34/?format=api", "username": "davem", "first_name": "David", "last_name": "Miller", "email": "davem@davemloft.net" }, "mbox": "http://patchwork.ozlabs.org/project/netdev/patch/20170902152126.17286-22-jiri@resnulli.us/mbox/", "series": [ { "id": 1159, "url": "http://patchwork.ozlabs.org/api/series/1159/?format=api", "web_url": "http://patchwork.ozlabs.org/project/netdev/list/?series=1159", "date": "2017-09-02T15:21:05", "name": "mlxsw: Offloading GRE tunnels", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/1159/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/809087/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/809087/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<netdev-owner@vger.kernel.org>", "X-Original-To": "patchwork-incoming@ozlabs.org", "Delivered-To": "patchwork-incoming@ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=resnulli-us.20150623.gappssmtp.com\n\theader.i=@resnulli-us.20150623.gappssmtp.com\n\theader.b=\"EVbuy05P\"; dkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xl0G63F9qz9sQl\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSun, 3 Sep 2017 01:22:06 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752803AbdIBPWE (ORCPT <rfc822;patchwork-incoming@ozlabs.org>);\n\tSat, 2 Sep 2017 11:22:04 -0400", "from mail-wr0-f196.google.com ([209.85.128.196]:34859 \"EHLO\n\tmail-wr0-f196.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752765AbdIBPWC (ORCPT\n\t<rfc822;netdev@vger.kernel.org>); Sat, 2 Sep 2017 11:22:02 -0400", "by mail-wr0-f196.google.com with SMTP id a47so1352749wra.2\n\tfor <netdev@vger.kernel.org>; Sat, 02 Sep 2017 08:22:01 -0700 (PDT)", "from localhost (jirka.pirko.cz. [84.16.102.26])\n\tby smtp.gmail.com with ESMTPSA id\n\tc56sm5389037wrc.1.2017.09.02.08.21.59\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tSat, 02 Sep 2017 08:21:59 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=resnulli-us.20150623.gappssmtp.com; s=20150623;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=nxl4JN98lu0zETJVf5bu7o7J3H6+wsDZOWBs2D5/i94=;\n\tb=EVbuy05P46hi0h/uhcqIX8x07pzUrHbLsXQ3EEQ+YIyB73iujHtTRi3OpIhSVK5v+C\n\t+b63u/bTN57ABWr3E4M5tjuJaqpvVpUtesr4H240h3hmnFZ5rwIzxZCu8ZzhGLq8ZS6h\n\t4tkeCWV5mNf49Tj1xFdcl5mW9XkThPpqvODGQtmqYOxA0mHp9jRkj3jUyAbfSyzvBEe+\n\tr4c7+0wYUcBzZCUHmevaFJEIWhN4Es0xg3k4cWQyioFcIxyLsyb0PTkGo6Naqhv35FJD\n\tCd8b6joGUqcExCVb8Te+ofK/KfMo5qOupAhLCy5WHDO50NfoU3YUNehEfIzS5gGDnUMw\n\tBWeQ==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=nxl4JN98lu0zETJVf5bu7o7J3H6+wsDZOWBs2D5/i94=;\n\tb=IIz68R1qDpDrsZK/HkLln8lKmkll2eojLG0jyW51NOiy7ajo1k32OaJncC8WfYL7b1\n\tqJCyMcx6GQ49oPm/Xay7d8StgqZIQT7beM+twBruh0aAaZOZBYKuB+Wzs09Q+OvqCzzp\n\tD3D04r9UCYwIDZM37wk4FrAWQg70DCrI2KpiN1d+uiAhYq+g5/zmpYMNEOtFkBbkDFEJ\n\tnr8oa6DsGu92FOtR/GySxiSO7OvTFmh1wz1kr2c9OdK3j+ne3oHjt1gj2g1pLDHgFYaq\n\tTEmPK3JxbXN7alLP46mPXqFUySOVUpQyBhLYoqV5lvE5mfAeSLk/ISWHBYOy6rdWKfqN\n\tLyqw==", "X-Gm-Message-State": "AHPjjUjPMPghJKXxSkIw01vFOenJWixptfKCaBx8skO0uaYpVPsdSSXW\n\t9yLV03IVpOgBNeHUhIE=", "X-Google-Smtp-Source": "ADKCNb5OXpfGy60LZHalk7CKtcgbc1avrB6HbFA7K6Mhn59PyR9AXeeL9+sCZ4/GcraTCPKPSiSN1Q==", "X-Received": "by 10.223.130.21 with SMTP id 21mr3538117wrb.243.1504365720471; \n\tSat, 02 Sep 2017 08:22:00 -0700 (PDT)", "From": "Jiri Pirko <jiri@resnulli.us>", "To": "netdev@vger.kernel.org", "Cc": "davem@davemloft.net, petrm@mellanox.com, idosch@mellanox.com,\n\tmlxsw@mellanox.com", "Subject": "[patch net-next 21/21] mlxsw: reg: Add Routing Tunnel Decap\n\tProperties Register", "Date": "Sat, 2 Sep 2017 17:21:26 +0200", "Message-Id": "<20170902152126.17286-22-jiri@resnulli.us>", "X-Mailer": "git-send-email 2.9.3", "In-Reply-To": "<20170902152126.17286-1-jiri@resnulli.us>", "References": "<20170902152126.17286-1-jiri@resnulli.us>", "Sender": "netdev-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<netdev.vger.kernel.org>", "X-Mailing-List": "netdev@vger.kernel.org" }, "content": "From: Petr Machata <petrm@mellanox.com>\n\nThe RTDP register is used for configuring the tunnel decap properties of\nNVE and IPinIP.\n\nSigned-off-by: Petr Machata <petrm@mellanox.com>\nReviewed-by: Ido Schimmel <idosch@mellanox.com>\nSigned-off-by: Jiri Pirko <jiri@mellanox.com>\n---\n drivers/net/ethernet/mellanox/mlxsw/reg.h | 129 ++++++++++++++++++++++++++++++\n 1 file changed, 129 insertions(+)", "diff": "diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h\nindex 680bc7e..cc27c5d 100644\n--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h\n+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h\n@@ -5,6 +5,7 @@\n * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>\n * Copyright (c) 2015-2017 Jiri Pirko <jiri@mellanox.com>\n * Copyright (c) 2016 Yotam Gigi <yotamg@mellanox.com>\n+ * Copyright (c) 2017 Petr Machata <petrm@mellanox.com>\n *\n * Redistribution and use in source and binary forms, with or without\n * modification, are permitted provided that the following conditions are met:\n@@ -5468,6 +5469,133 @@ static inline void mlxsw_reg_rauhtd_ent_ipv6_unpack(char *payload,\n \tmlxsw_reg_rauhtd_ipv6_ent_dip_memcpy_from(payload, rec_index, p_dip);\n }\n \n+/* RTDP - Routing Tunnel Decap Properties Register\n+ * -----------------------------------------------\n+ * The RTDP register is used for configuring the tunnel decap properties of NVE\n+ * and IPinIP.\n+ */\n+#define MLXSW_REG_RTDP_ID 0x8020\n+#define MLXSW_REG_RTDP_LEN 0x44\n+\n+MLXSW_REG_DEFINE(rtdp, MLXSW_REG_RTDP_ID, MLXSW_REG_RTDP_LEN);\n+\n+enum mlxsw_reg_rtdp_type {\n+\tMLXSW_REG_RTDP_TYPE_NVE,\n+\tMLXSW_REG_RTDP_TYPE_IPIP,\n+};\n+\n+/* reg_rtdp_type\n+ * Type of the RTDP entry as per enum mlxsw_reg_rtdp_type.\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rtdp, type, 0x00, 28, 4);\n+\n+/* reg_rtdp_tunnel_index\n+ * Index to the Decap entry.\n+ * For Spectrum, Index to KVD Linear.\n+ * Access: Index\n+ */\n+MLXSW_ITEM32(reg, rtdp, tunnel_index, 0x00, 0, 24);\n+\n+/* IPinIP */\n+\n+/* reg_rtdp_ipip_irif\n+ * Ingress Router Interface for the overlay router\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rtdp, ipip_irif, 0x04, 16, 16);\n+\n+enum mlxsw_reg_rtdp_ipip_sip_check {\n+\t/* No sip checks. */\n+\tMLXSW_REG_RTDP_IPIP_SIP_CHECK_NO,\n+\t/* Filter packet if underlay is not IPv4 or if underlay SIP does not\n+\t * equal ipv4_usip.\n+\t */\n+\tMLXSW_REG_RTDP_IPIP_SIP_CHECK_FILTER_IPV4,\n+\t/* Filter packet if underlay is not IPv6 or if underlay SIP does not\n+\t * equal ipv6_usip.\n+\t */\n+\tMLXSW_REG_RTDP_IPIP_SIP_CHECK_FILTER_IPV6 = 3,\n+};\n+\n+/* reg_rtdp_ipip_sip_check\n+ * SIP check to perform. If decapsulation failed due to these configurations\n+ * then trap_id is IPIP_DECAP_ERROR.\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rtdp, ipip_sip_check, 0x04, 0, 3);\n+\n+/* If set, allow decapsulation of IPinIP (without GRE). */\n+#define MLXSW_REG_RTDP_IPIP_TYPE_CHECK_ALLOW_IPIP\tBIT(0)\n+/* If set, allow decapsulation of IPinGREinIP without a key. */\n+#define MLXSW_REG_RTDP_IPIP_TYPE_CHECK_ALLOW_GRE\tBIT(1)\n+/* If set, allow decapsulation of IPinGREinIP with a key. */\n+#define MLXSW_REG_RTDP_IPIP_TYPE_CHECK_ALLOW_GRE_KEY\tBIT(2)\n+\n+/* reg_rtdp_ipip_type_check\n+ * Flags as per MLXSW_REG_RTDP_IPIP_TYPE_CHECK_*. If decapsulation failed due to\n+ * these configurations then trap_id is IPIP_DECAP_ERROR.\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rtdp, ipip_type_check, 0x08, 24, 3);\n+\n+/* reg_rtdp_ipip_gre_key_check\n+ * Whether GRE key should be checked. When check is enabled:\n+ * - A packet received as IPinIP (without GRE) will always pass.\n+ * - A packet received as IPinGREinIP without a key will not pass the check.\n+ * - A packet received as IPinGREinIP with a key will pass the check only if the\n+ * key in the packet is equal to expected_gre_key.\n+ * If decapsulation failed due to GRE key then trap_id is IPIP_DECAP_ERROR.\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rtdp, ipip_gre_key_check, 0x08, 23, 1);\n+\n+/* reg_rtdp_ipip_ipv4_usip\n+ * Underlay IPv4 address for ipv4 source address check.\n+ * Reserved when sip_check is not '1'.\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rtdp, ipip_ipv4_usip, 0x0C, 0, 32);\n+\n+/* reg_rtdp_ipip_ipv6_usip_ptr\n+ * This field is valid when sip_check is \"sipv6 check explicitly\". This is a\n+ * pointer to the IPv6 DIP which is configured by RIPS. For Spectrum, the index\n+ * is to the KVD linear.\n+ * Reserved when sip_check is not MLXSW_REG_RTDP_IPIP_SIP_CHECK_FILTER_IPV6.\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rtdp, ipip_ipv6_usip_ptr, 0x10, 0, 24);\n+\n+/* reg_rtdp_ipip_expected_gre_key\n+ * GRE key for checking.\n+ * Reserved when gre_key_check is '0'.\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rtdp, ipip_expected_gre_key, 0x14, 0, 32);\n+\n+static inline void mlxsw_reg_rtdp_pack(char *payload,\n+\t\t\t\t enum mlxsw_reg_rtdp_type type,\n+\t\t\t\t u32 tunnel_index)\n+{\n+\tMLXSW_REG_ZERO(rtdp, payload);\n+\tmlxsw_reg_rtdp_type_set(payload, type);\n+\tmlxsw_reg_rtdp_tunnel_index_set(payload, tunnel_index);\n+}\n+\n+static inline void\n+mlxsw_reg_rtdp_ipip4_pack(char *payload, u16 irif,\n+\t\t\t enum mlxsw_reg_rtdp_ipip_sip_check sip_check,\n+\t\t\t unsigned int type_check, bool gre_key_check,\n+\t\t\t u32 ipv4_usip, u32 expected_gre_key)\n+{\n+\tmlxsw_reg_rtdp_ipip_irif_set(payload, irif);\n+\tmlxsw_reg_rtdp_ipip_sip_check_set(payload, sip_check);\n+\tmlxsw_reg_rtdp_ipip_type_check_set(payload, type_check);\n+\tmlxsw_reg_rtdp_ipip_gre_key_check_set(payload, gre_key_check);\n+\tmlxsw_reg_rtdp_ipip_ipv4_usip_set(payload, ipv4_usip);\n+\tmlxsw_reg_rtdp_ipip_expected_gre_key_set(payload, expected_gre_key);\n+}\n+\n /* MFCR - Management Fan Control Register\n * --------------------------------------\n * This register controls the settings of the Fan Speed PWM mechanism.\n@@ -6729,6 +6857,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {\n \tMLXSW_REG(rgcr),\n \tMLXSW_REG(ritr),\n \tMLXSW_REG(ratr),\n+\tMLXSW_REG(rtdp),\n \tMLXSW_REG(ricnt),\n \tMLXSW_REG(ralta),\n \tMLXSW_REG(ralst),\n", "prefixes": [ "net-next", "21/21" ] }