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GET /api/patches/809004/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 809004,
    "url": "http://patchwork.ozlabs.org/api/patches/809004/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/15b2a02d1aae37b49a13a32c5af466e2b63c11ac.1504293917.git.alistair.francis@xilinx.com/",
    "project": {
        "id": 14,
        "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api",
        "name": "QEMU Development",
        "link_name": "qemu-devel",
        "list_id": "qemu-devel.nongnu.org",
        "list_email": "qemu-devel@nongnu.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
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        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<15b2a02d1aae37b49a13a32c5af466e2b63c11ac.1504293917.git.alistair.francis@xilinx.com>",
    "list_archive_url": null,
    "date": "2017-09-01T21:00:35",
    "name": "[v2,1/6] xlnx-zynqmp-pmu: Initial commit of the ZynqMP PMU",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "01cdee88bc972eb7c164cad13418b0558bee0b6f",
    "submitter": {
        "id": 47878,
        "url": "http://patchwork.ozlabs.org/api/people/47878/?format=api",
        "name": "Alistair Francis",
        "email": "alistair.francis@xilinx.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/15b2a02d1aae37b49a13a32c5af466e2b63c11ac.1504293917.git.alistair.francis@xilinx.com/mbox/",
    "series": [
        {
            "id": 1116,
            "url": "http://patchwork.ozlabs.org/api/series/1116/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=1116",
            "date": "2017-09-01T21:00:45",
            "name": "Add the ZynqMP PMU and IPI",
            "version": 2,
            "mbox": "http://patchwork.ozlabs.org/series/1116/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/809004/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/809004/checks/",
    "tags": {},
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        "From": "Alistair Francis <alistair.francis@xilinx.com>",
        "To": "<qemu-devel@nongnu.org>, <edgar.iglesias@xilinx.com>,\n\t<edgar.iglesias@gmail.com>",
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        "Subject": "[Qemu-devel] [PATCH v2 1/6] xlnx-zynqmp-pmu: Initial commit of the\n\tZynqMP PMU",
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        "Cc": "alistair23@gmail.com, qemu-arm@nongnu.org, alistair.francis@xilinx.com",
        "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org",
        "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"
    },
    "content": "The Xilinx ZynqMP SoC has two main processing systems in it. The ARM\nprocessing system (which is already modeled in QEMU) and the MicroBlaze\nPower Management Unit (PMU). This is the inital work for adding support\nfor the PMU.\n\nThe PMU susbsystem runs along side the ARM system on hardware, but due\nto architecture limitations in QEMU the two instances are seperate for\nthe time being.\n\nLet's follow the same setup we do with the ARM system, where there is an\nSoC device and a ZCU102 board. Although the PMU is less board specific\nwe are still going to follow the same split as maybe in future we can\nconnect the PMU device to the ARM ZCU102 board. As the machine will be\nfairly small let's keep them both together in one file.\n\nSigned-off-by: Alistair Francis <alistair.francis@xilinx.com>\n---\n\n hw/microblaze/Makefile.objs     |  1 +\n hw/microblaze/xlnx-zynqmp-pmu.c | 83 +++++++++++++++++++++++++++++++++++++++++\n 2 files changed, 84 insertions(+)\n create mode 100644 hw/microblaze/xlnx-zynqmp-pmu.c",
    "diff": "diff --git a/hw/microblaze/Makefile.objs b/hw/microblaze/Makefile.objs\nindex b2517d87fe..ae9fd40de7 100644\n--- a/hw/microblaze/Makefile.objs\n+++ b/hw/microblaze/Makefile.objs\n@@ -1,3 +1,4 @@\n obj-y += petalogix_s3adsp1800_mmu.o\n obj-y += petalogix_ml605_mmu.o\n+obj-y += xlnx-zynqmp-pmu.o\n obj-y += boot.o\ndiff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c\nnew file mode 100644\nindex 0000000000..fc3c8b236f\n--- /dev/null\n+++ b/hw/microblaze/xlnx-zynqmp-pmu.c\n@@ -0,0 +1,83 @@\n+/*\n+ * Xilinx Zynq MPSoC PMU (Power Management Unit) emulation\n+ *\n+ * Copyright (C) 2017 Xilinx Inc\n+ * Written by Alistair Francis <alistair.francis@xilinx.com>\n+ *\n+ * This program is free software; you can redistribute it and/or modify it\n+ * under the terms of the GNU General Public License as published by the\n+ * Free Software Foundation; either version 2 of the License, or\n+ * (at your option) any later version.\n+ *\n+ * This program is distributed in the hope that it will be useful, but WITHOUT\n+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\n+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\n+ * for more details.\n+ */\n+\n+#include \"qemu/osdep.h\"\n+#include \"qapi/error.h\"\n+#include \"qemu-common.h\"\n+#include \"hw/boards.h\"\n+#include \"cpu.h\"\n+\n+/* Define the PMU device */\n+\n+#define TYPE_XLNX_ZYNQMP_PMU \"xlnx,zynqmp-pmu\"\n+#define XLNX_ZYNQMP_PMU(obj) OBJECT_CHECK(XlnxZynqMPPMUState, (obj), \\\n+                                          TYPE_XLNX_ZYNQMP_PMU)\n+\n+typedef struct XlnxZynqMPPMUState {\n+    /*< private >*/\n+    DeviceState parent_obj;\n+\n+    /*< public >*/\n+}  XlnxZynqMPPMUState;\n+\n+static void xlnx_zynqmp_pmu_init(Object *obj)\n+{\n+\n+}\n+\n+static void xlnx_zynqmp_pmu_realize(DeviceState *dev, Error **errp)\n+{\n+\n+}\n+\n+static void xlnx_zynqmp_pmu_class_init(ObjectClass *oc, void *data)\n+{\n+    DeviceClass *dc = DEVICE_CLASS(oc);\n+\n+    dc->realize = xlnx_zynqmp_pmu_realize;\n+}\n+\n+static const TypeInfo xlnx_zynqmp_pmu_type_info = {\n+    .name = TYPE_XLNX_ZYNQMP_PMU,\n+    .parent = TYPE_DEVICE,\n+    .instance_size = sizeof(XlnxZynqMPPMUState),\n+    .instance_init = xlnx_zynqmp_pmu_init,\n+    .class_init = xlnx_zynqmp_pmu_class_init,\n+};\n+\n+static void xlnx_zynqmp_pmu_register_types(void)\n+{\n+    type_register_static(&xlnx_zynqmp_pmu_type_info);\n+}\n+\n+type_init(xlnx_zynqmp_pmu_register_types)\n+\n+/* Define the PMU Machine */\n+\n+static void xlnx_zcu102_pmu_init(MachineState *machine)\n+{\n+\n+}\n+\n+static void xlnx_zcu102_pmu_machine_init(MachineClass *mc)\n+{\n+    mc->desc = \"Xilinx ZynqMP ZCU102 PMU machine\";\n+    mc->init = xlnx_zcu102_pmu_init;\n+}\n+\n+DEFINE_MACHINE(\"xlnx-zcu102-pmu\", xlnx_zcu102_pmu_machine_init)\n+\n",
    "prefixes": [
        "v2",
        "1/6"
    ]
}