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GET /api/patches/808975/?format=api
{ "id": 808975, "url": "http://patchwork.ozlabs.org/api/patches/808975/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20170901185736.28051-4-thierry.reding@gmail.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170901185736.28051-4-thierry.reding@gmail.com>", "list_archive_url": null, "date": "2017-09-01T18:57:23", "name": "[03/16] gpio: Move irqdomain into struct gpio_irq_chip", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "6b235b588082ba62170d7e2813607d0b3f14c22d", "submitter": { "id": 26234, "url": "http://patchwork.ozlabs.org/api/people/26234/?format=api", "name": "Thierry Reding", "email": "thierry.reding@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20170901185736.28051-4-thierry.reding@gmail.com/mbox/", "series": [ { "id": 1098, "url": "http://patchwork.ozlabs.org/api/series/1098/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=1098", "date": "2017-09-01T18:57:20", "name": "gpio: Tight IRQ chip integration and banked infrastructure", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/1098/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/808975/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/808975/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-gpio-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"C1Ee2/w2\"; dkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xkTCL3qJsz9sQl\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 2 Sep 2017 05:02:54 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752604AbdIATBd (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tFri, 1 Sep 2017 15:01:33 -0400", "from mail-wm0-f65.google.com ([74.125.82.65]:35764 \"EHLO\n\tmail-wm0-f65.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752367AbdIAS5p (ORCPT\n\t<rfc822; linux-gpio@vger.kernel.org>); Fri, 1 Sep 2017 14:57:45 -0400", "by mail-wm0-f65.google.com with SMTP id e204so963573wma.2;\n\tFri, 01 Sep 2017 11:57:44 -0700 (PDT)", "from localhost\n\t(p200300E41BD6D60076D02BFFFE273F51.dip0.t-ipconnect.de.\n\t[2003:e4:1bd6:d600:76d0:2bff:fe27:3f51])\n\tby smtp.gmail.com with ESMTPSA id\n\tu15sm1049846wrg.31.2017.09.01.11.57.42\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tFri, 01 Sep 2017 11:57:42 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=DfPEhHEGNkd4RhSZqUa7rfcA6a5QDNVHpiIVlKirOCg=;\n\tb=C1Ee2/w2gIdzfJa7Wu8f+t9+hQzY/AqzJ+wxRE07Hx35rubAnm8+wiiKf+FYqdgPXp\n\tuHh9OIoT4ukBX8ewGWPwYUbumLejINWEAbXmuci2LXwDbne8ckSIkBCQXDU9kI76JbWk\n\tCeGhytStiIUDu+V6+NckaCmDTWt5jEGCmYuymRbbZnuKV906z17AU6RgxxCY6J69jDSQ\n\tdZSFyPQ+7sBh+Rv/LKCXY2w+eC3peRizjL649PSJh20dQ8/gRwH8z99Lp065ZDoZHnSI\n\t70OuCLHoZ/ahDEAN/pKoswa2IR1db8O+f9Ft0rHdMVx4K35Keq3D0J8zgVhJUxgWN0c7\n\t50Tw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=DfPEhHEGNkd4RhSZqUa7rfcA6a5QDNVHpiIVlKirOCg=;\n\tb=ehCICKo2DFwcjeDCcwf4LFTKyoWzIR+jV2FoZZ0XLZTMP1+RevbbklsFOH3aPgnCc2\n\t1QeOKoA31yhArIqpLcTTyn0MPqIJvZj64kywA694fjF0BIOncAbYRZ/RKi9VsWm6yGNb\n\tOWcDOcMYhzGJeXFTUyN0XESD8AAhlPugkxOjsfkjIXdJIdtkbUH+w/wGsi9b1Ab2aLzn\n\tcjn9JXpsI+U4L/Ar0HYin/r5ukGoqQxFA4GCs31ZJufTAcuumljKfadxWAWB1i0K/PRH\n\tvZb9CozHEccjDuymTO0RrDwYI3ftCrI5cJbSebLlEj8Wlm3XO97UEBUrKIYiit1hmPn/\n\t9ccA==", "X-Gm-Message-State": "AHPjjUjI/HgOEuRDQTbuVJh24xYwxPgPxrc9Fmk3uMHS1n9DIGjqfVo2\n\t11YKYUP0KgKLAsax", "X-Google-Smtp-Source": "ADKCNb6uwCmL/lWjuEM3pdpWA4r7k84Xo9Q05JYapbNV6Z5fMpYG7AMW7iEDD/UvHC5jDY8VrvpZYA==", "X-Received": "by 10.28.20.18 with SMTP id 18mr946625wmu.7.1504292263417;\n\tFri, 01 Sep 2017 11:57:43 -0700 (PDT)", "From": "Thierry Reding <thierry.reding@gmail.com>", "To": "Linus Walleij <linus.walleij@linaro.org>", "Cc": "Jonathan Hunter <jonathanh@nvidia.com>, linux-gpio@vger.kernel.org,\n\tlinux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org", "Subject": "[PATCH 03/16] gpio: Move irqdomain into struct gpio_irq_chip", "Date": "Fri, 1 Sep 2017 20:57:23 +0200", "Message-Id": "<20170901185736.28051-4-thierry.reding@gmail.com>", "X-Mailer": "git-send-email 2.13.3", "In-Reply-To": "<20170901185736.28051-1-thierry.reding@gmail.com>", "References": "<20170901185736.28051-1-thierry.reding@gmail.com>", "Sender": "linux-gpio-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-gpio.vger.kernel.org>", "X-Mailing-List": "linux-gpio@vger.kernel.org" }, "content": "From: Thierry Reding <treding@nvidia.com>\n\nIn order to consolidate the multiple ways to associate an IRQ chip with\na GPIO chip, move more fields into the new struct gpio_irq_chip.\n\nSigned-off-by: Thierry Reding <treding@nvidia.com>\n---\n Documentation/gpio/driver.txt | 2 +-\n drivers/bcma/driver_gpio.c | 2 +-\n drivers/gpio/gpio-104-dio-48e.c | 2 +-\n drivers/gpio/gpio-104-idi-48.c | 2 +-\n drivers/gpio/gpio-104-idio-16.c | 2 +-\n drivers/gpio/gpio-adnp.c | 2 +-\n drivers/gpio/gpio-altera.c | 4 ++--\n drivers/gpio/gpio-aspeed.c | 2 +-\n drivers/gpio/gpio-ath79.c | 2 +-\n drivers/gpio/gpio-brcmstb.c | 2 +-\n drivers/gpio/gpio-crystalcove.c | 2 +-\n drivers/gpio/gpio-dln2.c | 2 +-\n drivers/gpio/gpio-ftgpio010.c | 2 +-\n drivers/gpio/gpio-ingenic.c | 2 +-\n drivers/gpio/gpio-intel-mid.c | 2 +-\n drivers/gpio/gpio-lynxpoint.c | 2 +-\n drivers/gpio/gpio-max732x.c | 2 +-\n drivers/gpio/gpio-merrifield.c | 2 +-\n drivers/gpio/gpio-omap.c | 2 +-\n drivers/gpio/gpio-pca953x.c | 2 +-\n drivers/gpio/gpio-pcf857x.c | 2 +-\n drivers/gpio/gpio-pci-idio-16.c | 2 +-\n drivers/gpio/gpio-pl061.c | 2 +-\n drivers/gpio/gpio-rcar.c | 2 +-\n drivers/gpio/gpio-reg.c | 4 ++--\n drivers/gpio/gpio-stmpe.c | 2 +-\n drivers/gpio/gpio-tc3589x.c | 2 +-\n drivers/gpio/gpio-vf610.c | 2 +-\n drivers/gpio/gpio-wcove.c | 2 +-\n drivers/gpio/gpio-ws16c48.c | 2 +-\n drivers/gpio/gpio-xgene-sb.c | 2 +-\n drivers/gpio/gpio-xlp.c | 2 +-\n drivers/gpio/gpio-zx.c | 2 +-\n drivers/gpio/gpio-zynq.c | 2 +-\n drivers/gpio/gpiolib.c | 32 +++++++++++++++--------------\n drivers/pinctrl/bcm/pinctrl-bcm2835.c | 4 ++--\n drivers/pinctrl/bcm/pinctrl-iproc-gpio.c | 2 +-\n drivers/pinctrl/intel/pinctrl-baytrail.c | 2 +-\n drivers/pinctrl/intel/pinctrl-cherryview.c | 2 +-\n drivers/pinctrl/intel/pinctrl-intel.c | 2 +-\n drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 2 +-\n drivers/pinctrl/nomadik/pinctrl-nomadik.c | 4 ++--\n drivers/pinctrl/pinctrl-amd.c | 2 +-\n drivers/pinctrl/pinctrl-at91.c | 2 +-\n drivers/pinctrl/pinctrl-coh901.c | 2 +-\n drivers/pinctrl/pinctrl-mcp23s08.c | 2 +-\n drivers/pinctrl/pinctrl-oxnas.c | 2 +-\n drivers/pinctrl/pinctrl-pic32.c | 2 +-\n drivers/pinctrl/pinctrl-pistachio.c | 2 +-\n drivers/pinctrl/pinctrl-st.c | 2 +-\n drivers/pinctrl/pinctrl-sx150x.c | 2 +-\n drivers/pinctrl/qcom/pinctrl-msm.c | 2 +-\n drivers/pinctrl/sirf/pinctrl-atlas7.c | 2 +-\n drivers/pinctrl/sirf/pinctrl-sirf.c | 2 +-\n drivers/pinctrl/spear/pinctrl-plgpio.c | 2 +-\n drivers/platform/x86/intel_int0002_vgpio.c | 2 +-\n include/linux/gpio/driver.h | 11 +++++++---\n 57 files changed, 84 insertions(+), 77 deletions(-)", "diff": "diff --git a/Documentation/gpio/driver.txt b/Documentation/gpio/driver.txt\nindex fc1d2f83564d..dcf6af1d9e56 100644\n--- a/Documentation/gpio/driver.txt\n+++ b/Documentation/gpio/driver.txt\n@@ -254,7 +254,7 @@ GPIO irqchips usually fall in one of two categories:\n \tstatic irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank)\n \t\tunsigned long wa_lock_flags;\n \t\traw_spin_lock_irqsave(&bank->wa_lock, wa_lock_flags);\n-\t\tgeneric_handle_irq(irq_find_mapping(bank->chip.irqdomain, bit));\n+\t\tgeneric_handle_irq(irq_find_mapping(bank->chip.irq.domain, bit));\n \t\traw_spin_unlock_irqrestore(&bank->wa_lock, wa_lock_flags);\n \n * GENERIC CHAINED GPIO irqchips: these are the same as \"CHAINED GPIO irqchips\",\ndiff --git a/drivers/bcma/driver_gpio.c b/drivers/bcma/driver_gpio.c\nindex 982d5781d3ce..2c0ffb77d738 100644\n--- a/drivers/bcma/driver_gpio.c\n+++ b/drivers/bcma/driver_gpio.c\n@@ -113,7 +113,7 @@ static irqreturn_t bcma_gpio_irq_handler(int irq, void *dev_id)\n \t\treturn IRQ_NONE;\n \n \tfor_each_set_bit(gpio, &irqs, gc->ngpio)\n-\t\tgeneric_handle_irq(irq_find_mapping(gc->irqdomain, gpio));\n+\t\tgeneric_handle_irq(irq_find_mapping(gc->irq.domain, gpio));\n \tbcma_chipco_gpio_polarity(cc, irqs, val & irqs);\n \n \treturn IRQ_HANDLED;\ndiff --git a/drivers/gpio/gpio-104-dio-48e.c b/drivers/gpio/gpio-104-dio-48e.c\nindex 598e209efa2d..bab3b94c5cbc 100644\n--- a/drivers/gpio/gpio-104-dio-48e.c\n+++ b/drivers/gpio/gpio-104-dio-48e.c\n@@ -326,7 +326,7 @@ static irqreturn_t dio48e_irq_handler(int irq, void *dev_id)\n \tunsigned long gpio;\n \n \tfor_each_set_bit(gpio, &irq_mask, 2)\n-\t\tgeneric_handle_irq(irq_find_mapping(chip->irqdomain,\n+\t\tgeneric_handle_irq(irq_find_mapping(chip->irq.domain,\n \t\t\t19 + gpio*24));\n \n \traw_spin_lock(&dio48egpio->lock);\ndiff --git a/drivers/gpio/gpio-104-idi-48.c b/drivers/gpio/gpio-104-idi-48.c\nindex 51f046e29ff7..add859d59766 100644\n--- a/drivers/gpio/gpio-104-idi-48.c\n+++ b/drivers/gpio/gpio-104-idi-48.c\n@@ -209,7 +209,7 @@ static irqreturn_t idi_48_irq_handler(int irq, void *dev_id)\n \t\tfor_each_set_bit(bit_num, &irq_mask, 8) {\n \t\t\tgpio = bit_num + boundary * 8;\n \n-\t\t\tgeneric_handle_irq(irq_find_mapping(chip->irqdomain,\n+\t\t\tgeneric_handle_irq(irq_find_mapping(chip->irq.domain,\n \t\t\t\tgpio));\n \t\t}\n \t}\ndiff --git a/drivers/gpio/gpio-104-idio-16.c b/drivers/gpio/gpio-104-idio-16.c\nindex ec2ce34ff473..2f16638a0589 100644\n--- a/drivers/gpio/gpio-104-idio-16.c\n+++ b/drivers/gpio/gpio-104-idio-16.c\n@@ -199,7 +199,7 @@ static irqreturn_t idio_16_irq_handler(int irq, void *dev_id)\n \tint gpio;\n \n \tfor_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio)\n-\t\tgeneric_handle_irq(irq_find_mapping(chip->irqdomain, gpio));\n+\t\tgeneric_handle_irq(irq_find_mapping(chip->irq.domain, gpio));\n \n \traw_spin_lock(&idio16gpio->lock);\n \ndiff --git a/drivers/gpio/gpio-adnp.c b/drivers/gpio/gpio-adnp.c\nindex 89863ea25de1..9d143ae4219f 100644\n--- a/drivers/gpio/gpio-adnp.c\n+++ b/drivers/gpio/gpio-adnp.c\n@@ -323,7 +323,7 @@ static irqreturn_t adnp_irq(int irq, void *data)\n \n \t\tfor_each_set_bit(bit, &pending, 8) {\n \t\t\tunsigned int child_irq;\n-\t\t\tchild_irq = irq_find_mapping(adnp->gpio.irqdomain,\n+\t\t\tchild_irq = irq_find_mapping(adnp->gpio.irq.domain,\n \t\t\t\t\t\t base + bit);\n \t\t\thandle_nested_irq(child_irq);\n \t\t}\ndiff --git a/drivers/gpio/gpio-altera.c b/drivers/gpio/gpio-altera.c\nindex ccc02ed65b3c..8e76d390e653 100644\n--- a/drivers/gpio/gpio-altera.c\n+++ b/drivers/gpio/gpio-altera.c\n@@ -211,7 +211,7 @@ static void altera_gpio_irq_edge_handler(struct irq_desc *desc)\n \taltera_gc = gpiochip_get_data(irq_desc_get_handler_data(desc));\n \tchip = irq_desc_get_chip(desc);\n \tmm_gc = &altera_gc->mmchip;\n-\tirqdomain = altera_gc->mmchip.gc.irqdomain;\n+\tirqdomain = altera_gc->mmchip.gc.irq.domain;\n \n \tchained_irq_enter(chip, desc);\n \n@@ -239,7 +239,7 @@ static void altera_gpio_irq_leveL_high_handler(struct irq_desc *desc)\n \taltera_gc = gpiochip_get_data(irq_desc_get_handler_data(desc));\n \tchip = irq_desc_get_chip(desc);\n \tmm_gc = &altera_gc->mmchip;\n-\tirqdomain = altera_gc->mmchip.gc.irqdomain;\n+\tirqdomain = altera_gc->mmchip.gc.irq.domain;\n \n \tchained_irq_enter(chip, desc);\n \ndiff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c\nindex bfc53995064a..a9342b471359 100644\n--- a/drivers/gpio/gpio-aspeed.c\n+++ b/drivers/gpio/gpio-aspeed.c\n@@ -466,7 +466,7 @@ static void aspeed_gpio_irq_handler(struct irq_desc *desc)\n \t\treg = ioread32(bank_irq_reg(data, bank, GPIO_IRQ_STATUS));\n \n \t\tfor_each_set_bit(p, ®, 32) {\n-\t\t\tgirq = irq_find_mapping(gc->irqdomain, i * 32 + p);\n+\t\t\tgirq = irq_find_mapping(gc->irq.domain, i * 32 + p);\n \t\t\tgeneric_handle_irq(girq);\n \t\t}\n \ndiff --git a/drivers/gpio/gpio-ath79.c b/drivers/gpio/gpio-ath79.c\nindex f33d4a5fe671..299e9f7b6b9d 100644\n--- a/drivers/gpio/gpio-ath79.c\n+++ b/drivers/gpio/gpio-ath79.c\n@@ -208,7 +208,7 @@ static void ath79_gpio_irq_handler(struct irq_desc *desc)\n \tif (pending) {\n \t\tfor_each_set_bit(irq, &pending, gc->ngpio)\n \t\t\tgeneric_handle_irq(\n-\t\t\t\tirq_linear_revmap(gc->irqdomain, irq));\n+\t\t\t\tirq_linear_revmap(gc->irq.domain, irq));\n \t}\n \n \tchained_irq_exit(irqchip, desc);\ndiff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c\nindex dd0308cc8bb0..4aadbae3c43f 100644\n--- a/drivers/gpio/gpio-brcmstb.c\n+++ b/drivers/gpio/gpio-brcmstb.c\n@@ -202,7 +202,7 @@ static irqreturn_t brcmstb_gpio_wake_irq_handler(int irq, void *data)\n static void brcmstb_gpio_irq_bank_handler(struct brcmstb_gpio_bank *bank)\n {\n \tstruct brcmstb_gpio_priv *priv = bank->parent_priv;\n-\tstruct irq_domain *irq_domain = bank->gc.irqdomain;\n+\tstruct irq_domain *irq_domain = bank->gc.irq.domain;\n \tvoid __iomem *reg_base = priv->reg_base;\n \tunsigned long status;\n \tunsigned long flags;\ndiff --git a/drivers/gpio/gpio-crystalcove.c b/drivers/gpio/gpio-crystalcove.c\nindex e60156ec0c18..b6f0f729656c 100644\n--- a/drivers/gpio/gpio-crystalcove.c\n+++ b/drivers/gpio/gpio-crystalcove.c\n@@ -295,7 +295,7 @@ static irqreturn_t crystalcove_gpio_irq_handler(int irq, void *data)\n \n \tfor (gpio = 0; gpio < CRYSTALCOVE_GPIO_NUM; gpio++) {\n \t\tif (pending & BIT(gpio)) {\n-\t\t\tvirq = irq_find_mapping(cg->chip.irqdomain, gpio);\n+\t\t\tvirq = irq_find_mapping(cg->chip.irq.domain, gpio);\n \t\t\thandle_nested_irq(virq);\n \t\t}\n \t}\ndiff --git a/drivers/gpio/gpio-dln2.c b/drivers/gpio/gpio-dln2.c\nindex aecb847166f5..1dada68b9a27 100644\n--- a/drivers/gpio/gpio-dln2.c\n+++ b/drivers/gpio/gpio-dln2.c\n@@ -420,7 +420,7 @@ static void dln2_gpio_event(struct platform_device *pdev, u16 echo,\n \t\treturn;\n \t}\n \n-\tirq = irq_find_mapping(dln2->gpio.irqdomain, pin);\n+\tirq = irq_find_mapping(dln2->gpio.irq.domain, pin);\n \tif (!irq) {\n \t\tdev_err(dln2->gpio.parent, \"pin %d not mapped to IRQ\\n\", pin);\n \t\treturn;\ndiff --git a/drivers/gpio/gpio-ftgpio010.c b/drivers/gpio/gpio-ftgpio010.c\nindex e9386f8b67f5..b7896bae83ca 100644\n--- a/drivers/gpio/gpio-ftgpio010.c\n+++ b/drivers/gpio/gpio-ftgpio010.c\n@@ -149,7 +149,7 @@ static void ftgpio_gpio_irq_handler(struct irq_desc *desc)\n \tstat = readl(g->base + GPIO_INT_STAT);\n \tif (stat)\n \t\tfor_each_set_bit(offset, &stat, gc->ngpio)\n-\t\t\tgeneric_handle_irq(irq_find_mapping(gc->irqdomain,\n+\t\t\tgeneric_handle_irq(irq_find_mapping(gc->irq.domain,\n \t\t\t\t\t\t\t offset));\n \n \tchained_irq_exit(irqchip, desc);\ndiff --git a/drivers/gpio/gpio-ingenic.c b/drivers/gpio/gpio-ingenic.c\nindex 254780730b95..15fb2bc796a8 100644\n--- a/drivers/gpio/gpio-ingenic.c\n+++ b/drivers/gpio/gpio-ingenic.c\n@@ -242,7 +242,7 @@ static void ingenic_gpio_irq_handler(struct irq_desc *desc)\n \t\tflag = gpio_ingenic_read_reg(jzgc, JZ4740_GPIO_FLAG);\n \n \tfor_each_set_bit(i, &flag, 32)\n-\t\tgeneric_handle_irq(irq_linear_revmap(gc->irqdomain, i));\n+\t\tgeneric_handle_irq(irq_linear_revmap(gc->irq.domain, i));\n \tchained_irq_exit(irq_chip, desc);\n }\n \ndiff --git a/drivers/gpio/gpio-intel-mid.c b/drivers/gpio/gpio-intel-mid.c\nindex b76ecee82c3f..629575ea46a0 100644\n--- a/drivers/gpio/gpio-intel-mid.c\n+++ b/drivers/gpio/gpio-intel-mid.c\n@@ -295,7 +295,7 @@ static void intel_mid_irq_handler(struct irq_desc *desc)\n \t\t\tmask = BIT(gpio);\n \t\t\t/* Clear before handling so we can't lose an edge */\n \t\t\twritel(mask, gedr);\n-\t\t\tgeneric_handle_irq(irq_find_mapping(gc->irqdomain,\n+\t\t\tgeneric_handle_irq(irq_find_mapping(gc->irq.domain,\n \t\t\t\t\t\t\t base + gpio));\n \t\t}\n \t}\ndiff --git a/drivers/gpio/gpio-lynxpoint.c b/drivers/gpio/gpio-lynxpoint.c\nindex fbd393b46ce0..1e557b10d73e 100644\n--- a/drivers/gpio/gpio-lynxpoint.c\n+++ b/drivers/gpio/gpio-lynxpoint.c\n@@ -255,7 +255,7 @@ static void lp_gpio_irq_handler(struct irq_desc *desc)\n \t\t\tmask = BIT(pin);\n \t\t\t/* Clear before handling so we don't lose an edge */\n \t\t\toutl(mask, reg);\n-\t\t\tirq = irq_find_mapping(lg->chip.irqdomain, base + pin);\n+\t\t\tirq = irq_find_mapping(lg->chip.irq.domain, base + pin);\n \t\t\tgeneric_handle_irq(irq);\n \t\t}\n \t}\ndiff --git a/drivers/gpio/gpio-max732x.c b/drivers/gpio/gpio-max732x.c\nindex 7f4d26ce5f23..c04fae1ba32a 100644\n--- a/drivers/gpio/gpio-max732x.c\n+++ b/drivers/gpio/gpio-max732x.c\n@@ -486,7 +486,7 @@ static irqreturn_t max732x_irq_handler(int irq, void *devid)\n \n \tdo {\n \t\tlevel = __ffs(pending);\n-\t\thandle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain,\n+\t\thandle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,\n \t\t\t\t\t\t level));\n \n \t\tpending &= ~(1 << level);\ndiff --git a/drivers/gpio/gpio-merrifield.c b/drivers/gpio/gpio-merrifield.c\nindex ec8560298805..dd67a31ac337 100644\n--- a/drivers/gpio/gpio-merrifield.c\n+++ b/drivers/gpio/gpio-merrifield.c\n@@ -357,7 +357,7 @@ static void mrfld_irq_handler(struct irq_desc *desc)\n \t\tfor_each_set_bit(gpio, &pending, 32) {\n \t\t\tunsigned int irq;\n \n-\t\t\tirq = irq_find_mapping(gc->irqdomain, base + gpio);\n+\t\t\tirq = irq_find_mapping(gc->irq.domain, base + gpio);\n \t\t\tgeneric_handle_irq(irq);\n \t\t}\n \t}\ndiff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c\nindex dbf869fb63ce..ce27d6a586bf 100644\n--- a/drivers/gpio/gpio-omap.c\n+++ b/drivers/gpio/gpio-omap.c\n@@ -733,7 +733,7 @@ static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank)\n \n \t\t\traw_spin_lock_irqsave(&bank->wa_lock, wa_lock_flags);\n \n-\t\t\tgeneric_handle_irq(irq_find_mapping(bank->chip.irqdomain,\n+\t\t\tgeneric_handle_irq(irq_find_mapping(bank->chip.irq.domain,\n \t\t\t\t\t\t\t bit));\n \n \t\t\traw_spin_unlock_irqrestore(&bank->wa_lock,\ndiff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c\nindex 1b9dbf691ae7..babb7bd2ba59 100644\n--- a/drivers/gpio/gpio-pca953x.c\n+++ b/drivers/gpio/gpio-pca953x.c\n@@ -608,7 +608,7 @@ static irqreturn_t pca953x_irq_handler(int irq, void *devid)\n \tfor (i = 0; i < NBANK(chip); i++) {\n \t\twhile (pending[i]) {\n \t\t\tlevel = __ffs(pending[i]);\n-\t\t\thandle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain,\n+\t\t\thandle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,\n \t\t\t\t\t\t\tlevel + (BANK_SZ * i)));\n \t\t\tpending[i] &= ~(1 << level);\n \t\t\tnhandled++;\ndiff --git a/drivers/gpio/gpio-pcf857x.c b/drivers/gpio/gpio-pcf857x.c\nindex a4fd78b9c0e4..38fbb420c6cd 100644\n--- a/drivers/gpio/gpio-pcf857x.c\n+++ b/drivers/gpio/gpio-pcf857x.c\n@@ -196,7 +196,7 @@ static irqreturn_t pcf857x_irq(int irq, void *data)\n \tmutex_unlock(&gpio->lock);\n \n \tfor_each_set_bit(i, &change, gpio->chip.ngpio)\n-\t\thandle_nested_irq(irq_find_mapping(gpio->chip.irqdomain, i));\n+\t\thandle_nested_irq(irq_find_mapping(gpio->chip.irq.domain, i));\n \n \treturn IRQ_HANDLED;\n }\ndiff --git a/drivers/gpio/gpio-pci-idio-16.c b/drivers/gpio/gpio-pci-idio-16.c\nindex 7de4f6a2cb49..57d1b7fbf07b 100644\n--- a/drivers/gpio/gpio-pci-idio-16.c\n+++ b/drivers/gpio/gpio-pci-idio-16.c\n@@ -240,7 +240,7 @@ static irqreturn_t idio_16_irq_handler(int irq, void *dev_id)\n \t\treturn IRQ_NONE;\n \n \tfor_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio)\n-\t\tgeneric_handle_irq(irq_find_mapping(chip->irqdomain, gpio));\n+\t\tgeneric_handle_irq(irq_find_mapping(chip->irq.domain, gpio));\n \n \traw_spin_lock(&idio16gpio->lock);\n \ndiff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c\nindex 3d3d6b6645a7..646a5a12dd7b 100644\n--- a/drivers/gpio/gpio-pl061.c\n+++ b/drivers/gpio/gpio-pl061.c\n@@ -221,7 +221,7 @@ static void pl061_irq_handler(struct irq_desc *desc)\n \tpending = readb(pl061->base + GPIOMIS);\n \tif (pending) {\n \t\tfor_each_set_bit(offset, &pending, PL061_GPIO_NR)\n-\t\t\tgeneric_handle_irq(irq_find_mapping(gc->irqdomain,\n+\t\t\tgeneric_handle_irq(irq_find_mapping(gc->irq.domain,\n \t\t\t\t\t\t\t offset));\n \t}\n \ndiff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c\nindex 1f0871553fd2..5bd1339d5a48 100644\n--- a/drivers/gpio/gpio-rcar.c\n+++ b/drivers/gpio/gpio-rcar.c\n@@ -206,7 +206,7 @@ static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id)\n \t\t\t gpio_rcar_read(p, INTMSK))) {\n \t\toffset = __ffs(pending);\n \t\tgpio_rcar_write(p, INTCLR, BIT(offset));\n-\t\tgeneric_handle_irq(irq_find_mapping(p->gpio_chip.irqdomain,\n+\t\tgeneric_handle_irq(irq_find_mapping(p->gpio_chip.irq.domain,\n \t\t\t\t\t\t offset));\n \t\tirqs_handled++;\n \t}\ndiff --git a/drivers/gpio/gpio-reg.c b/drivers/gpio/gpio-reg.c\nindex e85903eddc68..23e771dba4c1 100644\n--- a/drivers/gpio/gpio-reg.c\n+++ b/drivers/gpio/gpio-reg.c\n@@ -103,8 +103,8 @@ static int gpio_reg_to_irq(struct gpio_chip *gc, unsigned offset)\n \tstruct gpio_reg *r = to_gpio_reg(gc);\n \tint irq = r->irqs[offset];\n \n-\tif (irq >= 0 && r->irqdomain)\n-\t\tirq = irq_find_mapping(r->irqdomain, irq);\n+\tif (irq >= 0 && r->irq.domain)\n+\t\tirq = irq_find_mapping(r->irq.domain, irq);\n \n \treturn irq;\n }\ndiff --git a/drivers/gpio/gpio-stmpe.c b/drivers/gpio/gpio-stmpe.c\nindex 16cbc5702865..5aee24fe0254 100644\n--- a/drivers/gpio/gpio-stmpe.c\n+++ b/drivers/gpio/gpio-stmpe.c\n@@ -397,7 +397,7 @@ static irqreturn_t stmpe_gpio_irq(int irq, void *dev)\n \t\twhile (stat) {\n \t\t\tint bit = __ffs(stat);\n \t\t\tint line = bank * 8 + bit;\n-\t\t\tint child_irq = irq_find_mapping(stmpe_gpio->chip.irqdomain,\n+\t\t\tint child_irq = irq_find_mapping(stmpe_gpio->chip.irq.domain,\n \t\t\t\t\t\t\t line);\n \n \t\t\thandle_nested_irq(child_irq);\ndiff --git a/drivers/gpio/gpio-tc3589x.c b/drivers/gpio/gpio-tc3589x.c\nindex 433b45ef332e..91a8ef8e7f3f 100644\n--- a/drivers/gpio/gpio-tc3589x.c\n+++ b/drivers/gpio/gpio-tc3589x.c\n@@ -268,7 +268,7 @@ static irqreturn_t tc3589x_gpio_irq(int irq, void *dev)\n \t\twhile (stat) {\n \t\t\tint bit = __ffs(stat);\n \t\t\tint line = i * 8 + bit;\n-\t\t\tint irq = irq_find_mapping(tc3589x_gpio->chip.irqdomain,\n+\t\t\tint irq = irq_find_mapping(tc3589x_gpio->chip.irq.domain,\n \t\t\t\t\t\t line);\n \n \t\t\thandle_nested_irq(irq);\ndiff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c\nindex cbe9e06861de..4610cc2938ad 100644\n--- a/drivers/gpio/gpio-vf610.c\n+++ b/drivers/gpio/gpio-vf610.c\n@@ -160,7 +160,7 @@ static void vf610_gpio_irq_handler(struct irq_desc *desc)\n \tfor_each_set_bit(pin, &irq_isfr, VF610_GPIO_PER_PORT) {\n \t\tvf610_gpio_writel(BIT(pin), port->base + PORT_ISFR);\n \n-\t\tgeneric_handle_irq(irq_find_mapping(port->gc.irqdomain, pin));\n+\t\tgeneric_handle_irq(irq_find_mapping(port->gc.irq.domain, pin));\n \t}\n \n \tchained_irq_exit(chip, desc);\ndiff --git a/drivers/gpio/gpio-wcove.c b/drivers/gpio/gpio-wcove.c\nindex 85341eab795d..dde7c6aecbb5 100644\n--- a/drivers/gpio/gpio-wcove.c\n+++ b/drivers/gpio/gpio-wcove.c\n@@ -350,7 +350,7 @@ static irqreturn_t wcove_gpio_irq_handler(int irq, void *data)\n \t\t\toffset = (gpio > GROUP0_NR_IRQS) ? 1 : 0;\n \t\t\tmask = (offset == 1) ? BIT(gpio - GROUP0_NR_IRQS) :\n \t\t\t\t\t\t\t\tBIT(gpio);\n-\t\t\tvirq = irq_find_mapping(wg->chip.irqdomain, gpio);\n+\t\t\tvirq = irq_find_mapping(wg->chip.irq.domain, gpio);\n \t\t\thandle_nested_irq(virq);\n \t\t\tregmap_update_bits(wg->regmap, IRQ_STATUS_BASE + offset,\n \t\t\t\t\t\t\t\tmask, mask);\ndiff --git a/drivers/gpio/gpio-ws16c48.c b/drivers/gpio/gpio-ws16c48.c\nindex 5037974ac063..746648244bf3 100644\n--- a/drivers/gpio/gpio-ws16c48.c\n+++ b/drivers/gpio/gpio-ws16c48.c\n@@ -332,7 +332,7 @@ static irqreturn_t ws16c48_irq_handler(int irq, void *dev_id)\n \t\t\tint_id = inb(ws16c48gpio->base + 8 + port);\n \t\t\tfor_each_set_bit(gpio, &int_id, 8)\n \t\t\t\tgeneric_handle_irq(irq_find_mapping(\n-\t\t\t\t\tchip->irqdomain, gpio + 8*port));\n+\t\t\t\t\tchip->irq.domain, gpio + 8*port));\n \t\t}\n \n \t\tint_pending = inb(ws16c48gpio->base + 6) & 0x7;\ndiff --git a/drivers/gpio/gpio-xgene-sb.c b/drivers/gpio/gpio-xgene-sb.c\nindex 033258634b8c..e761fd7c5728 100644\n--- a/drivers/gpio/gpio-xgene-sb.c\n+++ b/drivers/gpio/gpio-xgene-sb.c\n@@ -296,7 +296,7 @@ static int xgene_gpio_sb_probe(struct platform_device *pdev)\n \tif (!priv->irq_domain)\n \t\treturn -ENODEV;\n \n-\tpriv->gc.irqdomain = priv->irq_domain;\n+\tpriv->gc.irq.domain = priv->irq_domain;\n \n \tret = devm_gpiochip_add_data(&pdev->dev, &priv->gc, priv);\n \tif (ret) {\ndiff --git a/drivers/gpio/gpio-xlp.c b/drivers/gpio/gpio-xlp.c\nindex d857e1d8e731..e74bd43a6974 100644\n--- a/drivers/gpio/gpio-xlp.c\n+++ b/drivers/gpio/gpio-xlp.c\n@@ -225,7 +225,7 @@ static void xlp_gpio_generic_handler(struct irq_desc *desc)\n \n \t\tif (gpio_stat & BIT(gpio % XLP_GPIO_REGSZ))\n \t\t\tgeneric_handle_irq(irq_find_mapping(\n-\t\t\t\t\t\tpriv->chip.irqdomain, gpio));\n+\t\t\t\t\t\tpriv->chip.irq.domain, gpio));\n \t}\n \tchained_irq_exit(irqchip, desc);\n }\ndiff --git a/drivers/gpio/gpio-zx.c b/drivers/gpio/gpio-zx.c\nindex be3a87da8438..5eacad9b2692 100644\n--- a/drivers/gpio/gpio-zx.c\n+++ b/drivers/gpio/gpio-zx.c\n@@ -170,7 +170,7 @@ static void zx_irq_handler(struct irq_desc *desc)\n \twritew_relaxed(pending, chip->base + ZX_GPIO_IC);\n \tif (pending) {\n \t\tfor_each_set_bit(offset, &pending, ZX_GPIO_NR)\n-\t\t\tgeneric_handle_irq(irq_find_mapping(gc->irqdomain,\n+\t\t\tgeneric_handle_irq(irq_find_mapping(gc->irq.domain,\n \t\t\t\t\t\t\t offset));\n \t}\n \ndiff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c\nindex b3cc948a2d8b..75ee877e5cd5 100644\n--- a/drivers/gpio/gpio-zynq.c\n+++ b/drivers/gpio/gpio-zynq.c\n@@ -562,7 +562,7 @@ static void zynq_gpio_handle_bank_irq(struct zynq_gpio *gpio,\n \t\t\t\t unsigned long pending)\n {\n \tunsigned int bank_offset = gpio->p_data->bank_min[bank_num];\n-\tstruct irq_domain *irqdomain = gpio->chip.irqdomain;\n+\tstruct irq_domain *irqdomain = gpio->chip.irq.domain;\n \tint offset;\n \n \tif (!pending)\ndiff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c\nindex 4058adde7dc6..d8ea8a292978 100644\n--- a/drivers/gpio/gpiolib.c\n+++ b/drivers/gpio/gpiolib.c\n@@ -1560,7 +1560,7 @@ static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gpiochip,\n {\n \tunsigned int offset;\n \n-\tif (!gpiochip->irqdomain) {\n+\tif (!gpiochip->irq.domain) {\n \t\tchip_err(gpiochip, \"called %s before setting up irqchip\\n\",\n \t\t\t __func__);\n \t\treturn;\n@@ -1587,7 +1587,7 @@ static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gpiochip,\n \tfor (offset = 0; offset < gpiochip->ngpio; offset++) {\n \t\tif (!gpiochip_irqchip_irq_valid(gpiochip, offset))\n \t\t\tcontinue;\n-\t\tirq_set_parent(irq_find_mapping(gpiochip->irqdomain, offset),\n+\t\tirq_set_parent(irq_find_mapping(gpiochip->irq.domain, offset),\n \t\t\t parent_irq);\n \t}\n }\n@@ -1720,7 +1720,7 @@ static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset)\n {\n \tif (!gpiochip_irqchip_irq_valid(chip, offset))\n \t\treturn -ENXIO;\n-\treturn irq_create_mapping(chip->irqdomain, offset);\n+\treturn irq_create_mapping(chip->irq.domain, offset);\n }\n \n /**\n@@ -1780,10 +1780,10 @@ static int gpiochip_add_irqchip(struct gpio_chip *gpiochip)\n \telse\n \t\tops = &gpiochip_domain_ops;\n \n-\tgpiochip->irqdomain = irq_domain_add_simple(np, gpiochip->ngpio,\n-\t\t\t\t\t\t gpiochip->irq_base,\n-\t\t\t\t\t\t ops, gpiochip);\n-\tif (!gpiochip->irqdomain)\n+\tgpiochip->irq.domain = irq_domain_add_simple(np, gpiochip->ngpio,\n+\t\t\t\t\t\t gpiochip->irq_base,\n+\t\t\t\t\t\t ops, gpiochip);\n+\tif (!gpiochip->irq.domain)\n \t\treturn -EINVAL;\n \n \t/*\n@@ -1825,7 +1825,7 @@ static int gpiochip_add_irqchip(struct gpio_chip *gpiochip)\n \t\tif (!gpiochip_irqchip_irq_valid(gpiochip, i))\n \t\t\tcontinue;\n \n-\t\tirq = irq_create_mapping(gpiochip->irqdomain, i);\n+\t\tirq = irq_create_mapping(gpiochip->irq.domain, i);\n \t\tif (!irq) {\n \t\t\tchip_err(gpiochip,\n \t\t\t\t \"failed to create IRQ mapping for GPIO#%u\\n\",\n@@ -1849,7 +1849,7 @@ static int gpiochip_add_irqchip(struct gpio_chip *gpiochip)\n */\n static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)\n {\n-\tunsigned int offset;\n+\tunsigned int offset, irq;\n \n \tacpi_gpiochip_free_interrupts(gpiochip);\n \n@@ -1869,14 +1869,16 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)\n \t}\n \n \t/* Remove all IRQ mappings and delete the domain */\n-\tif (gpiochip->irqdomain) {\n+\tif (gpiochip->irq.domain) {\n \t\tfor (offset = 0; offset < gpiochip->ngpio; offset++) {\n \t\t\tif (!gpiochip_irqchip_irq_valid(gpiochip, offset))\n \t\t\t\tcontinue;\n-\t\t\tirq_dispose_mapping(\n-\t\t\t\tirq_find_mapping(gpiochip->irqdomain, offset));\n+\n+\t\t\tirq = irq_find_mapping(gpiochip->irq.domain, offset);\n+\t\t\tirq_dispose_mapping(irq);\n \t\t}\n-\t\tirq_domain_remove(gpiochip->irqdomain);\n+\n+\t\tirq_domain_remove(gpiochip->irq.domain);\n \t}\n \n \tif (gpiochip->irq.chip) {\n@@ -1962,10 +1964,10 @@ int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,\n \tgpiochip->irq_default_type = type;\n \tgpiochip->to_irq = gpiochip_to_irq;\n \tgpiochip->lock_key = lock_key;\n-\tgpiochip->irqdomain = irq_domain_add_simple(of_node,\n+\tgpiochip->irq.domain = irq_domain_add_simple(of_node,\n \t\t\t\t\tgpiochip->ngpio, first_irq,\n \t\t\t\t\t&gpiochip_domain_ops, gpiochip);\n-\tif (!gpiochip->irqdomain) {\n+\tif (!gpiochip->irq.domain) {\n \t\tgpiochip->irq.chip = NULL;\n \t\treturn -EINVAL;\n \t}\ndiff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c\nindex 0944310225db..72d122748293 100644\n--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c\n+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c\n@@ -383,7 +383,7 @@ static void bcm2835_gpio_irq_handle_bank(struct bcm2835_pinctrl *pc,\n \t\t/* FIXME: no clue why the code looks up the type here */\n \t\ttype = pc->irq_type[gpio];\n \n-\t\tgeneric_handle_irq(irq_linear_revmap(pc->gpio_chip.irqdomain,\n+\t\tgeneric_handle_irq(irq_linear_revmap(pc->gpio_chip.irq.domain,\n \t\t\t\t\t\t gpio));\n \t}\n }\n@@ -665,7 +665,7 @@ static void bcm2835_pctl_pin_dbg_show(struct pinctrl_dev *pctldev,\n \tenum bcm2835_fsel fsel = bcm2835_pinctrl_fsel_get(pc, offset);\n \tconst char *fname = bcm2835_functions[fsel];\n \tint value = bcm2835_gpio_get_bit(pc, GPLEV0, offset);\n-\tint irq = irq_find_mapping(chip->irqdomain, offset);\n+\tint irq = irq_find_mapping(chip->irq.domain, offset);\n \n \tseq_printf(s, \"function %s in %s; irq %d (%s)\",\n \t\tfname, value ? \"hi\" : \"lo\",\ndiff --git a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c\nindex 85a8c97d9dfe..b93f62dc8733 100644\n--- a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c\n+++ b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c\n@@ -172,7 +172,7 @@ static void iproc_gpio_irq_handler(struct irq_desc *desc)\n \n \t\tfor_each_set_bit(bit, &val, NGPIOS_PER_BANK) {\n \t\t\tunsigned pin = NGPIOS_PER_BANK * i + bit;\n-\t\t\tint child_irq = irq_find_mapping(gc->irqdomain, pin);\n+\t\t\tint child_irq = irq_find_mapping(gc->irq.domain, pin);\n \n \t\t\t/*\n \t\t\t * Clear the interrupt before invoking the\ndiff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c\nindex 0f3a02495aeb..5897981e5ed3 100644\n--- a/drivers/pinctrl/intel/pinctrl-baytrail.c\n+++ b/drivers/pinctrl/intel/pinctrl-baytrail.c\n@@ -1627,7 +1627,7 @@ static void byt_gpio_irq_handler(struct irq_desc *desc)\n \t\tpending = readl(reg);\n \t\traw_spin_unlock(&vg->lock);\n \t\tfor_each_set_bit(pin, &pending, 32) {\n-\t\t\tvirq = irq_find_mapping(vg->chip.irqdomain, base + pin);\n+\t\t\tvirq = irq_find_mapping(vg->chip.irq.domain, base + pin);\n \t\t\tgeneric_handle_irq(virq);\n \t\t}\n \t}\ndiff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c\nindex 04e929fd0ffe..1cd7043edbc1 100644\n--- a/drivers/pinctrl/intel/pinctrl-cherryview.c\n+++ b/drivers/pinctrl/intel/pinctrl-cherryview.c\n@@ -1523,7 +1523,7 @@ static void chv_gpio_irq_handler(struct irq_desc *desc)\n \t\tunsigned irq, offset;\n \n \t\toffset = pctrl->intr_lines[intr_line];\n-\t\tirq = irq_find_mapping(gc->irqdomain, offset);\n+\t\tirq = irq_find_mapping(gc->irq.domain, offset);\n \t\tgeneric_handle_irq(irq);\n \t}\n \ndiff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c\nindex 8f8721538616..e4e167650f8a 100644\n--- a/drivers/pinctrl/intel/pinctrl-intel.c\n+++ b/drivers/pinctrl/intel/pinctrl-intel.c\n@@ -1000,7 +1000,7 @@ static irqreturn_t intel_gpio_community_irq_handler(struct intel_pinctrl *pctrl,\n \t\t\tif (padno >= community->npins)\n \t\t\t\tbreak;\n \n-\t\t\tirq = irq_find_mapping(gc->irqdomain,\n+\t\t\tirq = irq_find_mapping(gc->irq.domain,\n \t\t\t\t\t community->pin_base + padno);\n \t\t\tgeneric_handle_irq(irq);\n \ndiff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c\nindex b8b6ab072cd0..e66ff18ee362 100644\n--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c\n+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c\n@@ -592,7 +592,7 @@ static void armada_37xx_irq_handler(struct irq_desc *desc)\n \tstruct gpio_chip *gc = irq_desc_get_handler_data(desc);\n \tstruct irq_chip *chip = irq_desc_get_chip(desc);\n \tstruct armada_37xx_pinctrl *info = gpiochip_get_data(gc);\n-\tstruct irq_domain *d = gc->irqdomain;\n+\tstruct irq_domain *d = gc->irq.domain;\n \tint i;\n \n \tchained_irq_enter(chip, desc);\ndiff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c b/drivers/pinctrl/nomadik/pinctrl-nomadik.c\nindex a53f1a9b1ed2..f0e7a8c114b2 100644\n--- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c\n+++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c\n@@ -413,7 +413,7 @@ nmk_gpio_disable_lazy_irq(struct nmk_gpio_chip *nmk_chip, unsigned offset)\n \tu32 falling = nmk_chip->fimsc & BIT(offset);\n \tu32 rising = nmk_chip->rimsc & BIT(offset);\n \tint gpio = nmk_chip->chip.base + offset;\n-\tint irq = irq_find_mapping(nmk_chip->chip.irqdomain, offset);\n+\tint irq = irq_find_mapping(nmk_chip->chip.irq.domain, offset);\n \tstruct irq_data *d = irq_get_irq_data(irq);\n \n \tif (!rising && !falling)\n@@ -815,7 +815,7 @@ static void __nmk_gpio_irq_handler(struct irq_desc *desc, u32 status)\n \twhile (status) {\n \t\tint bit = __ffs(status);\n \n-\t\tgeneric_handle_irq(irq_find_mapping(chip->irqdomain, bit));\n+\t\tgeneric_handle_irq(irq_find_mapping(chip->irq.domain, bit));\n \t\tstatus &= ~BIT(bit);\n \t}\n \ndiff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c\nindex 38af1ec2df0c..11f05f1e33b3 100644\n--- a/drivers/pinctrl/pinctrl-amd.c\n+++ b/drivers/pinctrl/pinctrl-amd.c\n@@ -531,7 +531,7 @@ static irqreturn_t amd_gpio_irq_handler(int irq, void *dev_id)\n \t\t\tregval = readl(regs + i);\n \t\t\tif (!(regval & PIN_IRQ_PENDING))\n \t\t\t\tcontinue;\n-\t\t\tirq = irq_find_mapping(gc->irqdomain, irqnr + i);\n+\t\t\tirq = irq_find_mapping(gc->irq.domain, irqnr + i);\n \t\t\tgeneric_handle_irq(irq);\n \t\t\t/* Clear interrupt */\n \t\t\twritel(regval, regs + i);\ndiff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c\nindex 569bc28cb909..03492e3c09fa 100644\n--- a/drivers/pinctrl/pinctrl-at91.c\n+++ b/drivers/pinctrl/pinctrl-at91.c\n@@ -1603,7 +1603,7 @@ static void gpio_irq_handler(struct irq_desc *desc)\n \n \t\tfor_each_set_bit(n, &isr, BITS_PER_LONG) {\n \t\t\tgeneric_handle_irq(irq_find_mapping(\n-\t\t\t\t\t gpio_chip->irqdomain, n));\n+\t\t\t\t\t gpio_chip->irq.domain, n));\n \t\t}\n \t}\n \tchained_irq_exit(chip, desc);\ndiff --git a/drivers/pinctrl/pinctrl-coh901.c b/drivers/pinctrl/pinctrl-coh901.c\nindex ac155e7d3412..7939b178c6ae 100644\n--- a/drivers/pinctrl/pinctrl-coh901.c\n+++ b/drivers/pinctrl/pinctrl-coh901.c\n@@ -517,7 +517,7 @@ static void u300_gpio_irq_handler(struct irq_desc *desc)\n \n \t\tfor_each_set_bit(irqoffset, &val, U300_GPIO_PINS_PER_PORT) {\n \t\t\tint offset = pinoffset + irqoffset;\n-\t\t\tint pin_irq = irq_find_mapping(chip->irqdomain, offset);\n+\t\t\tint pin_irq = irq_find_mapping(chip->irq.domain, offset);\n \n \t\t\tdev_dbg(gpio->dev, \"GPIO IRQ %d on pin %d\\n\",\n \t\t\t\tpin_irq, offset);\ndiff --git a/drivers/pinctrl/pinctrl-mcp23s08.c b/drivers/pinctrl/pinctrl-mcp23s08.c\nindex 3e40d4245512..db19a2f2f575 100644\n--- a/drivers/pinctrl/pinctrl-mcp23s08.c\n+++ b/drivers/pinctrl/pinctrl-mcp23s08.c\n@@ -537,7 +537,7 @@ static irqreturn_t mcp23s08_irq(int irq, void *data)\n \t\t ((gpio_bit_changed || intcap_changed) &&\n \t\t\t(BIT(i) & mcp->irq_fall) && !gpio_set) ||\n \t\t defval_changed) {\n-\t\t\tchild_irq = irq_find_mapping(mcp->chip.irqdomain, i);\n+\t\t\tchild_irq = irq_find_mapping(mcp->chip.irq.domain, i);\n \t\t\thandle_nested_irq(child_irq);\n \t\t}\n \t}\ndiff --git a/drivers/pinctrl/pinctrl-oxnas.c b/drivers/pinctrl/pinctrl-oxnas.c\nindex 494ec9a7573a..53ec22a51f5c 100644\n--- a/drivers/pinctrl/pinctrl-oxnas.c\n+++ b/drivers/pinctrl/pinctrl-oxnas.c\n@@ -1064,7 +1064,7 @@ static void oxnas_gpio_irq_handler(struct irq_desc *desc)\n \tstat = readl(bank->reg_base + IRQ_PENDING);\n \n \tfor_each_set_bit(pin, &stat, BITS_PER_LONG)\n-\t\tgeneric_handle_irq(irq_linear_revmap(gc->irqdomain, pin));\n+\t\tgeneric_handle_irq(irq_linear_revmap(gc->irq.domain, pin));\n \n \tchained_irq_exit(chip, desc);\n }\ndiff --git a/drivers/pinctrl/pinctrl-pic32.c b/drivers/pinctrl/pinctrl-pic32.c\nindex 31ceb958b3fe..96390228d388 100644\n--- a/drivers/pinctrl/pinctrl-pic32.c\n+++ b/drivers/pinctrl/pinctrl-pic32.c\n@@ -2106,7 +2106,7 @@ static void pic32_gpio_irq_handler(struct irq_desc *desc)\n \tpending = pic32_gpio_get_pending(gc, stat);\n \n \tfor_each_set_bit(pin, &pending, BITS_PER_LONG)\n-\t\tgeneric_handle_irq(irq_linear_revmap(gc->irqdomain, pin));\n+\t\tgeneric_handle_irq(irq_linear_revmap(gc->irq.domain, pin));\n \n \tchained_irq_exit(chip, desc);\n }\ndiff --git a/drivers/pinctrl/pinctrl-pistachio.c b/drivers/pinctrl/pinctrl-pistachio.c\nindex 55375b1b3cc8..302190d1558d 100644\n--- a/drivers/pinctrl/pinctrl-pistachio.c\n+++ b/drivers/pinctrl/pinctrl-pistachio.c\n@@ -1307,7 +1307,7 @@ static void pistachio_gpio_irq_handler(struct irq_desc *desc)\n \tpending = gpio_readl(bank, GPIO_INTERRUPT_STATUS) &\n \t\tgpio_readl(bank, GPIO_INTERRUPT_EN);\n \tfor_each_set_bit(pin, &pending, 16)\n-\t\tgeneric_handle_irq(irq_linear_revmap(gc->irqdomain, pin));\n+\t\tgeneric_handle_irq(irq_linear_revmap(gc->irq.domain, pin));\n \tchained_irq_exit(chip, desc);\n }\n \ndiff --git a/drivers/pinctrl/pinctrl-st.c b/drivers/pinctrl/pinctrl-st.c\nindex a5205b94b2e6..2081c67667a8 100644\n--- a/drivers/pinctrl/pinctrl-st.c\n+++ b/drivers/pinctrl/pinctrl-st.c\n@@ -1408,7 +1408,7 @@ static void __gpio_irq_handler(struct st_gpio_bank *bank)\n \t\t\t\t\tcontinue;\n \t\t\t}\n \n-\t\t\tgeneric_handle_irq(irq_find_mapping(bank->gpio_chip.irqdomain, n));\n+\t\t\tgeneric_handle_irq(irq_find_mapping(bank->gpio_chip.irq.domain, n));\n \t\t}\n \t}\n }\ndiff --git a/drivers/pinctrl/pinctrl-sx150x.c b/drivers/pinctrl/pinctrl-sx150x.c\nindex 7450f5118445..7db4f6a6eb17 100644\n--- a/drivers/pinctrl/pinctrl-sx150x.c\n+++ b/drivers/pinctrl/pinctrl-sx150x.c\n@@ -561,7 +561,7 @@ static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id)\n \n \tstatus = val;\n \tfor_each_set_bit(n, &status, pctl->data->ngpios)\n-\t\thandle_nested_irq(irq_find_mapping(pctl->gpio.irqdomain, n));\n+\t\thandle_nested_irq(irq_find_mapping(pctl->gpio.irq.domain, n));\n \n \treturn IRQ_HANDLED;\n }\ndiff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c\nindex ff491da64dab..7a960590ecaa 100644\n--- a/drivers/pinctrl/qcom/pinctrl-msm.c\n+++ b/drivers/pinctrl/qcom/pinctrl-msm.c\n@@ -795,7 +795,7 @@ static void msm_gpio_irq_handler(struct irq_desc *desc)\n \t\tg = &pctrl->soc->groups[i];\n \t\tval = readl(pctrl->regs + g->intr_status_reg);\n \t\tif (val & BIT(g->intr_status_bit)) {\n-\t\t\tirq_pin = irq_find_mapping(gc->irqdomain, i);\n+\t\t\tirq_pin = irq_find_mapping(gc->irq.domain, i);\n \t\t\tgeneric_handle_irq(irq_pin);\n \t\t\thandled++;\n \t\t}\ndiff --git a/drivers/pinctrl/sirf/pinctrl-atlas7.c b/drivers/pinctrl/sirf/pinctrl-atlas7.c\nindex 4db9323251e3..f5cef6e5fa3e 100644\n--- a/drivers/pinctrl/sirf/pinctrl-atlas7.c\n+++ b/drivers/pinctrl/sirf/pinctrl-atlas7.c\n@@ -5820,7 +5820,7 @@ static void atlas7_gpio_handle_irq(struct irq_desc *desc)\n \t\t\t\t__func__, gc->label,\n \t\t\t\tbank->gpio_offset + pin_in_bank);\n \t\t\tgeneric_handle_irq(\n-\t\t\t\tirq_find_mapping(gc->irqdomain,\n+\t\t\t\tirq_find_mapping(gc->irq.domain,\n \t\t\t\t\tbank->gpio_offset + pin_in_bank));\n \t\t}\n \ndiff --git a/drivers/pinctrl/sirf/pinctrl-sirf.c b/drivers/pinctrl/sirf/pinctrl-sirf.c\nindex d3ef05973901..8b14a1f1e671 100644\n--- a/drivers/pinctrl/sirf/pinctrl-sirf.c\n+++ b/drivers/pinctrl/sirf/pinctrl-sirf.c\n@@ -587,7 +587,7 @@ static void sirfsoc_gpio_handle_irq(struct irq_desc *desc)\n \t\tif ((status & 0x1) && (ctrl & SIRFSOC_GPIO_CTL_INTR_EN_MASK)) {\n \t\t\tpr_debug(\"%s: gpio id %d idx %d happens\\n\",\n \t\t\t\t__func__, bank->id, idx);\n-\t\t\tgeneric_handle_irq(irq_find_mapping(gc->irqdomain, idx +\n+\t\t\tgeneric_handle_irq(irq_find_mapping(gc->irq.domain, idx +\n \t\t\t\t\tbank->id * SIRFSOC_GPIO_BANK_SIZE));\n \t\t}\n \ndiff --git a/drivers/pinctrl/spear/pinctrl-plgpio.c b/drivers/pinctrl/spear/pinctrl-plgpio.c\nindex cf6d68c7345b..72ae6bccee55 100644\n--- a/drivers/pinctrl/spear/pinctrl-plgpio.c\n+++ b/drivers/pinctrl/spear/pinctrl-plgpio.c\n@@ -401,7 +401,7 @@ static void plgpio_irq_handler(struct irq_desc *desc)\n \t\t\t/* get correct irq line number */\n \t\t\tpin = i * MAX_GPIO_PER_REG + pin;\n \t\t\tgeneric_handle_irq(\n-\t\t\t\tirq_find_mapping(gc->irqdomain, pin));\n+\t\t\t\tirq_find_mapping(gc->irq.domain, pin));\n \t\t}\n \t}\n \tchained_irq_exit(irqchip, desc);\ndiff --git a/drivers/platform/x86/intel_int0002_vgpio.c b/drivers/platform/x86/intel_int0002_vgpio.c\nindex 92dc230ef5b2..f6b3af73dea5 100644\n--- a/drivers/platform/x86/intel_int0002_vgpio.c\n+++ b/drivers/platform/x86/intel_int0002_vgpio.c\n@@ -119,7 +119,7 @@ static irqreturn_t int0002_irq(int irq, void *data)\n \tif (!(gpe_sts_reg & GPE0A_PME_B0_STS_BIT))\n \t\treturn IRQ_NONE;\n \n-\tgeneric_handle_irq(irq_find_mapping(chip->irqdomain,\n+\tgeneric_handle_irq(irq_find_mapping(chip->irq.domain,\n \t\t\t\t\t GPE0A_PME_B0_VIRT_GPIO_PIN));\n \n \tpm_system_wakeup();\ndiff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h\nindex 974247646886..031037bb8670 100644\n--- a/include/linux/gpio/driver.h\n+++ b/include/linux/gpio/driver.h\n@@ -32,6 +32,14 @@ struct gpio_irq_chip {\n \tstruct irq_chip *chip;\n \n \t/**\n+\t * @domain:\n+\t *\n+\t * Interrupt translation domain; responsible for mapping between GPIO\n+\t * hwirq number and Linux IRQ number.\n+\t */\n+\tstruct irq_domain *domain;\n+\n+\t/**\n \t * @domain_ops:\n \t *\n \t * Table of interrupt domain operations for this IRQ chip.\n@@ -144,8 +152,6 @@ static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip)\n *\tsafely.\n * @bgpio_dir: shadowed direction register for generic GPIO to clear/set\n *\tdirection safely.\n- * @irqdomain: Interrupt translation domain; responsible for mapping\n- *\tbetween GPIO hwirq number and linux irq number\n * @irq_base: first linux IRQ number assigned to GPIO IRQ chip (deprecated)\n * @irq_handler: the irq handler to use (often a predefined irq core function)\n *\tfor GPIO IRQs, provided by GPIO driver\n@@ -226,7 +232,6 @@ struct gpio_chip {\n \t * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib\n \t * to handle IRQs for most practical cases.\n \t */\n-\tstruct irq_domain\t*irqdomain;\n \tunsigned int\t\tirq_base;\n \tirq_flow_handler_t\tirq_handler;\n \tunsigned int\t\tirq_default_type;\n", "prefixes": [ "03/16" ] }