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GET /api/patches/808970/?format=api
{ "id": 808970, "url": "http://patchwork.ozlabs.org/api/patches/808970/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20170901185736.28051-7-thierry.reding@gmail.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170901185736.28051-7-thierry.reding@gmail.com>", "list_archive_url": null, "date": "2017-09-01T18:57:26", "name": "[06/16] gpio: Move irq_default_type to struct gpio_irq_chip", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "ecdc4c5cd50e499a50374c938ba3345316cedd15", "submitter": { "id": 26234, "url": "http://patchwork.ozlabs.org/api/people/26234/?format=api", "name": "Thierry Reding", "email": "thierry.reding@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20170901185736.28051-7-thierry.reding@gmail.com/mbox/", "series": [ { "id": 1098, "url": "http://patchwork.ozlabs.org/api/series/1098/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=1098", "date": "2017-09-01T18:57:20", "name": "gpio: Tight IRQ chip integration and banked infrastructure", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/1098/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/808970/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/808970/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-gpio-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"LOBZISWP\"; dkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xkT9c6B5hz9sPm\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 2 Sep 2017 05:01:17 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752360AbdIATBB (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tFri, 1 Sep 2017 15:01:01 -0400", "from mail-wm0-f66.google.com ([74.125.82.66]:37055 \"EHLO\n\tmail-wm0-f66.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752366AbdIAS5u (ORCPT\n\t<rfc822; linux-gpio@vger.kernel.org>); Fri, 1 Sep 2017 14:57:50 -0400", "by mail-wm0-f66.google.com with SMTP id x189so953537wmg.4;\n\tFri, 01 Sep 2017 11:57:49 -0700 (PDT)", "from localhost\n\t(p200300E41BD6D60076D02BFFFE273F51.dip0.t-ipconnect.de.\n\t[2003:e4:1bd6:d600:76d0:2bff:fe27:3f51])\n\tby smtp.gmail.com with ESMTPSA id\n\tg106sm1070013wrd.4.2017.09.01.11.57.47\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tFri, 01 Sep 2017 11:57:47 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=1wVlPjQrEkrdROjpqBO9eS9yvsFEwPP7QoCqagPwxnY=;\n\tb=LOBZISWPgizhxeiTjByRQ3cmjpPdkWJL+sJdA1Pk3y5fygXRaZ4zzNqJFH+cq+T4T+\n\tMEUjnQpDicWcYV9Ik5li+qg54cbonvwRXlNGApRmQo4ulPgdQ4hWqkreYtQCFxYeBZ6W\n\tbM61a9sycifgc3jQdX+Von3lXviGunwXj/4UYIqghsCHWX5rUvWxUlYDg+ayE9wrzEus\n\txbyZMqjl7619xxvVM4QooZMmwyd3dhjuKfp6F0T4Nj0VKnSlTSYNTP2ENOebcUlEF4aE\n\tQeV0OSkiFe9iXR6rbYONq0F5bA4aGWQYsOwo+ZyDfEuNjfHSSxV3cuKSGNmcNy5aBYyA\n\tmiog==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=1wVlPjQrEkrdROjpqBO9eS9yvsFEwPP7QoCqagPwxnY=;\n\tb=g9tUM4DeNYxFJWrwLnl6rsFa6UhJaizl1JBs6HrHk6KFumLmeytQtYFdOLsMtT4LKc\n\tMEpfkcO5gxS3MHek57OMmklI7lU22DS0GZjvbkRCGqIToZuv3F1xY2tiobQ43o8/LKpq\n\tLSLpDP059ss9lfbJaic25J8Vb3vCtJkoX+9DYOSfV8gki1A4EzVuK+5t6IKzkiz45Zv/\n\tcFhXnagZj+RM8MAHn+7da1IghPkGQ8fpZiV58PaxCD8y7NfLhM3eM5bqnIauuwe1TI4q\n\tPuCEvcIeH1o92mb7YbUU42tyLNKzuyX/kvYFJxH7+Bvz4y6nNkInyFAozlQuhyq9hTaX\n\t1Daw==", "X-Gm-Message-State": "AHPjjUgdFewrTSYZDwZCybLoQ6DePLtxkCROvANvDiJNzAXvMoIPonuk\n\tpCGRw9UjQCSUaKyu", "X-Google-Smtp-Source": "ADKCNb5CvFQFvh10OwhXD0wCB9VBUYOUmiCF8nSOxoZzvsfOW5Y874SWz6yROAxCgS6VWosVaxihrw==", "X-Received": "by 10.28.175.14 with SMTP id y14mr1054240wme.42.1504292268758;\n\tFri, 01 Sep 2017 11:57:48 -0700 (PDT)", "From": "Thierry Reding <thierry.reding@gmail.com>", "To": "Linus Walleij <linus.walleij@linaro.org>", "Cc": "Jonathan Hunter <jonathanh@nvidia.com>, linux-gpio@vger.kernel.org,\n\tlinux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org", "Subject": "[PATCH 06/16] gpio: Move irq_default_type to struct gpio_irq_chip", "Date": "Fri, 1 Sep 2017 20:57:26 +0200", "Message-Id": "<20170901185736.28051-7-thierry.reding@gmail.com>", "X-Mailer": "git-send-email 2.13.3", "In-Reply-To": "<20170901185736.28051-1-thierry.reding@gmail.com>", "References": "<20170901185736.28051-1-thierry.reding@gmail.com>", "Sender": "linux-gpio-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-gpio.vger.kernel.org>", "X-Mailing-List": "linux-gpio@vger.kernel.org" }, "content": "From: Thierry Reding <treding@nvidia.com>\n\nIn order to consolidate the multiple ways to associate an IRQ chip with\na GPIO chip, move more fields into the new struct gpio_irq_chip.\n\nSigned-off-by: Thierry Reding <treding@nvidia.com>\n---\n drivers/gpio/gpiolib.c | 10 +++++-----\n include/linux/gpio/driver.h | 11 ++++++++---\n 2 files changed, 13 insertions(+), 8 deletions(-)", "diff": "diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c\nindex 75fa734cfa98..774d6047116a 100644\n--- a/drivers/gpio/gpiolib.c\n+++ b/drivers/gpio/gpiolib.c\n@@ -1666,8 +1666,8 @@ int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,\n \t * No set-up of the hardware will happen if IRQ_TYPE_NONE\n \t * is passed as default type.\n \t */\n-\tif (chip->irq_default_type != IRQ_TYPE_NONE)\n-\t\tirq_set_irq_type(irq, chip->irq_default_type);\n+\tif (chip->irq.default_type != IRQ_TYPE_NONE)\n+\t\tirq_set_irq_type(irq, chip->irq.default_type);\n \n \treturn 0;\n }\n@@ -1744,7 +1744,7 @@ static int gpiochip_add_irqchip(struct gpio_chip *gpiochip)\n \t\treturn -EINVAL;\n \t}\n \n-\ttype = gpiochip->irq_default_type;\n+\ttype = gpiochip->irq.default_type;\n \tnp = gpiochip->parent->of_node;\n \n #ifdef CONFIG_OF_GPIO\n@@ -1773,7 +1773,7 @@ static int gpiochip_add_irqchip(struct gpio_chip *gpiochip)\n \t}\n \n \tgpiochip->to_irq = gpiochip_to_irq;\n-\tgpiochip->irq_default_type = type;\n+\tgpiochip->irq.default_type = type;\n \n \tif (gpiochip->irq.domain_ops)\n \t\tops = gpiochip->irq.domain_ops;\n@@ -1961,7 +1961,7 @@ int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,\n \n \tgpiochip->irq.chip = irqchip;\n \tgpiochip->irq.handler = handler;\n-\tgpiochip->irq_default_type = type;\n+\tgpiochip->irq.default_type = type;\n \tgpiochip->to_irq = gpiochip_to_irq;\n \tgpiochip->lock_key = lock_key;\n \tgpiochip->irq.domain = irq_domain_add_simple(of_node,\ndiff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h\nindex b1398ea0c32a..bcf93afddfa6 100644\n--- a/include/linux/gpio/driver.h\n+++ b/include/linux/gpio/driver.h\n@@ -63,6 +63,14 @@ struct gpio_irq_chip {\n \tirq_flow_handler_t handler;\n \n \t/**\n+\t * @default_type:\n+\t *\n+\t * Default IRQ triggering type applied during GPIO driver\n+\t * initialization, provided by GPIO driver.\n+\t */\n+\tunsigned int default_type;\n+\n+\t/**\n \t * @parent_handler:\n \t *\n \t * The interrupt handler for the GPIO chip's parent interrupts, may be\n@@ -168,8 +176,6 @@ static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip)\n *\tsafely.\n * @bgpio_dir: shadowed direction register for generic GPIO to clear/set\n *\tdirection safely.\n- * @irq_default_type: default IRQ triggering type applied during GPIO driver\n- *\tinitialization, provided by GPIO driver\n * @irq_chained_parent: GPIO IRQ chip parent/bank linux irq number,\n *\tprovided by GPIO driver for chained interrupt (not for nested\n *\tinterrupts).\n@@ -245,7 +251,6 @@ struct gpio_chip {\n \t * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib\n \t * to handle IRQs for most practical cases.\n \t */\n-\tunsigned int\t\tirq_default_type;\n \tunsigned int\t\tirq_chained_parent;\n \tbool\t\t\tirq_nested;\n \tbool\t\t\tirq_need_valid_mask;\n", "prefixes": [ "06/16" ] }