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{
    "id": 808969,
    "url": "http://patchwork.ozlabs.org/api/patches/808969/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20170901185736.28051-5-thierry.reding@gmail.com/",
    "project": {
        "id": 21,
        "url": "http://patchwork.ozlabs.org/api/projects/21/?format=api",
        "name": "Linux Tegra Development",
        "link_name": "linux-tegra",
        "list_id": "linux-tegra.vger.kernel.org",
        "list_email": "linux-tegra@vger.kernel.org",
        "web_url": null,
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    "msgid": "<20170901185736.28051-5-thierry.reding@gmail.com>",
    "list_archive_url": null,
    "date": "2017-09-01T18:57:24",
    "name": "[04/16] gpio: Move irq_base to struct gpio_irq_chip",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": false,
    "hash": "8895e5fd79139ab4cd46bc68043a888d4874e48a",
    "submitter": {
        "id": 26234,
        "url": "http://patchwork.ozlabs.org/api/people/26234/?format=api",
        "name": "Thierry Reding",
        "email": "thierry.reding@gmail.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20170901185736.28051-5-thierry.reding@gmail.com/mbox/",
    "series": [
        {
            "id": 1099,
            "url": "http://patchwork.ozlabs.org/api/series/1099/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/list/?series=1099",
            "date": "2017-09-01T18:57:20",
            "name": "gpio: Tight IRQ chip integration and banked infrastructure",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/1099/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/808969/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/808969/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "X-Received": "by 10.28.136.140 with SMTP id k134mr1144885wmd.97.1504292265173; \n\tFri, 01 Sep 2017 11:57:45 -0700 (PDT)",
        "From": "Thierry Reding <thierry.reding@gmail.com>",
        "To": "Linus Walleij <linus.walleij@linaro.org>",
        "Cc": "Jonathan Hunter <jonathanh@nvidia.com>, linux-gpio@vger.kernel.org,\n\tlinux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org",
        "Subject": "[PATCH 04/16] gpio: Move irq_base to struct gpio_irq_chip",
        "Date": "Fri,  1 Sep 2017 20:57:24 +0200",
        "Message-Id": "<20170901185736.28051-5-thierry.reding@gmail.com>",
        "X-Mailer": "git-send-email 2.13.3",
        "In-Reply-To": "<20170901185736.28051-1-thierry.reding@gmail.com>",
        "References": "<20170901185736.28051-1-thierry.reding@gmail.com>",
        "Sender": "linux-tegra-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<linux-tegra.vger.kernel.org>",
        "X-Mailing-List": "linux-tegra@vger.kernel.org"
    },
    "content": "From: Thierry Reding <treding@nvidia.com>\n\nIn order to consolidate the multiple ways to associate an IRQ chip with\na GPIO chip, move more fields into the new struct gpio_irq_chip.\n\nSigned-off-by: Thierry Reding <treding@nvidia.com>\n---\n drivers/gpio/gpiolib.c                      |  2 +-\n drivers/pinctrl/mvebu/pinctrl-armada-37xx.c |  2 +-\n include/linux/gpio/driver.h                 | 10 ++++++++--\n 3 files changed, 10 insertions(+), 4 deletions(-)",
    "diff": "diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c\nindex d8ea8a292978..e5ad28978d5c 100644\n--- a/drivers/gpio/gpiolib.c\n+++ b/drivers/gpio/gpiolib.c\n@@ -1781,7 +1781,7 @@ static int gpiochip_add_irqchip(struct gpio_chip *gpiochip)\n \t\tops = &gpiochip_domain_ops;\n \n \tgpiochip->irq.domain = irq_domain_add_simple(np, gpiochip->ngpio,\n-\t\t\t\t\t\t     gpiochip->irq_base,\n+\t\t\t\t\t\t     gpiochip->irq.first,\n \t\t\t\t\t\t     ops, gpiochip);\n \tif (!gpiochip->irq.domain)\n \t\treturn -EINVAL;\ndiff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c\nindex e66ff18ee362..8df8a4998f48 100644\n--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c\n+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c\n@@ -681,7 +681,7 @@ static int armada_37xx_irqchip_register(struct platform_device *pdev,\n \t * the chained irq with all of them.\n \t */\n \tfor (i = 0; i < nrirqs; i++) {\n-\t\tstruct irq_data *d = irq_get_irq_data(gc->irq_base + i);\n+\t\tstruct irq_data *d = irq_get_irq_data(gc->irq.first + i);\n \n \t\t/*\n \t\t * The mask field is a \"precomputed bitmask for\ndiff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h\nindex 031037bb8670..9389406df0b1 100644\n--- a/include/linux/gpio/driver.h\n+++ b/include/linux/gpio/driver.h\n@@ -47,6 +47,14 @@ struct gpio_irq_chip {\n \tconst struct irq_domain_ops *domain_ops;\n \n \t/**\n+\t * @first:\n+\t *\n+\t * If not dynamically assigned, the base (first) IRQ to allocate GPIO\n+\t * chip IRQs from (deprecated).\n+\t */\n+\tunsigned int first;\n+\n+\t/**\n \t * @parent_handler:\n \t *\n \t * The interrupt handler for the GPIO chip's parent interrupts, may be\n@@ -152,7 +160,6 @@ static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip)\n  *\tsafely.\n  * @bgpio_dir: shadowed direction register for generic GPIO to clear/set\n  *\tdirection safely.\n- * @irq_base: first linux IRQ number assigned to GPIO IRQ chip (deprecated)\n  * @irq_handler: the irq handler to use (often a predefined irq core function)\n  *\tfor GPIO IRQs, provided by GPIO driver\n  * @irq_default_type: default IRQ triggering type applied during GPIO driver\n@@ -232,7 +239,6 @@ struct gpio_chip {\n \t * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib\n \t * to handle IRQs for most practical cases.\n \t */\n-\tunsigned int\t\tirq_base;\n \tirq_flow_handler_t\tirq_handler;\n \tunsigned int\t\tirq_default_type;\n \tunsigned int\t\tirq_chained_parent;\n",
    "prefixes": [
        "04/16"
    ]
}