Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/808920/?format=api
{ "id": 808920, "url": "http://patchwork.ozlabs.org/api/patches/808920/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170901180340.30009-17-eblake@redhat.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170901180340.30009-17-eblake@redhat.com>", "list_archive_url": null, "date": "2017-09-01T18:03:27", "name": "[v6,16/29] libqos: Use explicit QTestState for virtio operations", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "76609cadc84c1d5f6db3730b000f59b8fd7126cd", "submitter": { "id": 6591, "url": "http://patchwork.ozlabs.org/api/people/6591/?format=api", "name": "Eric Blake", "email": "eblake@redhat.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20170901180340.30009-17-eblake@redhat.com/mbox/", "series": [ { "id": 1089, "url": "http://patchwork.ozlabs.org/api/series/1089/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=1089", "date": "2017-09-01T18:03:12", "name": "Preliminary libqtest cleanups", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/1089/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/808920/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/808920/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ext-mx07.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com", "ext-mx07.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=eblake@redhat.com" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xkS4l5Q32z9sPm\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 2 Sep 2017 04:12:06 +1000 (AEST)", "from localhost ([::1]:53125 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dnqQG-0006JV-9g\n\tfor incoming@patchwork.ozlabs.org; Fri, 01 Sep 2017 14:12:04 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:56267)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <eblake@redhat.com>) id 1dnqIu-0007X9-NU\n\tfor qemu-devel@nongnu.org; Fri, 01 Sep 2017 14:04:34 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <eblake@redhat.com>) id 1dnqIo-0001yO-C6\n\tfor qemu-devel@nongnu.org; Fri, 01 Sep 2017 14:04:28 -0400", "from mx1.redhat.com ([209.132.183.28]:16605)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <eblake@redhat.com>)\n\tid 1dnqIe-0001mo-M8; Fri, 01 Sep 2017 14:04:12 -0400", "from smtp.corp.redhat.com\n\t(int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id B2034C047B9D;\n\tFri, 1 Sep 2017 18:04:11 +0000 (UTC)", "from red.redhat.com (ovpn-121-149.rdu2.redhat.com [10.10.121.149])\n\tby smtp.corp.redhat.com (Postfix) with ESMTP id 582F9627DE;\n\tFri, 1 Sep 2017 18:04:08 +0000 (UTC)" ], "DMARC-Filter": "OpenDMARC Filter v1.3.2 mx1.redhat.com B2034C047B9D", "From": "Eric Blake <eblake@redhat.com>", "To": "qemu-devel@nongnu.org", "Date": "Fri, 1 Sep 2017 13:03:27 -0500", "Message-Id": "<20170901180340.30009-17-eblake@redhat.com>", "In-Reply-To": "<20170901180340.30009-1-eblake@redhat.com>", "References": "<20170901180340.30009-1-eblake@redhat.com>", "X-Scanned-By": "MIMEDefang 2.79 on 10.5.11.15", "X-Greylist": "Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.31]);\n\tFri, 01 Sep 2017 18:04:11 +0000 (UTC)", "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]", "X-Received-From": "209.132.183.28", "Subject": "[Qemu-devel] [PATCH v6 16/29] libqos: Use explicit QTestState for\n\tvirtio operations", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "pbonzini@redhat.com, \"open list:virtio-blk\" <qemu-block@nongnu.org>,\n\tarmbru@redhat.com, Stefan Hajnoczi <stefanha@redhat.com>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "Drop one more client of global_qtest by teaching all virtio test\nfunctionality to pass in an explicit QTestState in constructors,\nwhere it is then reused for later access. Adjust all callers.\nThis gets us one step closer to eliminating implicit use of\nglobal_qtest.\n\nSigned-off-by: Eric Blake <eblake@redhat.com>\n---\n tests/libqos/virtio-mmio.h | 3 +-\n tests/libqos/virtio.h | 5 ++-\n tests/libqos/virtio-mmio.c | 54 +++++++++++++++++---------------\n tests/libqos/virtio-pci.c | 3 ++\n tests/libqos/virtio.c | 77 ++++++++++++++++++++++++++--------------------\n tests/virtio-blk-test.c | 3 +-\n 6 files changed, 84 insertions(+), 61 deletions(-)", "diff": "diff --git a/tests/libqos/virtio-mmio.h b/tests/libqos/virtio-mmio.h\nindex e3e52b9ce1..bd01386054 100644\n--- a/tests/libqos/virtio-mmio.h\n+++ b/tests/libqos/virtio-mmio.h\n@@ -41,6 +41,7 @@ typedef struct QVirtioMMIODevice {\n\n extern const QVirtioBus qvirtio_mmio;\n\n-QVirtioMMIODevice *qvirtio_mmio_init_device(uint64_t addr, uint32_t page_size);\n+QVirtioMMIODevice *qvirtio_mmio_init_device(QTestState *qts, uint64_t addr,\n+ uint32_t page_size);\n\n #endif\ndiff --git a/tests/libqos/virtio.h b/tests/libqos/virtio.h\nindex 8fbcd1869c..d180d54fc4 100644\n--- a/tests/libqos/virtio.h\n+++ b/tests/libqos/virtio.h\n@@ -19,6 +19,7 @@ typedef struct QVirtioBus QVirtioBus;\n\n typedef struct QVirtioDevice {\n const QVirtioBus *bus;\n+ QTestState *qts;\n /* Device type */\n uint16_t device_type;\n } QVirtioDevice;\n@@ -35,12 +36,14 @@ typedef struct QVirtQueue {\n uint16_t last_used_idx;\n bool indirect;\n bool event;\n+ QTestState *qts;\n } QVirtQueue;\n\n typedef struct QVRingIndirectDesc {\n uint64_t desc; /* This points to an array fo struct vring_desc */\n uint16_t index;\n uint16_t elem;\n+ QTestState *qts;\n } QVRingIndirectDesc;\n\n struct QVirtioBus {\n@@ -93,7 +96,7 @@ struct QVirtioBus {\n static inline bool qvirtio_is_big_endian(QVirtioDevice *d)\n {\n /* FIXME: virtio 1.0 is always little-endian */\n- return qtest_big_endian(global_qtest);\n+ return qtest_big_endian(d->qts);\n }\n\n static inline uint32_t qvring_size(uint32_t num, uint32_t align)\ndiff --git a/tests/libqos/virtio-mmio.c b/tests/libqos/virtio-mmio.c\nindex 7aa8383338..d151209d8e 100644\n--- a/tests/libqos/virtio-mmio.c\n+++ b/tests/libqos/virtio-mmio.c\n@@ -18,40 +18,40 @@\n static uint8_t qvirtio_mmio_config_readb(QVirtioDevice *d, uint64_t off)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- return readb(dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);\n+ return qtest_readb(d->qts, dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);\n }\n\n static uint16_t qvirtio_mmio_config_readw(QVirtioDevice *d, uint64_t off)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- return readw(dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);\n+ return qtest_readw(d->qts, dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);\n }\n\n static uint32_t qvirtio_mmio_config_readl(QVirtioDevice *d, uint64_t off)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- return readl(dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);\n+ return qtest_readl(d->qts, dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);\n }\n\n static uint64_t qvirtio_mmio_config_readq(QVirtioDevice *d, uint64_t off)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- return readq(dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);\n+ return qtest_readq(d->qts, dev->addr + QVIRTIO_MMIO_DEVICE_SPECIFIC + off);\n }\n\n static uint32_t qvirtio_mmio_get_features(QVirtioDevice *d)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- writel(dev->addr + QVIRTIO_MMIO_HOST_FEATURES_SEL, 0);\n- return readl(dev->addr + QVIRTIO_MMIO_HOST_FEATURES);\n+ qtest_writel(d->qts, dev->addr + QVIRTIO_MMIO_HOST_FEATURES_SEL, 0);\n+ return qtest_readl(d->qts, dev->addr + QVIRTIO_MMIO_HOST_FEATURES);\n }\n\n static void qvirtio_mmio_set_features(QVirtioDevice *d, uint32_t features)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n dev->features = features;\n- writel(dev->addr + QVIRTIO_MMIO_GUEST_FEATURES_SEL, 0);\n- writel(dev->addr + QVIRTIO_MMIO_GUEST_FEATURES, features);\n+ qtest_writel(d->qts, dev->addr + QVIRTIO_MMIO_GUEST_FEATURES_SEL, 0);\n+ qtest_writel(d->qts, dev->addr + QVIRTIO_MMIO_GUEST_FEATURES, features);\n }\n\n static uint32_t qvirtio_mmio_get_guest_features(QVirtioDevice *d)\n@@ -63,13 +63,14 @@ static uint32_t qvirtio_mmio_get_guest_features(QVirtioDevice *d)\n static uint8_t qvirtio_mmio_get_status(QVirtioDevice *d)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- return (uint8_t)readl(dev->addr + QVIRTIO_MMIO_DEVICE_STATUS);\n+ return (uint8_t)qtest_readl(d->qts, dev->addr + QVIRTIO_MMIO_DEVICE_STATUS);\n }\n\n static void qvirtio_mmio_set_status(QVirtioDevice *d, uint8_t status)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- writel(dev->addr + QVIRTIO_MMIO_DEVICE_STATUS, (uint32_t)status);\n+ qtest_writel(d->qts, dev->addr + QVIRTIO_MMIO_DEVICE_STATUS,\n+ (uint32_t)status);\n }\n\n static bool qvirtio_mmio_get_queue_isr_status(QVirtioDevice *d, QVirtQueue *vq)\n@@ -77,9 +78,9 @@ static bool qvirtio_mmio_get_queue_isr_status(QVirtioDevice *d, QVirtQueue *vq)\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n uint32_t isr;\n\n- isr = readl(dev->addr + QVIRTIO_MMIO_INTERRUPT_STATUS) & 1;\n+ isr = qtest_readl(d->qts, dev->addr + QVIRTIO_MMIO_INTERRUPT_STATUS) & 1;\n if (isr != 0) {\n- writel(dev->addr + QVIRTIO_MMIO_INTERRUPT_ACK, 1);\n+ qtest_writel(d->qts, dev->addr + QVIRTIO_MMIO_INTERRUPT_ACK, 1);\n return true;\n }\n\n@@ -91,9 +92,9 @@ static bool qvirtio_mmio_get_config_isr_status(QVirtioDevice *d)\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n uint32_t isr;\n\n- isr = readl(dev->addr + QVIRTIO_MMIO_INTERRUPT_STATUS) & 2;\n+ isr = qtest_readl(d->qts, dev->addr + QVIRTIO_MMIO_INTERRUPT_STATUS) & 2;\n if (isr != 0) {\n- writel(dev->addr + QVIRTIO_MMIO_INTERRUPT_ACK, 2);\n+ qtest_writel(d->qts, dev->addr + QVIRTIO_MMIO_INTERRUPT_ACK, 2);\n return true;\n }\n\n@@ -103,21 +104,23 @@ static bool qvirtio_mmio_get_config_isr_status(QVirtioDevice *d)\n static void qvirtio_mmio_queue_select(QVirtioDevice *d, uint16_t index)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- writel(dev->addr + QVIRTIO_MMIO_QUEUE_SEL, (uint32_t)index);\n+ qtest_writel(d->qts, dev->addr + QVIRTIO_MMIO_QUEUE_SEL, (uint32_t)index);\n\n- g_assert_cmphex(readl(dev->addr + QVIRTIO_MMIO_QUEUE_PFN), ==, 0);\n+ g_assert_cmphex(qtest_readl(d->qts, dev->addr + QVIRTIO_MMIO_QUEUE_PFN),\n+ ==, 0);\n }\n\n static uint16_t qvirtio_mmio_get_queue_size(QVirtioDevice *d)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- return (uint16_t)readl(dev->addr + QVIRTIO_MMIO_QUEUE_NUM_MAX);\n+ return (uint16_t)qtest_readl(d->qts,\n+ dev->addr + QVIRTIO_MMIO_QUEUE_NUM_MAX);\n }\n\n static void qvirtio_mmio_set_queue_address(QVirtioDevice *d, uint32_t pfn)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- writel(dev->addr + QVIRTIO_MMIO_QUEUE_PFN, pfn);\n+ qtest_writel(d->qts, dev->addr + QVIRTIO_MMIO_QUEUE_PFN, pfn);\n }\n\n static QVirtQueue *qvirtio_mmio_virtqueue_setup(QVirtioDevice *d,\n@@ -128,8 +131,9 @@ static QVirtQueue *qvirtio_mmio_virtqueue_setup(QVirtioDevice *d,\n uint64_t addr;\n\n vq = g_malloc0(sizeof(*vq));\n+ vq->qts = d->qts;\n qvirtio_mmio_queue_select(d, index);\n- writel(dev->addr + QVIRTIO_MMIO_QUEUE_ALIGN, dev->page_size);\n+ qtest_writel(d->qts, dev->addr + QVIRTIO_MMIO_QUEUE_ALIGN, dev->page_size);\n\n vq->index = index;\n vq->size = qvirtio_mmio_get_queue_size(d);\n@@ -139,7 +143,7 @@ static QVirtQueue *qvirtio_mmio_virtqueue_setup(QVirtioDevice *d,\n vq->indirect = (dev->features & (1u << VIRTIO_RING_F_INDIRECT_DESC)) != 0;\n vq->event = (dev->features & (1u << VIRTIO_RING_F_EVENT_IDX)) != 0;\n\n- writel(dev->addr + QVIRTIO_MMIO_QUEUE_NUM, vq->size);\n+ qtest_writel(d->qts, dev->addr + QVIRTIO_MMIO_QUEUE_NUM, vq->size);\n\n /* Check different than 0 */\n g_assert_cmpint(vq->size, !=, 0);\n@@ -164,7 +168,7 @@ static void qvirtio_mmio_virtqueue_cleanup(QVirtQueue *vq,\n static void qvirtio_mmio_virtqueue_kick(QVirtioDevice *d, QVirtQueue *vq)\n {\n QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;\n- writel(dev->addr + QVIRTIO_MMIO_QUEUE_NOTIFY, vq->index);\n+ qtest_writel(d->qts, dev->addr + QVIRTIO_MMIO_QUEUE_NOTIFY, vq->index);\n }\n\n const QVirtioBus qvirtio_mmio = {\n@@ -187,21 +191,23 @@ const QVirtioBus qvirtio_mmio = {\n .virtqueue_kick = qvirtio_mmio_virtqueue_kick,\n };\n\n-QVirtioMMIODevice *qvirtio_mmio_init_device(uint64_t addr, uint32_t page_size)\n+QVirtioMMIODevice *qvirtio_mmio_init_device(QTestState *qts, uint64_t addr,\n+ uint32_t page_size)\n {\n QVirtioMMIODevice *dev;\n uint32_t magic;\n dev = g_malloc0(sizeof(*dev));\n\n- magic = readl(addr + QVIRTIO_MMIO_MAGIC_VALUE);\n+ magic = qtest_readl(qts, addr + QVIRTIO_MMIO_MAGIC_VALUE);\n g_assert(magic == ('v' | 'i' << 8 | 'r' << 16 | 't' << 24));\n\n dev->addr = addr;\n dev->page_size = page_size;\n dev->vdev.device_type = readl(addr + QVIRTIO_MMIO_DEVICE_ID);\n dev->vdev.bus = &qvirtio_mmio;\n+ dev->vdev.qts = qts;\n\n- writel(addr + QVIRTIO_MMIO_GUEST_PAGE_SIZE, page_size);\n+ qtest_writel(qts, addr + QVIRTIO_MMIO_GUEST_PAGE_SIZE, page_size);\n\n return dev;\n }\ndiff --git a/tests/libqos/virtio-pci.c b/tests/libqos/virtio-pci.c\nindex 7ac15c04e1..f15971220c 100644\n--- a/tests/libqos/virtio-pci.c\n+++ b/tests/libqos/virtio-pci.c\n@@ -240,6 +240,7 @@ static QVirtQueue *qvirtio_pci_virtqueue_setup(QVirtioDevice *d,\n vqpci->vq.align = VIRTIO_PCI_VRING_ALIGN;\n vqpci->vq.indirect = (feat & (1u << VIRTIO_RING_F_INDIRECT_DESC)) != 0;\n vqpci->vq.event = (feat & (1u << VIRTIO_RING_F_EVENT_IDX)) != 0;\n+ vqpci->vq.qts = d->qts;\n\n vqpci->msix_entry = -1;\n vqpci->msix_addr = 0;\n@@ -316,6 +317,7 @@ QVirtioPCIDevice *qvirtio_pci_device_find(QPCIBus *bus, uint16_t device_type)\n qvirtio_pci_assign_device, &dev);\n\n dev->vdev.bus = &qvirtio_pci;\n+ dev->vdev.qts = bus->qts;\n\n return dev;\n }\n@@ -329,6 +331,7 @@ QVirtioPCIDevice *qvirtio_pci_device_find_slot(QPCIBus *bus,\n qvirtio_pci_assign_device, &dev);\n\n dev->vdev.bus = &qvirtio_pci;\n+ dev->vdev.qts = bus->qts;\n\n return dev;\n }\ndiff --git a/tests/libqos/virtio.c b/tests/libqos/virtio.c\nindex 9880a6964e..064a82f0f3 100644\n--- a/tests/libqos/virtio.c\n+++ b/tests/libqos/virtio.c\n@@ -87,7 +87,7 @@ void qvirtio_wait_queue_isr(QVirtioDevice *d,\n gint64 start_time = g_get_monotonic_time();\n\n for (;;) {\n- clock_step(100);\n+ qtest_clock_step(d->qts, 100);\n if (d->bus->get_queue_isr_status(d, vq)) {\n return;\n }\n@@ -109,7 +109,7 @@ uint8_t qvirtio_wait_status_byte_no_isr(QVirtioDevice *d,\n uint8_t val;\n\n while ((val = readb(addr)) == 0xff) {\n- clock_step(100);\n+ qtest_clock_step(d->qts, 100);\n g_assert(!d->bus->get_queue_isr_status(d, vq));\n g_assert(g_get_monotonic_time() - start_time <= timeout_us);\n }\n@@ -133,7 +133,7 @@ void qvirtio_wait_used_elem(QVirtioDevice *d,\n for (;;) {\n uint32_t got_desc_idx;\n\n- clock_step(100);\n+ qtest_clock_step(d->qts, 100);\n\n if (d->bus->get_queue_isr_status(d, vq) &&\n qvirtqueue_get_buf(vq, &got_desc_idx)) {\n@@ -150,7 +150,7 @@ void qvirtio_wait_config_isr(QVirtioDevice *d, gint64 timeout_us)\n gint64 start_time = g_get_monotonic_time();\n\n for (;;) {\n- clock_step(100);\n+ qtest_clock_step(d->qts, 100);\n if (d->bus->get_config_isr_status(d)) {\n return;\n }\n@@ -169,22 +169,23 @@ void qvring_init(const QGuestAllocator *alloc, QVirtQueue *vq, uint64_t addr)\n\n for (i = 0; i < vq->size - 1; i++) {\n /* vq->desc[i].addr */\n- writeq(vq->desc + (16 * i), 0);\n+ qtest_writeq(vq->qts, vq->desc + (16 * i), 0);\n /* vq->desc[i].next */\n- writew(vq->desc + (16 * i) + 14, i + 1);\n+ qtest_writew(vq->qts, vq->desc + (16 * i) + 14, i + 1);\n }\n\n /* vq->avail->flags */\n- writew(vq->avail, 0);\n+ qtest_writew(vq->qts, vq->avail, 0);\n /* vq->avail->idx */\n- writew(vq->avail + 2, 0);\n+ qtest_writew(vq->qts, vq->avail + 2, 0);\n /* vq->avail->used_event */\n- writew(vq->avail + 4 + (2 * vq->size), 0);\n+ qtest_writew(vq->qts, vq->avail + 4 + (2 * vq->size), 0);\n\n /* vq->used->flags */\n- writew(vq->used, 0);\n+ qtest_writew(vq->qts, vq->used, 0);\n /* vq->used->avail_event */\n- writew(vq->used + 2 + sizeof(struct vring_used_elem) * vq->size, 0);\n+ qtest_writew(vq->qts,\n+ vq->used + 2 + sizeof(struct vring_used_elem) * vq->size, 0);\n }\n\n QVRingIndirectDesc *qvring_indirect_desc_setup(QVirtioDevice *d,\n@@ -196,14 +197,15 @@ QVRingIndirectDesc *qvring_indirect_desc_setup(QVirtioDevice *d,\n indirect->index = 0;\n indirect->elem = elem;\n indirect->desc = guest_alloc(alloc, sizeof(struct vring_desc) * elem);\n+ indirect->qts = d->qts;\n\n for (i = 0; i < elem - 1; ++i) {\n /* indirect->desc[i].addr */\n- writeq(indirect->desc + (16 * i), 0);\n+ qtest_writeq(d->qts, indirect->desc + (16 * i), 0);\n /* indirect->desc[i].flags */\n- writew(indirect->desc + (16 * i) + 12, VRING_DESC_F_NEXT);\n+ qtest_writew(d->qts, indirect->desc + (16 * i) + 12, VRING_DESC_F_NEXT);\n /* indirect->desc[i].next */\n- writew(indirect->desc + (16 * i) + 14, i + 1);\n+ qtest_writew(d->qts, indirect->desc + (16 * i) + 14, i + 1);\n }\n\n return indirect;\n@@ -216,18 +218,21 @@ void qvring_indirect_desc_add(QVRingIndirectDesc *indirect, uint64_t data,\n\n g_assert_cmpint(indirect->index, <, indirect->elem);\n\n- flags = readw(indirect->desc + (16 * indirect->index) + 12);\n+ flags = qtest_readw(indirect->qts,\n+ indirect->desc + (16 * indirect->index) + 12);\n\n if (write) {\n flags |= VRING_DESC_F_WRITE;\n }\n\n /* indirect->desc[indirect->index].addr */\n- writeq(indirect->desc + (16 * indirect->index), data);\n+ qtest_writeq(indirect->qts, indirect->desc + (16 * indirect->index), data);\n /* indirect->desc[indirect->index].len */\n- writel(indirect->desc + (16 * indirect->index) + 8, len);\n+ qtest_writel(indirect->qts,\n+ indirect->desc + (16 * indirect->index) + 8, len);\n /* indirect->desc[indirect->index].flags */\n- writew(indirect->desc + (16 * indirect->index) + 12, flags);\n+ qtest_writew(indirect->qts,\n+ indirect->desc + (16 * indirect->index) + 12, flags);\n\n indirect->index++;\n }\n@@ -247,11 +252,11 @@ uint32_t qvirtqueue_add(QVirtQueue *vq, uint64_t data, uint32_t len, bool write,\n }\n\n /* vq->desc[vq->free_head].addr */\n- writeq(vq->desc + (16 * vq->free_head), data);\n+ qtest_writeq(vq->qts, vq->desc + (16 * vq->free_head), data);\n /* vq->desc[vq->free_head].len */\n- writel(vq->desc + (16 * vq->free_head) + 8, len);\n+ qtest_writel(vq->qts, vq->desc + (16 * vq->free_head) + 8, len);\n /* vq->desc[vq->free_head].flags */\n- writew(vq->desc + (16 * vq->free_head) + 12, flags);\n+ qtest_writew(vq->qts, vq->desc + (16 * vq->free_head) + 12, flags);\n\n return vq->free_head++; /* Return and increase, in this order */\n }\n@@ -265,12 +270,13 @@ uint32_t qvirtqueue_add_indirect(QVirtQueue *vq, QVRingIndirectDesc *indirect)\n vq->num_free--;\n\n /* vq->desc[vq->free_head].addr */\n- writeq(vq->desc + (16 * vq->free_head), indirect->desc);\n+ qtest_writeq(vq->qts, vq->desc + (16 * vq->free_head), indirect->desc);\n /* vq->desc[vq->free_head].len */\n- writel(vq->desc + (16 * vq->free_head) + 8,\n- sizeof(struct vring_desc) * indirect->elem);\n+ qtest_writel(vq->qts, vq->desc + (16 * vq->free_head) + 8,\n+ sizeof(struct vring_desc) * indirect->elem);\n /* vq->desc[vq->free_head].flags */\n- writew(vq->desc + (16 * vq->free_head) + 12, VRING_DESC_F_INDIRECT);\n+ qtest_writew(vq->qts,\n+ vq->desc + (16 * vq->free_head) + 12, VRING_DESC_F_INDIRECT);\n\n return vq->free_head++; /* Return and increase, in this order */\n }\n@@ -278,21 +284,23 @@ uint32_t qvirtqueue_add_indirect(QVirtQueue *vq, QVRingIndirectDesc *indirect)\n void qvirtqueue_kick(QVirtioDevice *d, QVirtQueue *vq, uint32_t free_head)\n {\n /* vq->avail->idx */\n- uint16_t idx = readw(vq->avail + 2);\n+ uint16_t idx = qtest_readw(d->qts, vq->avail + 2);\n /* vq->used->flags */\n uint16_t flags;\n /* vq->used->avail_event */\n uint16_t avail_event;\n\n+ assert(d->qts == vq->qts);\n+\n /* vq->avail->ring[idx % vq->size] */\n- writew(vq->avail + 4 + (2 * (idx % vq->size)), free_head);\n+ qtest_writew(d->qts, vq->avail + 4 + (2 * (idx % vq->size)), free_head);\n /* vq->avail->idx */\n- writew(vq->avail + 2, idx + 1);\n+ qtest_writew(d->qts, vq->avail + 2, idx + 1);\n\n /* Must read after idx is updated */\n- flags = readw(vq->avail);\n- avail_event = readw(vq->used + 4 +\n- sizeof(struct vring_used_elem) * vq->size);\n+ flags = qtest_readw(d->qts, vq->avail);\n+ avail_event = qtest_readw(d->qts, vq->used + 4 +\n+ sizeof(struct vring_used_elem) * vq->size);\n\n /* < 1 because we add elements to avail queue one by one */\n if ((flags & VRING_USED_F_NO_NOTIFY) == 0 &&\n@@ -313,7 +321,7 @@ bool qvirtqueue_get_buf(QVirtQueue *vq, uint32_t *desc_idx)\n {\n uint16_t idx;\n\n- idx = readw(vq->used + offsetof(struct vring_used, idx));\n+ idx = qtest_readw(vq->qts, vq->used + offsetof(struct vring_used, idx));\n if (idx == vq->last_used_idx) {\n return false;\n }\n@@ -325,7 +333,8 @@ bool qvirtqueue_get_buf(QVirtQueue *vq, uint32_t *desc_idx)\n offsetof(struct vring_used, ring) +\n (vq->last_used_idx % vq->size) *\n sizeof(struct vring_used_elem);\n- *desc_idx = readl(elem_addr + offsetof(struct vring_used_elem, id));\n+ *desc_idx = qtest_readl(vq->qts, elem_addr +\n+ offsetof(struct vring_used_elem, id));\n }\n\n vq->last_used_idx++;\n@@ -337,5 +346,5 @@ void qvirtqueue_set_used_event(QVirtQueue *vq, uint16_t idx)\n g_assert(vq->event);\n\n /* vq->avail->used_event */\n- writew(vq->avail + 4 + (2 * vq->size), idx);\n+ qtest_writew(vq->qts, vq->avail + 4 + (2 * vq->size), idx);\n }\ndiff --git a/tests/virtio-blk-test.c b/tests/virtio-blk-test.c\nindex 0576cb16ba..26d0a7e9af 100644\n--- a/tests/virtio-blk-test.c\n+++ b/tests/virtio-blk-test.c\n@@ -687,7 +687,8 @@ static void mmio_basic(void)\n\n arm_test_start();\n\n- dev = qvirtio_mmio_init_device(MMIO_DEV_BASE_ADDR, MMIO_PAGE_SIZE);\n+ dev = qvirtio_mmio_init_device(global_qtest, MMIO_DEV_BASE_ADDR,\n+ MMIO_PAGE_SIZE);\n g_assert(dev != NULL);\n g_assert_cmphex(dev->vdev.device_type, ==, VIRTIO_ID_BLOCK);\n\n", "prefixes": [ "v6", "16/29" ] }