Patch Detail

HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 808712,
    "url": "http://patchwork.ozlabs.org/api/patches/808712/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20170901145343.19890-2-thierry.reding@gmail.com/",
    "project": {
        "id": 21,
        "url": "http://patchwork.ozlabs.org/api/projects/21/?format=api",
        "name": "Linux Tegra Development",
        "link_name": "linux-tegra",
        "list_id": "linux-tegra.vger.kernel.org",
        "list_email": "linux-tegra@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20170901145343.19890-2-thierry.reding@gmail.com>",
    "list_archive_url": null,
    "date": "2017-09-01T14:53:41",
    "name": "[2/4] clk: tegra: Add peripheral clock registration helper",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": false,
    "hash": "3a24e3ba6bfddb17cf30d3162574eb4b6a903b6a",
    "submitter": {
        "id": 26234,
        "url": "http://patchwork.ozlabs.org/api/people/26234/?format=api",
        "name": "Thierry Reding",
        "email": "thierry.reding@gmail.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20170901145343.19890-2-thierry.reding@gmail.com/mbox/",
    "series": [
        {
            "id": 1041,
            "url": "http://patchwork.ozlabs.org/api/series/1041/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/list/?series=1041",
            "date": "2017-09-01T14:53:40",
            "name": "[1/4] dt-bindings: clock: tegra: Add sor1_out clock",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/1041/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/808712/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/808712/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<linux-tegra-owner@vger.kernel.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org",
        "Authentication-Results": [
            "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-tegra-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)",
            "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"bg19PTs1\"; dkim-atps=neutral"
        ],
        "Received": [
            "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xkMgx27RPz9t2d\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat,  2 Sep 2017 00:53:49 +1000 (AEST)",
            "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752182AbdIAOxs (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tFri, 1 Sep 2017 10:53:48 -0400",
            "from mail-wr0-f195.google.com ([209.85.128.195]:33544 \"EHLO\n\tmail-wr0-f195.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752103AbdIAOxr (ORCPT\n\t<rfc822; linux-tegra@vger.kernel.org>); Fri, 1 Sep 2017 10:53:47 -0400",
            "by mail-wr0-f195.google.com with SMTP id k94so224270wrc.0;\n\tFri, 01 Sep 2017 07:53:47 -0700 (PDT)",
            "from localhost\n\t(p200300E41BD6D60076D02BFFFE273F51.dip0.t-ipconnect.de.\n\t[2003:e4:1bd6:d600:76d0:2bff:fe27:3f51])\n\tby smtp.gmail.com with ESMTPSA id\n\tl64sm357690wmb.12.2017.09.01.07.53.45\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tFri, 01 Sep 2017 07:53:45 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=YplCAasDEAfh7GvT+OrGGQXgKBJRx8MaTAZG4PHX5QE=;\n\tb=bg19PTs1UOoKQyy70k3/iCc12uRi5ICFXtZE73cyQ2ATVDIL/UoAylT622Vel/58UL\n\tIstoDlV6IROoXoSAbJZALFKVX2hE7jh7u9TMn7Q6nY8O/o56Y5VYTl8MPMMUomLZVONI\n\t2nb2C91oPqumjGRZwtSbqvPCoNwPsWWfRkz4cRFpBIKIlxUaLgwjsmBaOIdt0hdG8JaN\n\t1VHVWiJp4ZEyNloyfKkfFN5lf3M5LFf4RjICrDK/gRdgV+GSeyeesW6MDdDGKycq5GNp\n\tQhFzlyJnlCI0eQIw8xhbHll3bwEzL5EmqWPA7WQISfQrGctRBPuQhmrkPSYydBgMK0Hb\n\tjNsw==",
        "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=YplCAasDEAfh7GvT+OrGGQXgKBJRx8MaTAZG4PHX5QE=;\n\tb=LtbUrlU0GxTF9toCIf4ka/pnm0/kR89tZ6Pbu678g2pw8sG6aHkGZv6raUxuNhzlyj\n\tTeTSBlvoAqRVppgFEeTTTfcUmFX3wAr8rWLmtDY2bAr8CLH3gi4JGHxMPLMucY4rRjrq\n\tg8+ocWbhMutc6BO89KUFPrjJqPfxl7KdDwYWIHCH4I6f3uJjbFLRHIQM6MonxNwOJku/\n\t5bToWb0IMsCDM4Fd7CpStdfh3va5hIksE/a4u+FpATtWMNiGp0LEcdesBK6pxntKg09f\n\tujmqryz3vx+8nkyyJPmdemyLed89OFK6sgPcDoqVRcuOuMk3Kgs8P/nt4/tOYXlT02da\n\t2+kA==",
        "X-Gm-Message-State": "AHPjjUidnHwRJId4hz0tpM2zAkb7xJ4AypcqAoiKr2Zur6lWWWZEITgH\n\tVIqgtWn9sYj+XQ==",
        "X-Google-Smtp-Source": "ADKCNb7qlk6KHbD5AZ/QjypeNvPuOUVp5lPNc2HFgj5pmFnDoMZ6Ez+SiJdSCruXoNWzWGXtObEw8g==",
        "X-Received": "by 10.223.142.87 with SMTP id n81mr1314860wrb.164.1504277626554; \n\tFri, 01 Sep 2017 07:53:46 -0700 (PDT)",
        "From": "Thierry Reding <thierry.reding@gmail.com>",
        "To": "Michael Turquette <mturquette@baylibre.com>,\n\tStephen Boyd <sboyd@codeaurora.org>",
        "Cc": "Peter De Schrijver <pdeschrijver@nvidia.com>,\n\tJonathan Hunter <jonathanh@nvidia.com>,\n\tlinux-clk@vger.kernel.org, linux-tegra@vger.kernel.org",
        "Subject": "[PATCH 2/4] clk: tegra: Add peripheral clock registration helper",
        "Date": "Fri,  1 Sep 2017 16:53:41 +0200",
        "Message-Id": "<20170901145343.19890-2-thierry.reding@gmail.com>",
        "X-Mailer": "git-send-email 2.13.3",
        "In-Reply-To": "<20170901145343.19890-1-thierry.reding@gmail.com>",
        "References": "<20170901145343.19890-1-thierry.reding@gmail.com>",
        "Sender": "linux-tegra-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<linux-tegra.vger.kernel.org>",
        "X-Mailing-List": "linux-tegra@vger.kernel.org"
    },
    "content": "From: Thierry Reding <treding@nvidia.com>\n\nThere is a common pattern that registers individual peripheral clocks\nfrom an initialization table. Add a common implementation to remove the\nduplication from various call sites.\n\nSigned-off-by: Thierry Reding <treding@nvidia.com>\n---\n drivers/clk/tegra/clk-periph.c | 8 ++++++++\n drivers/clk/tegra/clk.h        | 3 +++\n 2 files changed, 11 insertions(+)",
    "diff": "diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c\nindex cf80831de79d..9475c00b7cf9 100644\n--- a/drivers/clk/tegra/clk-periph.c\n+++ b/drivers/clk/tegra/clk-periph.c\n@@ -203,3 +203,11 @@ struct clk *tegra_clk_register_periph_nodiv(const char *name,\n \treturn _tegra_clk_register_periph(name, parent_names, num_parents,\n \t\t\tperiph, clk_base, offset, CLK_SET_RATE_PARENT);\n }\n+\n+struct clk *tegra_clk_register_periph_data(void __iomem *clk_base,\n+\t\t\t\t\t   struct tegra_periph_init_data *init)\n+{\n+\treturn _tegra_clk_register_periph(init->name, init->p.parent_names,\n+\t\t\t\t\t  init->num_parents, &init->periph,\n+\t\t\t\t\t  clk_base, init->offset, init->flags);\n+}\ndiff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h\nindex 872f1189ad7f..3b2763df51c2 100644\n--- a/drivers/clk/tegra/clk.h\n+++ b/drivers/clk/tegra/clk.h\n@@ -662,6 +662,9 @@ struct tegra_periph_init_data {\n \t\t\t_clk_num, _gate_flags, _clk_id,\\\n \t\t\tNULL, 0, NULL)\n \n+struct clk *tegra_clk_register_periph_data(void __iomem *clk_base,\n+\t\t\t\t\t   struct tegra_periph_init_data *init);\n+\n /**\n  * struct clk_super_mux - super clock\n  *\n",
    "prefixes": [
        "2/4"
    ]
}