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{
    "id": 808666,
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        "name": "Linux network development",
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    "msgid": "<20170901115604.27513-5-clabbe.montjoie@gmail.com>",
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    "date": "2017-09-01T11:56:03",
    "name": "[v2,4/5] net: mdio-mux-mmioreg: Can handle 8/16/32 bits registers",
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    "pull_url": null,
    "state": "accepted",
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    "submitter": {
        "id": 64152,
        "url": "http://patchwork.ozlabs.org/api/people/64152/?format=api",
        "name": "Corentin Labbe",
        "email": "clabbe.montjoie@gmail.com"
    },
    "delegate": {
        "id": 34,
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        "username": "davem",
        "first_name": "David",
        "last_name": "Miller",
        "email": "davem@davemloft.net"
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            "web_url": "http://patchwork.ozlabs.org/project/netdev/list/?series=1013",
            "date": "2017-09-01T11:56:01",
            "name": "net: mdio-mux: Misc fix",
            "version": 2,
            "mbox": "http://patchwork.ozlabs.org/series/1013/mbox/"
        }
    ],
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    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/808666/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "X-Received": "by 10.223.166.38 with SMTP id k35mr1003156wrc.183.1504267097003; \n\tFri, 01 Sep 2017 04:58:17 -0700 (PDT)",
        "From": "Corentin Labbe <clabbe.montjoie@gmail.com>",
        "To": "andrew@lunn.ch, f.fainelli@gmail.com",
        "Cc": "netdev@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tCorentin Labbe <clabbe.montjoie@gmail.com>",
        "Subject": "[PATCH v2 4/5] net: mdio-mux-mmioreg: Can handle 8/16/32 bits\n\tregisters",
        "Date": "Fri,  1 Sep 2017 13:56:03 +0200",
        "Message-Id": "<20170901115604.27513-5-clabbe.montjoie@gmail.com>",
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        "In-Reply-To": "<20170901115604.27513-1-clabbe.montjoie@gmail.com>",
        "References": "<20170901115604.27513-1-clabbe.montjoie@gmail.com>",
        "Sender": "netdev-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<netdev.vger.kernel.org>",
        "X-Mailing-List": "netdev@vger.kernel.org"
    },
    "content": "This patch fix an old information that mdio-mux-mmioreg can only handle\n8bit registers.\nThis is not true anymore.\n\nSigned-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>\nReviewed-by: Andrew Lunn <andrew@lunn.ch>\n---\n drivers/net/phy/Kconfig | 2 +-\n 1 file changed, 1 insertion(+), 1 deletion(-)",
    "diff": "diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig\nindex 5afe6fdcc968..a9d16a3af514 100644\n--- a/drivers/net/phy/Kconfig\n+++ b/drivers/net/phy/Kconfig\n@@ -85,7 +85,7 @@ config MDIO_BUS_MUX_MMIOREG\n \t  parent bus.  Child bus selection is under the control of one of\n \t  the FPGA's registers.\n \n-\t  Currently, only 8-bit registers are supported.\n+\t  Currently, only 8/16/32 bits registers are supported.\n \n config MDIO_CAVIUM\n \ttristate\n",
    "prefixes": [
        "v2",
        "4/5"
    ]
}