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GET /api/patches/808560/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 808560,
    "url": "http://patchwork.ozlabs.org/api/patches/808560/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/patch/1504251255-20469-3-git-send-email-pierre-yves.mordret@st.com/",
    "project": {
        "id": 35,
        "url": "http://patchwork.ozlabs.org/api/projects/35/?format=api",
        "name": "Linux I2C development",
        "link_name": "linux-i2c",
        "list_id": "linux-i2c.vger.kernel.org",
        "list_email": "linux-i2c@vger.kernel.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<1504251255-20469-3-git-send-email-pierre-yves.mordret@st.com>",
    "list_archive_url": null,
    "date": "2017-09-01T07:34:12",
    "name": "[RESEND,v3,2/5] i2c: i2c-stm32f4: use generic definition of speed enum",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": false,
    "hash": "e2ff20ff9d4696bce4b6a80d3fe6cd19597aa8b0",
    "submitter": {
        "id": 71499,
        "url": "http://patchwork.ozlabs.org/api/people/71499/?format=api",
        "name": "Pierre Yves MORDRET",
        "email": "pierre-yves.mordret@st.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-i2c/patch/1504251255-20469-3-git-send-email-pierre-yves.mordret@st.com/mbox/",
    "series": [
        {
            "id": 965,
            "url": "http://patchwork.ozlabs.org/api/series/965/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/list/?series=965",
            "date": "2017-09-01T07:34:11",
            "name": "Add support for the STM32F7 I2C",
            "version": 3,
            "mbox": "http://patchwork.ozlabs.org/series/965/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/808560/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/808560/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<linux-i2c-owner@vger.kernel.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org",
        "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-i2c-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)",
        "Received": [
            "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xk9zk5Mkpz9sMN\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri,  1 Sep 2017 17:36:50 +1000 (AEST)",
            "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751506AbdIAHfX (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tFri, 1 Sep 2017 03:35:23 -0400",
            "from mx08-00178001.pphosted.com ([91.207.212.93]:61078 \"EHLO\n\tmx07-00178001.pphosted.com\" rhost-flags-OK-OK-OK-FAIL)\n\tby vger.kernel.org with ESMTP id S1751359AbdIAHfV (ORCPT\n\t<rfc822;linux-i2c@vger.kernel.org>); Fri, 1 Sep 2017 03:35:21 -0400",
            "from pps.filterd (m0046660.ppops.net [127.0.0.1])\n\tby mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv817Y2jB017880; Fri, 1 Sep 2017 09:34:32 +0200",
            "from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35])\n\tby mx08-00178001.pphosted.com with ESMTP id 2cq184gtbd-1\n\t(version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT);\n\tFri, 01 Sep 2017 09:34:32 +0200",
            "from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9])\n\tby beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 81C7138;\n\tFri,  1 Sep 2017 07:34:31 +0000 (GMT)",
            "from Webmail-eu.st.com (sfhdag5node2.st.com [10.75.127.14])\n\tby zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 64A27135D;\n\tFri,  1 Sep 2017 07:34:31 +0000 (GMT)",
            "from localhost (10.75.127.49) by SFHDAG5NODE2.st.com (10.75.127.14)\n\twith Microsoft SMTP Server (TLS) id 15.0.1178.4;\n\tFri, 1 Sep 2017 09:34:30 +0200"
        ],
        "From": "Pierre-Yves MORDRET <pierre-yves.mordret@st.com>",
        "To": "Wolfram Sang <wsa@the-dreams.de>, Rob Herring <robh+dt@kernel.org>,\n\tMark Rutland <mark.rutland@arm.com>,\n\tMaxime Coquelin <mcoquelin.stm32@gmail.com>,\n\tAlexandre Torgue <alexandre.torgue@st.com>,\n\tRussell King <linux@armlinux.org.uk>,\n\t<linux-i2c@vger.kernel.org>, <devicetree@vger.kernel.org>,\n\t<linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>",
        "CC": "Pierre-Yves MORDRET <pierre-yves.mordret@st.com>",
        "Subject": "[RESEND PATCH v3 2/5] i2c: i2c-stm32f4: use generic definition of\n\tspeed enum",
        "Date": "Fri, 1 Sep 2017 09:34:12 +0200",
        "Message-ID": "<1504251255-20469-3-git-send-email-pierre-yves.mordret@st.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": "<1504251255-20469-1-git-send-email-pierre-yves.mordret@st.com>",
        "References": "<1504251255-20469-1-git-send-email-pierre-yves.mordret@st.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-Originating-IP": "[10.75.127.49]",
        "X-ClientProxiedBy": "SFHDAG7NODE2.st.com (10.75.127.20) To SFHDAG5NODE2.st.com\n\t(10.75.127.14)",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-01_02:, , signatures=0",
        "Sender": "linux-i2c-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<linux-i2c.vger.kernel.org>",
        "X-Mailing-List": "linux-i2c@vger.kernel.org"
    },
    "content": "This patch uses a more generic definition of speed enum for i2c-stm32f4\ndriver.\n\nSigned-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>\nSigned-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>\nReviewed-by: Ludovic BARRE <ludovic.barre@st.com>\n---\n Version history:\n    v3:\n    v2:\n        * None\n---\n---\n drivers/i2c/busses/i2c-stm32.h   | 20 ++++++++++++++++++++\n drivers/i2c/busses/i2c-stm32f4.c | 18 +++++++-----------\n 2 files changed, 27 insertions(+), 11 deletions(-)\n create mode 100644 drivers/i2c/busses/i2c-stm32.h",
    "diff": "diff --git a/drivers/i2c/busses/i2c-stm32.h b/drivers/i2c/busses/i2c-stm32.h\nnew file mode 100644\nindex 0000000..dab5176\n--- /dev/null\n+++ b/drivers/i2c/busses/i2c-stm32.h\n@@ -0,0 +1,20 @@\n+/*\n+ * i2c-stm32.h\n+ *\n+ * Copyright (C) M'boumba Cedric Madianga 2017\n+ * Author: M'boumba Cedric Madianga <cedric.madianga@gmail.com>\n+ *\n+ * License terms:  GNU General Public License (GPL), version 2\n+ */\n+\n+#ifndef _I2C_STM32_H\n+#define _I2C_STM32_H\n+\n+enum stm32_i2c_speed {\n+\tSTM32_I2C_SPEED_STANDARD, /* 100 kHz */\n+\tSTM32_I2C_SPEED_FAST, /* 400 kHz */\n+\tSTM32_I2C_SPEED_FAST_PLUS, /* 1 MHz */\n+\tSTM32_I2C_SPEED_END,\n+};\n+\n+#endif /* _I2C_STM32_H */\ndiff --git a/drivers/i2c/busses/i2c-stm32f4.c b/drivers/i2c/busses/i2c-stm32f4.c\nindex f9dd7e8..b81557d 100644\n--- a/drivers/i2c/busses/i2c-stm32f4.c\n+++ b/drivers/i2c/busses/i2c-stm32f4.c\n@@ -27,6 +27,8 @@\n #include <linux/platform_device.h>\n #include <linux/reset.h>\n \n+#include \"i2c-stm32.h\"\n+\n /* STM32F4 I2C offset registers */\n #define STM32F4_I2C_CR1\t\t\t0x00\n #define STM32F4_I2C_CR2\t\t\t0x04\n@@ -90,12 +92,6 @@\n #define STM32F4_I2C_MAX_FREQ\t\t46U\n #define HZ_TO_MHZ\t\t\t1000000\n \n-enum stm32f4_i2c_speed {\n-\tSTM32F4_I2C_SPEED_STANDARD, /* 100 kHz */\n-\tSTM32F4_I2C_SPEED_FAST, /* 400 kHz */\n-\tSTM32F4_I2C_SPEED_END,\n-};\n-\n /**\n  * struct stm32f4_i2c_msg - client specific data\n  * @addr: 8-bit slave addr, including r/w bit\n@@ -159,7 +155,7 @@ static int stm32f4_i2c_set_periph_clk_freq(struct stm32f4_i2c_dev *i2c_dev)\n \ti2c_dev->parent_rate = clk_get_rate(i2c_dev->clk);\n \tfreq = DIV_ROUND_UP(i2c_dev->parent_rate, HZ_TO_MHZ);\n \n-\tif (i2c_dev->speed == STM32F4_I2C_SPEED_STANDARD) {\n+\tif (i2c_dev->speed == STM32_I2C_SPEED_STANDARD) {\n \t\t/*\n \t\t * To reach 100 kHz, the parent clk frequency should be between\n \t\t * a minimum value of 2 MHz and a maximum value of 46 MHz due\n@@ -216,7 +212,7 @@ static void stm32f4_i2c_set_rise_time(struct stm32f4_i2c_dev *i2c_dev)\n \t * is not higher than 46 MHz . As a result trise is at most 4 bits wide\n \t * and so fits into the TRISE bits [5:0].\n \t */\n-\tif (i2c_dev->speed == STM32F4_I2C_SPEED_STANDARD)\n+\tif (i2c_dev->speed == STM32_I2C_SPEED_STANDARD)\n \t\ttrise = freq + 1;\n \telse\n \t\ttrise = freq * 3 / 10 + 1;\n@@ -230,7 +226,7 @@ static void stm32f4_i2c_set_speed_mode(struct stm32f4_i2c_dev *i2c_dev)\n \tu32 val;\n \tu32 ccr = 0;\n \n-\tif (i2c_dev->speed == STM32F4_I2C_SPEED_STANDARD) {\n+\tif (i2c_dev->speed == STM32_I2C_SPEED_STANDARD) {\n \t\t/*\n \t\t * In standard mode:\n \t\t * t_scl_high = t_scl_low = CCR * I2C parent clk period\n@@ -808,10 +804,10 @@ static int stm32f4_i2c_probe(struct platform_device *pdev)\n \tudelay(2);\n \treset_control_deassert(rst);\n \n-\ti2c_dev->speed = STM32F4_I2C_SPEED_STANDARD;\n+\ti2c_dev->speed = STM32_I2C_SPEED_STANDARD;\n \tret = of_property_read_u32(np, \"clock-frequency\", &clk_rate);\n \tif (!ret && clk_rate >= 400000)\n-\t\ti2c_dev->speed = STM32F4_I2C_SPEED_FAST;\n+\t\ti2c_dev->speed = STM32_I2C_SPEED_FAST;\n \n \ti2c_dev->dev = &pdev->dev;\n \n",
    "prefixes": [
        "RESEND",
        "v3",
        "2/5"
    ]
}