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GET /api/patches/808559/?format=api
{ "id": 808559, "url": "http://patchwork.ozlabs.org/api/patches/808559/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/patch/1504251255-20469-5-git-send-email-pierre-yves.mordret@st.com/", "project": { "id": 35, "url": "http://patchwork.ozlabs.org/api/projects/35/?format=api", "name": "Linux I2C development", "link_name": "linux-i2c", "list_id": "linux-i2c.vger.kernel.org", "list_email": "linux-i2c@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1504251255-20469-5-git-send-email-pierre-yves.mordret@st.com>", "list_archive_url": null, "date": "2017-09-01T07:34:14", "name": "[RESEND,v3,4/5] ARM: dts: stm32: Add I2C1 support for STM32F746 SoC", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": false, "hash": "34718e64a8c503524ed34deb99136f39259f336e", "submitter": { "id": 71499, "url": "http://patchwork.ozlabs.org/api/people/71499/?format=api", "name": "Pierre Yves MORDRET", "email": "pierre-yves.mordret@st.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-i2c/patch/1504251255-20469-5-git-send-email-pierre-yves.mordret@st.com/mbox/", "series": [ { "id": 965, "url": "http://patchwork.ozlabs.org/api/series/965/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/list/?series=965", "date": "2017-09-01T07:34:11", "name": "Add support for the STM32F7 I2C", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/965/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/808559/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/808559/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-i2c-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-i2c-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xk9zc67Cbz9s83\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 1 Sep 2017 17:36:44 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751813AbdIAHgN (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tFri, 1 Sep 2017 03:36:13 -0400", "from mx08-00178001.pphosted.com ([91.207.212.93]:55621 \"EHLO\n\tmx07-00178001.pphosted.com\" rhost-flags-OK-OK-OK-FAIL)\n\tby vger.kernel.org with ESMTP id S1751511AbdIAHfY (ORCPT\n\t<rfc822;linux-i2c@vger.kernel.org>); Fri, 1 Sep 2017 03:35:24 -0400", "from pps.filterd (m0046661.ppops.net [127.0.0.1])\n\tby mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv817XqXN026802; Fri, 1 Sep 2017 09:34:33 +0200", "from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35])\n\tby mx08-00178001.pphosted.com with ESMTP id 2cq1810tch-1\n\t(version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT);\n\tFri, 01 Sep 2017 09:34:33 +0200", "from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9])\n\tby beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5534E34;\n\tFri, 1 Sep 2017 07:34:33 +0000 (GMT)", "from Webmail-eu.st.com (sfhdag5node2.st.com [10.75.127.14])\n\tby zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2140A11EC;\n\tFri, 1 Sep 2017 07:34:33 +0000 (GMT)", "from localhost (10.75.127.47) by SFHDAG5NODE2.st.com (10.75.127.14)\n\twith Microsoft SMTP Server (TLS) id 15.0.1178.4;\n\tFri, 1 Sep 2017 09:34:32 +0200" ], "From": "Pierre-Yves MORDRET <pierre-yves.mordret@st.com>", "To": "Wolfram Sang <wsa@the-dreams.de>, Rob Herring <robh+dt@kernel.org>,\n\tMark Rutland <mark.rutland@arm.com>,\n\tMaxime Coquelin <mcoquelin.stm32@gmail.com>,\n\tAlexandre Torgue <alexandre.torgue@st.com>,\n\tRussell King <linux@armlinux.org.uk>,\n\t<linux-i2c@vger.kernel.org>, <devicetree@vger.kernel.org>,\n\t<linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>", "CC": "Pierre-Yves MORDRET <pierre-yves.mordret@st.com>", "Subject": "[RESEND PATCH v3 4/5] ARM: dts: stm32: Add I2C1 support for\n\tSTM32F746 SoC", "Date": "Fri, 1 Sep 2017 09:34:14 +0200", "Message-ID": "<1504251255-20469-5-git-send-email-pierre-yves.mordret@st.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1504251255-20469-1-git-send-email-pierre-yves.mordret@st.com>", "References": "<1504251255-20469-1-git-send-email-pierre-yves.mordret@st.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.75.127.47]", "X-ClientProxiedBy": "SFHDAG7NODE3.st.com (10.75.127.21) To SFHDAG5NODE2.st.com\n\t(10.75.127.14)", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-01_02:, , signatures=0", "Sender": "linux-i2c-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-i2c.vger.kernel.org>", "X-Mailing-List": "linux-i2c@vger.kernel.org" }, "content": "This patch adds I2C1 support for STM32F746 SoC.\n\nSigned-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>\nSigned-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>\n---\n Version history:\n v3:\n * None\n v2:\n * Update I2C SoC device tree with latest Linux version\n---\n---\n arch/arm/boot/dts/stm32f746.dtsi | 22 ++++++++++++++++++++++\n 1 file changed, 22 insertions(+)", "diff": "diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi\nindex 4506eb9..ddd8f2c 100644\n--- a/arch/arm/boot/dts/stm32f746.dtsi\n+++ b/arch/arm/boot/dts/stm32f746.dtsi\n@@ -361,6 +361,16 @@\n \t\t\t\t\tbias-disable;\n \t\t\t\t};\n \t\t\t};\n+\n+\t\t\ti2c1_pins_b: i2c1@0 {\n+\t\t\t\tpins {\n+\t\t\t\t\tpinmux = <STM32F746_PB9_FUNC_I2C1_SDA>,\n+\t\t\t\t\t\t <STM32F746_PB8_FUNC_I2C1_SCL>;\n+\t\t\t\t\tbias-disable;\n+\t\t\t\t\tdrive-open-drain;\n+\t\t\t\t\tslew-rate = <0>;\n+\t\t\t\t};\n+\t\t\t};\n \t\t};\n \n \t\tcrc: crc@40023000 {\n@@ -380,6 +390,18 @@\n \t\t\tassigned-clocks = <&rcc 1 CLK_HSE_RTC>;\n \t\t\tassigned-clock-rates = <1000000>;\n \t\t};\n+\n+\t\ti2c1: i2c@40005400 {\n+\t\t\tcompatible = \"st,stm32f7-i2c\";\n+\t\t\treg = <0x40005400 0x400>;\n+\t\t\tinterrupts = <31>,\n+\t\t\t\t <32>;\n+\t\t\tresets = <&rcc STM32F7_APB1_RESET(I2C1)>;\n+\t\t\tclocks = <&rcc 1 CLK_I2C1>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n \t};\n };\n \n", "prefixes": [ "RESEND", "v3", "4/5" ] }