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GET /api/patches/808340/?format=api
{ "id": 808340, "url": "http://patchwork.ozlabs.org/api/patches/808340/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/patch/1504198860-12951-13-git-send-email-Dave.Martin@arm.com/", "project": { "id": 19, "url": "http://patchwork.ozlabs.org/api/projects/19/?format=api", "name": "Linux IMX development", "link_name": "linux-imx", "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org", "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1504198860-12951-13-git-send-email-Dave.Martin@arm.com>", "list_archive_url": null, "date": "2017-08-31T17:00:44", "name": "[v2,12/28] arm64/sve: Support vector length resetting for new processes", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "88b4ce05587340e850ba1a6a3f1ef60f0fb84c93", "submitter": { "id": 26612, "url": "http://patchwork.ozlabs.org/api/people/26612/?format=api", "name": "Dave Martin", "email": "Dave.Martin@arm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-imx/patch/1504198860-12951-13-git-send-email-Dave.Martin@arm.com/mbox/", "series": [ { "id": 883, "url": "http://patchwork.ozlabs.org/api/series/883/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/list/?series=883", "date": "2017-08-31T17:00:33", "name": "ARM Scalable Vector Extension (SVE)", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/883/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/808340/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/808340/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming-imx@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-imx@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"ODrHFn6D\"; dkim-atps=neutral" ], "Received": [ "from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xjpd95Cx0z9sPm\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tFri, 1 Sep 2017 03:04:29 +1000 (AEST)", "from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dnStF-0000rl-PR; Thu, 31 Aug 2017 17:04:25 +0000", "from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]\n\thelo=foss.arm.com)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dnSqt-0007LS-MZ for linux-arm-kernel@lists.infradead.org;\n\tThu, 31 Aug 2017 17:02:07 +0000", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 53FB71991;\n\tThu, 31 Aug 2017 10:01:38 -0700 (PDT)", "from e103592.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com\n\t[10.72.51.249])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id\n\tA76B93F58F; Thu, 31 Aug 2017 10:01:36 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=MS0MU8UvFGi8OlccHKMcAtfvp+DjVpNYOzkmMA1d7n4=;\n\tb=ODrHFn6DCnJ+NJ\n\tI94euN4ymi3+LTm679hEi5Lq1qhmKZrCyncbij8m9gGX75eQRDPOStSrUMHrEyWaN7n07YNxFaIqv\n\th1vg6h/HnO1nXnWn6sO7KWZNYXDS2PI4TaOazyfuqg7u27QEowjWxGQs7x6+VJqrJmmFEZTs0dlae\n\teFFkI4c5bG+dByyzWhAR5HJD0y++v3tbyEar2ovxXxZYY5On0eAUxfzdlr4r3y9P1NfZHWQrSpAWM\n\tUhJE7RPLeg2SMMHgC3WatUBCy3Wjnh6jBipzASomKufZVzaf11gjlylKf9uJa0eQRLmY36dBAA+pW\n\tycvYGBhDKkPerxX6LuQw==;", "From": "Dave Martin <Dave.Martin@arm.com>", "To": "linux-arm-kernel@lists.infradead.org", "Subject": "[PATCH v2 12/28] arm64/sve: Support vector length resetting for new\n\tprocesses", "Date": "Thu, 31 Aug 2017 18:00:44 +0100", "Message-Id": "<1504198860-12951-13-git-send-email-Dave.Martin@arm.com>", "X-Mailer": "git-send-email 2.1.4", "In-Reply-To": "<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>", "References": "<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>", "MIME-Version": "1.0", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20170831_100200_083195_F27C29B6 ", "X-CRM114-Status": "GOOD ( 15.67 )", "X-Spam-Score": "-6.9 (------)", "X-Spam-Report": "SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]", "X-BeenThere": "linux-arm-kernel@lists.infradead.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-arm-kernel/>", "List-Post": "<mailto:linux-arm-kernel@lists.infradead.org>", "List-Help": "<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>", "Cc": "linux-arch@vger.kernel.org, libc-alpha@sourceware.org, Ard Biesheuvel\n\t<ard.biesheuvel@linaro.org>, Szabolcs Nagy <szabolcs.nagy@arm.com>,\n\tCatalin Marinas\n\t<catalin.marinas@arm.com>, Will Deacon <will.deacon@arm.com>, Richard\n\tSandiford <richard.sandiford@arm.com>, =?utf-8?q?Alex_Benn=C3=A9e?=\n\t<alex.bennee@linaro.org>, kvmarm@lists.cs.columbia.edu", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Sender": "\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>", "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org", "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org" }, "content": "It's desirable to be able to reset the vector length to some sane\ndefault for new processes, since the new binary and its libraries\nprocesses may or may not be SVE-aware.\n\nThis patch tracks the desired post-exec vector length (if any) in a\nnew thread member sve_vl_onexec, and adds a new thread flag\nTIF_SVE_VL_INHERIT to control whether to inherit or reset the\nvector length. Currently these are inactive. Subsequent patches\nwill provide the capability to configure them.\n\nSigned-off-by: Dave Martin <Dave.Martin@arm.com>\nCc: Alex Bennée <alex.bennee@linaro.org>\n\n---\n\nChanges since v1\n----------------\n\nRequested by Alex Bennée:\n\n* Make sve_vl_onexec an unsigned int: that's the type used virtually\neverywhere else, and the memory saving is too minor to be interesting.\n---\n arch/arm64/include/asm/processor.h | 1 +\n arch/arm64/include/asm/thread_info.h | 1 +\n arch/arm64/kernel/fpsimd.c | 16 ++++++++++++----\n 3 files changed, 14 insertions(+), 4 deletions(-)", "diff": "diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h\nindex 4831d28..3faceac 100644\n--- a/arch/arm64/include/asm/processor.h\n+++ b/arch/arm64/include/asm/processor.h\n@@ -87,6 +87,7 @@ struct thread_struct {\n \tstruct fpsimd_state\tfpsimd_state;\n \tvoid\t\t\t*sve_state;\t/* SVE registers, if any */\n \tunsigned int\t\tsve_vl;\t\t/* SVE vector length */\n+\tunsigned int\t\tsve_vl_onexec;\t/* SVE vl after next exec */\n \tunsigned long\t\tfault_address;\t/* fault info */\n \tunsigned long\t\tfault_code;\t/* ESR_EL1 value */\n \tstruct debug_info\tdebug;\t\t/* debugging */\ndiff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h\nindex f0880fc..d3568ab 100644\n--- a/arch/arm64/include/asm/thread_info.h\n+++ b/arch/arm64/include/asm/thread_info.h\n@@ -92,6 +92,7 @@ void arch_setup_new_exec(void);\n #define TIF_SINGLESTEP\t\t21\n #define TIF_32BIT\t\t22\t/* 32bit process */\n #define TIF_SVE\t\t\t23\t/* Scalable Vector Extension in use */\n+#define TIF_SVE_VL_INHERIT\t24\t/* Inherit sve_vl_onexec across exec */\n \n #define _TIF_SIGPENDING\t\t(1 << TIF_SIGPENDING)\n #define _TIF_NEED_RESCHED\t(1 << TIF_NEED_RESCHED)\ndiff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c\nindex 9b1ebd7..e20b44d 100644\n--- a/arch/arm64/kernel/fpsimd.c\n+++ b/arch/arm64/kernel/fpsimd.c\n@@ -106,6 +106,9 @@\n */\n static DEFINE_PER_CPU(struct fpsimd_state *, fpsimd_last_state);\n \n+/* Default VL for tasks that don't set it explicitly: */\n+static int sve_default_vl = SVE_VL_MIN;\n+\n static void sve_free(struct task_struct *task)\n {\n \tkfree(task->thread.sve_state);\n@@ -380,15 +383,20 @@ void fpsimd_flush_thread(void)\n \t\t * If a bug causes this to go wrong, we make some noise and\n \t\t * try to fudge thread.sve_vl to a safe value here.\n \t\t */\n-\t\tvl = current->thread.sve_vl;\n-\n-\t\tif (vl == 0)\n-\t\t\tvl = SVE_VL_MIN;\n+\t\tvl = current->thread.sve_vl_onexec ?\n+\t\t\tcurrent->thread.sve_vl_onexec : sve_default_vl;\n \n \t\tif (WARN_ON(!sve_vl_valid(vl)))\n \t\t\tvl = SVE_VL_MIN;\n \n \t\tcurrent->thread.sve_vl = vl;\n+\n+\t\t/*\n+\t\t * If the task is not set to inherit, ensure that the vector\n+\t\t * length will be reset by a subsequent exec:\n+\t\t */\n+\t\tif (!test_thread_flag(TIF_SVE_VL_INHERIT))\n+\t\t\tcurrent->thread.sve_vl_onexec = 0;\n \t}\n \n \tset_thread_flag(TIF_FOREIGN_FPSTATE);\n", "prefixes": [ "v2", "12/28" ] }