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GET /api/patches/808336/?format=api
{ "id": 808336, "url": "http://patchwork.ozlabs.org/api/patches/808336/?format=api", "web_url": "http://patchwork.ozlabs.org/project/glibc/patch/1504198860-12951-18-git-send-email-Dave.Martin@arm.com/", "project": { "id": 41, "url": "http://patchwork.ozlabs.org/api/projects/41/?format=api", "name": "GNU C Library", "link_name": "glibc", "list_id": "libc-alpha.sourceware.org", "list_email": "libc-alpha@sourceware.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1504198860-12951-18-git-send-email-Dave.Martin@arm.com>", "list_archive_url": null, "date": "2017-08-31T17:00:49", "name": "[v2,17/28] arm64/sve: Preserve SVE registers around kernel-mode NEON use", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "a88782c7224aeb120596794fe0657bc3491dae27", "submitter": { "id": 26612, "url": "http://patchwork.ozlabs.org/api/people/26612/?format=api", "name": "Dave Martin", "email": "Dave.Martin@arm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/glibc/patch/1504198860-12951-18-git-send-email-Dave.Martin@arm.com/mbox/", "series": [ { "id": 882, "url": "http://patchwork.ozlabs.org/api/series/882/?format=api", "web_url": "http://patchwork.ozlabs.org/project/glibc/list/?series=882", "date": "2017-08-31T17:00:32", "name": "ARM Scalable Vector Extension (SVE)", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/882/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/808336/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/808336/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<libc-alpha-return-83974-incoming=patchwork.ozlabs.org@sourceware.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "mailing list libc-alpha@sourceware.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-83974-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"ZMIWZI85\"; dkim-atps=neutral", "sourceware.org; auth=none" ], "Received": [ "from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xjpcS3XMNz9s81\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 1 Sep 2017 03:03:52 +1000 (AEST)", "(qmail 83097 invoked by alias); 31 Aug 2017 17:02:01 -0000", "(qmail 83000 invoked by uid 89); 31 Aug 2017 17:02:01 -0000" ], "DomainKey-Signature": "a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:from:to:cc:subject:date:message-id:in-reply-to\n\t:references; q=dns; s=default; b=oPsOhW1o06dSRZ+/F/MhOszO+81lBKC\n\tDkFqTIVe5VJM59vA8DVoK7TPo91B2W2Del8xTmDhstqmSYEmTLEnd0IA2XrpbwXR\n\tNlV9jNcrR9C1xwuZfNRt78r3GUFlgelYTWlz5pvWhoirJbNOdBqH0Nm9nvLfM2k/\n\tG7vTyDjZCHQ0=", "DKIM-Signature": "v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:from:to:cc:subject:date:message-id:in-reply-to\n\t:references; s=default; bh=GfQowCWGg+y5FlTKkEYOXze5/60=; b=ZMIWZ\n\tI85HzTLROqyM+cwbyZn2PyisGLmc2StbMicpSDl+w61tdH9peOzOOyzchJGwxyvi\n\t27s9P+CQigdHPah4dmdnmhs/7GHQdSFClIPWOOTLsGrAbhd19Lbm8KLabF9j8hsB\n\t6SoMz4rVXw+dE2iN9IjK+QMEnnm6upIuXbbBfw=", "Mailing-List": "contact libc-alpha-help@sourceware.org; run by ezmlm", "Precedence": "bulk", "List-Id": "<libc-alpha.sourceware.org>", "List-Unsubscribe": "<mailto:libc-alpha-unsubscribe-incoming=patchwork.ozlabs.org@sourceware.org>", "List-Subscribe": "<mailto:libc-alpha-subscribe@sourceware.org>", "List-Archive": "<http://sourceware.org/ml/libc-alpha/>", "List-Post": "<mailto:libc-alpha@sourceware.org>", "List-Help": "<mailto:libc-alpha-help@sourceware.org>,\n\t<http://sourceware.org/ml/#faqs>", "Sender": "libc-alpha-owner@sourceware.org", "X-Virus-Found": "No", "X-Spam-SWARE-Status": "No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0,\n\tGIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RP_MATCHES_RCVD,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=", "X-HELO": "foss.arm.com", "From": "Dave Martin <Dave.Martin@arm.com>", "To": "linux-arm-kernel@lists.infradead.org", "Cc": "Catalin Marinas <catalin.marinas@arm.com>, Will Deacon\n\t<will.deacon@arm.com>, \tArd Biesheuvel <ard.biesheuvel@linaro.org>,\n\t=?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= <alex.bennee@linaro.org>,\n\tSzabolcs Nagy <szabolcs.nagy@arm.com>, Richard Sandiford\n\t<richard.sandiford@arm.com>, \tkvmarm@lists.cs.columbia.edu,\n\tlibc-alpha@sourceware.org, \tlinux-arch@vger.kernel.org", "Subject": "[PATCH v2 17/28] arm64/sve: Preserve SVE registers around\n\tkernel-mode NEON use", "Date": "Thu, 31 Aug 2017 18:00:49 +0100", "Message-Id": "<1504198860-12951-18-git-send-email-Dave.Martin@arm.com>", "In-Reply-To": "<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>", "References": "<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>" }, "content": "Kernel-mode NEON will corrupt the SVE vector registers, due to the\nway they alias the FPSIMD vector registers in the hardware.\n\nThis patch ensures that any live SVE register content for the task\nis saved by kernel_neon_begin(). The data will be restored in the\nusual way on return to userspace.\n\nSigned-off-by: Dave Martin <Dave.Martin@arm.com>\nReviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>\n---\n arch/arm64/kernel/fpsimd.c | 6 ++++--\n 1 file changed, 4 insertions(+), 2 deletions(-)", "diff": "diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c\nindex cea05a7..dd89acf 100644\n--- a/arch/arm64/kernel/fpsimd.c\n+++ b/arch/arm64/kernel/fpsimd.c\n@@ -744,8 +744,10 @@ void kernel_neon_begin(void)\n \t__this_cpu_write(kernel_neon_busy, true);\n \n \t/* Save unsaved task fpsimd state, if any: */\n-\tif (current->mm && !test_and_set_thread_flag(TIF_FOREIGN_FPSTATE))\n-\t\tfpsimd_save_state(¤t->thread.fpsimd_state);\n+\tif (current->mm) {\n+\t\ttask_fpsimd_save();\n+\t\tset_thread_flag(TIF_FOREIGN_FPSTATE);\n+\t}\n \n \t/* Invalidate any task state remaining in the fpsimd regs: */\n \t__this_cpu_write(fpsimd_last_state, NULL);\n", "prefixes": [ "v2", "17/28" ] }