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{
    "id": 807656,
    "url": "http://patchwork.ozlabs.org/api/patches/807656/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20170830142454.10971-2-jglauber@cavium.com/",
    "project": {
        "id": 28,
        "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api",
        "name": "Linux PCI development",
        "link_name": "linux-pci",
        "list_id": "linux-pci.vger.kernel.org",
        "list_email": "linux-pci@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20170830142454.10971-2-jglauber@cavium.com>",
    "list_archive_url": null,
    "date": "2017-08-30T14:24:52",
    "name": "[v3,1/3] PCI: Allow PCI_DEV_FLAGS_NO_BUS_RESET to be used on bus device",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": false,
    "hash": "65c8c059234e4a22d2dacaeab8f51002b7d9cb53",
    "submitter": {
        "id": 68350,
        "url": "http://patchwork.ozlabs.org/api/people/68350/?format=api",
        "name": "Jan Glauber",
        "email": "jglauber@cavium.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20170830142454.10971-2-jglauber@cavium.com/mbox/",
    "series": [
        {
            "id": 624,
            "url": "http://patchwork.ozlabs.org/api/series/624/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=624",
            "date": "2017-08-30T14:24:51",
            "name": "Workaround for bus/slot reset on Cavium cn8xxx root ports",
            "version": 3,
            "mbox": "http://patchwork.ozlabs.org/series/624/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/807656/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/807656/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<linux-pci-owner@vger.kernel.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org",
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            "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751728AbdH3OZN (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tWed, 30 Aug 2017 10:25:13 -0400",
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        "X-Received": "by 10.28.157.19 with SMTP id g19mr1312673wme.42.1504103109598;\n\tWed, 30 Aug 2017 07:25:09 -0700 (PDT)",
        "From": "Jan Glauber <jglauber@cavium.com>",
        "To": "Bjorn Helgaas <bhelgaas@google.com>",
        "Cc": "linux-pci@vger.kernel.org, Alex Williamson <alex.williamson@redhat.com>,\n\tlinux-kernel@vger.kernel.org, david.daney@cavium.com,\n\tJon Masters <jcm@redhat.com>, Robert Richter <robert.richter@cavium.com>,\n\tlinux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org,\n\tJan Glauber <jglauber@cavium.com>",
        "Subject": "[PATCH v3 1/3] PCI: Allow PCI_DEV_FLAGS_NO_BUS_RESET to be used on\n\tbus device",
        "Date": "Wed, 30 Aug 2017 16:24:52 +0200",
        "Message-Id": "<20170830142454.10971-2-jglauber@cavium.com>",
        "X-Mailer": "git-send-email 2.9.0.rc0.21.g7777322",
        "In-Reply-To": "<20170830142454.10971-1-jglauber@cavium.com>",
        "References": "<20170830142454.10971-1-jglauber@cavium.com>",
        "Sender": "linux-pci-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<linux-pci.vger.kernel.org>",
        "X-Mailing-List": "linux-pci@vger.kernel.org"
    },
    "content": "From: David Daney <david.daney@cavium.com>\n\nWhen checking to see if a PCI bus can safely be reset, we check to see\nif any of the children have their PCI_DEV_FLAGS_NO_BUS_RESET flag set.\nAs these devices are known not to behave well after a bus reset.\n\nSome PCIe root port bridges also do not behave well after a bus reset,\nsometimes causing the devices behind the bridge to become unusable.\n\nAdd a check for the PCI_DEV_FLAGS_NO_BUS_RESET flag being set in the\nbridge device to allow these bridges to be flagged, and prevent their\nbuses from being reset.\n\nA follow on patch will add a quirk for this type of bridge.\n\nSigned-off-by: David Daney <david.daney@cavium.com>\n[jglauber@cavium.com: fixed typo]\nSigned-off-by: Jan Glauber <jglauber@cavium.com>\n---\n drivers/pci/pci.c | 4 ++++\n 1 file changed, 4 insertions(+)",
    "diff": "diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c\nindex af0cc34..d9abbc9 100644\n--- a/drivers/pci/pci.c\n+++ b/drivers/pci/pci.c\n@@ -4290,6 +4290,10 @@ static bool pci_bus_resetable(struct pci_bus *bus)\n {\n \tstruct pci_dev *dev;\n \n+\n+\tif (bus->self && (bus->self->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET))\n+\t\treturn false;\n+\n \tlist_for_each_entry(dev, &bus->devices, bus_list) {\n \t\tif (dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET ||\n \t\t    (dev->subordinate && !pci_bus_resetable(dev->subordinate)))\n",
    "prefixes": [
        "v3",
        "1/3"
    ]
}