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GET /api/patches/807456/?format=api
{ "id": 807456, "url": "http://patchwork.ozlabs.org/api/patches/807456/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20170830080548.17383-1-dirk.behme@de.bosch.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170830080548.17383-1-dirk.behme@de.bosch.com>", "list_archive_url": null, "date": "2017-08-30T08:05:48", "name": "pinctrl: sh-pfc: r8a7795: Re-add DRIF support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "b18372bcc52ceef3acf944f5d5d0a2873aa2aa34", "submitter": { "id": 10121, "url": "http://patchwork.ozlabs.org/api/people/10121/?format=api", "name": "Dirk Behme", "email": "dirk.behme@de.bosch.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20170830080548.17383-1-dirk.behme@de.bosch.com/mbox/", "series": [ { "id": 542, "url": "http://patchwork.ozlabs.org/api/series/542/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=542", "date": "2017-08-30T08:05:48", "name": "pinctrl: sh-pfc: r8a7795: Re-add DRIF support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/542/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/807456/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/807456/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-gpio-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=de.bosch.com header.i=@de.bosch.com\n\theader.b=\"cBXlqyG/\"; dkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xhykH6yblz9t16\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 30 Aug 2017 18:05:59 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751039AbdH3IF4 (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tWed, 30 Aug 2017 04:05:56 -0400", "from smtp6-v.fe.bosch.de ([139.15.237.11]:43096 \"EHLO\n\tsmtp6-v.fe.bosch.de\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750839AbdH3IFy (ORCPT\n\t<rfc822; linux-gpio@vger.kernel.org>); Wed, 30 Aug 2017 04:05:54 -0400", "from vsmta13.fe.internet.bosch.com (unknown [10.4.98.53])\n\tby imta23.fe.bosch.de (Postfix) with ESMTP id 9F88D158021E;\n\tWed, 30 Aug 2017 10:05:33 +0200 (CEST)", "from FE-HUB1000.de.bosch.com (vsgw23.fe.internet.bosch.com\n\t[10.4.98.23])\n\tby vsmta13.fe.internet.bosch.com (Postfix) with ESMTP id 597852E40B03;\n\tWed, 30 Aug 2017 10:05:52 +0200 (CEST)", "from HI-Z0EVG.hi.de.bosch.com (10.34.218.219) by\n\tFE-HUB1000.de.bosch.com (10.4.103.107) with Microsoft SMTP Server id\n\t14.3.319.2; Wed, 30 Aug 2017 10:05:51 +0200", "from HI-Z0EVG.hi.de.bosch.com (localhost [IPv6:::1]) by\n\tHI-Z0EVG.hi.de.bosch.com (Postfix) with ESMTP id C27ED1B4681B;\n\tWed, 30 Aug 2017 10:05:51 +0200 (CEST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=de.bosch.com;\n\ts=2015-01-21; t=1504080333;\n\tbh=wBGSuZdlfqfNgkvwdY57dlzFiQ023Zq5+ukX0KJHdrg=; l=10;\n\th=From:From:Reply-To:Sender;\n\tb=cBXlqyG/itCfiFMGONs4XEuiJpWLlf1TPmrEqU7ETXmaPiO5hUxKiu5bX4cTcwXyP\n\tJ1xBtOrXwcrs8L7ZRsfbOAaAal/qJWx5HnUV5w871qS6xeOTWTQZ+6+wBkhXNrLg3b\n\tQBjMcK5xmyEcVa1pciQeFa3+bajaia+a1mH/0/iQ=", "From": "Dirk Behme <dirk.behme@de.bosch.com>", "To": "<linux-gpio@vger.kernel.org>, <linux-renesas-soc@vger.kernel.org>", "CC": "Geert Uytterhoeven <geert@linux-m68k.org>,\n\tDirk Behme <dirk.behme@de.bosch.com>", "Subject": "[PATCH] pinctrl: sh-pfc: r8a7795: Re-add DRIF support", "Date": "Wed, 30 Aug 2017 10:05:48 +0200", "Message-ID": "<20170830080548.17383-1-dirk.behme@de.bosch.com>", "X-Mailer": "git-send-email 2.14.1", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-TM-AS-MML": "disable", "X-TM-AS-Product-Ver": "IMSS-7.1.0.1679-8.0.0.1202-23286.006", "X-TMASE-MatchedRID": "6pbNFWS8cDsBikHRXe6zb7iMC5wdwKqdudcAdgVI8xlXPwnnY5XL5CC8\n\twrvgBlCZThbvLLI8RvN+8BOKv4EeDNr9NriaWGfDz3w1PUxa4e8cg65CMI4oW5soi2XrUn/Jn6K\n\tdMrRsL14qtq5d3cxkNWFWO1NSUpHgP9lI4brkT1AVwbxtb0Jntm5D5zwbg1rk1GQBKmzS6VQ=", "Sender": "linux-gpio-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-gpio.vger.kernel.org>", "X-Mailing-List": "linux-gpio@vger.kernel.org" }, "content": "DRIF support for r8a7795 was initially added with commit 2d775831988\n(\"pinctrl: sh-pfc: r8a7795: Add DRIF support\") and later dropped from\nthe new pfc-r8a7795.c while re-naming the initial pfc-r8a7795.c to\npfc-r8a7795-es1.c in commit b205914c8f8 (\"pinctrl: sh-pfc: r8a7795:\nAdd support for R-Car H3 ES2.0\"). As the DRIF doesn't differ, re-add\nit here.\n\nSigned-off-by: Dirk Behme <dirk.behme@de.bosch.com>\n---\n\nPatch based on sh-pfc-for-v4.14-tag1 \n\n drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 291 +++++++++++++++++++++++++++++++++++\n 1 file changed, 291 insertions(+)", "diff": "diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c\nindex b225bc2f9bea..9e420f7fed72 100644\n--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c\n+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c\n@@ -1659,6 +1659,221 @@ static const unsigned int avb_avtp_capture_b_mux[] = {\n \tAVB_AVTP_CAPTURE_B_MARK,\n };\n \n+/* - DRIF0 --------------------------------------------------------------- */\n+static const unsigned int drif0_ctrl_a_pins[] = {\n+\t/* CLK, SYNC */\n+\tRCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),\n+};\n+static const unsigned int drif0_ctrl_a_mux[] = {\n+\tRIF0_CLK_A_MARK, RIF0_SYNC_A_MARK,\n+};\n+static const unsigned int drif0_data0_a_pins[] = {\n+\t/* D0 */\n+\tRCAR_GP_PIN(6, 10),\n+};\n+static const unsigned int drif0_data0_a_mux[] = {\n+\tRIF0_D0_A_MARK,\n+};\n+static const unsigned int drif0_data1_a_pins[] = {\n+\t/* D1 */\n+\tRCAR_GP_PIN(6, 7),\n+};\n+static const unsigned int drif0_data1_a_mux[] = {\n+\tRIF0_D1_A_MARK,\n+};\n+static const unsigned int drif0_ctrl_b_pins[] = {\n+\t/* CLK, SYNC */\n+\tRCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4),\n+};\n+static const unsigned int drif0_ctrl_b_mux[] = {\n+\tRIF0_CLK_B_MARK, RIF0_SYNC_B_MARK,\n+};\n+static const unsigned int drif0_data0_b_pins[] = {\n+\t/* D0 */\n+\tRCAR_GP_PIN(5, 1),\n+};\n+static const unsigned int drif0_data0_b_mux[] = {\n+\tRIF0_D0_B_MARK,\n+};\n+static const unsigned int drif0_data1_b_pins[] = {\n+\t/* D1 */\n+\tRCAR_GP_PIN(5, 2),\n+};\n+static const unsigned int drif0_data1_b_mux[] = {\n+\tRIF0_D1_B_MARK,\n+};\n+static const unsigned int drif0_ctrl_c_pins[] = {\n+\t/* CLK, SYNC */\n+\tRCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 15),\n+};\n+static const unsigned int drif0_ctrl_c_mux[] = {\n+\tRIF0_CLK_C_MARK, RIF0_SYNC_C_MARK,\n+};\n+static const unsigned int drif0_data0_c_pins[] = {\n+\t/* D0 */\n+\tRCAR_GP_PIN(5, 13),\n+};\n+static const unsigned int drif0_data0_c_mux[] = {\n+\tRIF0_D0_C_MARK,\n+};\n+static const unsigned int drif0_data1_c_pins[] = {\n+\t/* D1 */\n+\tRCAR_GP_PIN(5, 14),\n+};\n+static const unsigned int drif0_data1_c_mux[] = {\n+\tRIF0_D1_C_MARK,\n+};\n+/* - DRIF1 --------------------------------------------------------------- */\n+static const unsigned int drif1_ctrl_a_pins[] = {\n+\t/* CLK, SYNC */\n+\tRCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),\n+};\n+static const unsigned int drif1_ctrl_a_mux[] = {\n+\tRIF1_CLK_A_MARK, RIF1_SYNC_A_MARK,\n+};\n+static const unsigned int drif1_data0_a_pins[] = {\n+\t/* D0 */\n+\tRCAR_GP_PIN(6, 19),\n+};\n+static const unsigned int drif1_data0_a_mux[] = {\n+\tRIF1_D0_A_MARK,\n+};\n+static const unsigned int drif1_data1_a_pins[] = {\n+\t/* D1 */\n+\tRCAR_GP_PIN(6, 20),\n+};\n+static const unsigned int drif1_data1_a_mux[] = {\n+\tRIF1_D1_A_MARK,\n+};\n+static const unsigned int drif1_ctrl_b_pins[] = {\n+\t/* CLK, SYNC */\n+\tRCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 3),\n+};\n+static const unsigned int drif1_ctrl_b_mux[] = {\n+\tRIF1_CLK_B_MARK, RIF1_SYNC_B_MARK,\n+};\n+static const unsigned int drif1_data0_b_pins[] = {\n+\t/* D0 */\n+\tRCAR_GP_PIN(5, 7),\n+};\n+static const unsigned int drif1_data0_b_mux[] = {\n+\tRIF1_D0_B_MARK,\n+};\n+static const unsigned int drif1_data1_b_pins[] = {\n+\t/* D1 */\n+\tRCAR_GP_PIN(5, 8),\n+};\n+static const unsigned int drif1_data1_b_mux[] = {\n+\tRIF1_D1_B_MARK,\n+};\n+static const unsigned int drif1_ctrl_c_pins[] = {\n+\t/* CLK, SYNC */\n+\tRCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 11),\n+};\n+static const unsigned int drif1_ctrl_c_mux[] = {\n+\tRIF1_CLK_C_MARK, RIF1_SYNC_C_MARK,\n+};\n+static const unsigned int drif1_data0_c_pins[] = {\n+\t/* D0 */\n+\tRCAR_GP_PIN(5, 6),\n+};\n+static const unsigned int drif1_data0_c_mux[] = {\n+\tRIF1_D0_C_MARK,\n+};\n+static const unsigned int drif1_data1_c_pins[] = {\n+\t/* D1 */\n+\tRCAR_GP_PIN(5, 10),\n+};\n+static const unsigned int drif1_data1_c_mux[] = {\n+\tRIF1_D1_C_MARK,\n+};\n+/* - DRIF2 --------------------------------------------------------------- */\n+static const unsigned int drif2_ctrl_a_pins[] = {\n+\t/* CLK, SYNC */\n+\tRCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),\n+};\n+static const unsigned int drif2_ctrl_a_mux[] = {\n+\tRIF2_CLK_A_MARK, RIF2_SYNC_A_MARK,\n+};\n+static const unsigned int drif2_data0_a_pins[] = {\n+\t/* D0 */\n+\tRCAR_GP_PIN(6, 7),\n+};\n+static const unsigned int drif2_data0_a_mux[] = {\n+\tRIF2_D0_A_MARK,\n+};\n+static const unsigned int drif2_data1_a_pins[] = {\n+\t/* D1 */\n+\tRCAR_GP_PIN(6, 10),\n+};\n+static const unsigned int drif2_data1_a_mux[] = {\n+\tRIF2_D1_A_MARK,\n+};\n+static const unsigned int drif2_ctrl_b_pins[] = {\n+\t/* CLK, SYNC */\n+\tRCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27),\n+};\n+static const unsigned int drif2_ctrl_b_mux[] = {\n+\tRIF2_CLK_B_MARK, RIF2_SYNC_B_MARK,\n+};\n+static const unsigned int drif2_data0_b_pins[] = {\n+\t/* D0 */\n+\tRCAR_GP_PIN(6, 30),\n+};\n+static const unsigned int drif2_data0_b_mux[] = {\n+\tRIF2_D0_B_MARK,\n+};\n+static const unsigned int drif2_data1_b_pins[] = {\n+\t/* D1 */\n+\tRCAR_GP_PIN(6, 31),\n+};\n+static const unsigned int drif2_data1_b_mux[] = {\n+\tRIF2_D1_B_MARK,\n+};\n+/* - DRIF3 --------------------------------------------------------------- */\n+static const unsigned int drif3_ctrl_a_pins[] = {\n+\t/* CLK, SYNC */\n+\tRCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),\n+};\n+static const unsigned int drif3_ctrl_a_mux[] = {\n+\tRIF3_CLK_A_MARK, RIF3_SYNC_A_MARK,\n+};\n+static const unsigned int drif3_data0_a_pins[] = {\n+\t/* D0 */\n+\tRCAR_GP_PIN(6, 19),\n+};\n+static const unsigned int drif3_data0_a_mux[] = {\n+\tRIF3_D0_A_MARK,\n+};\n+static const unsigned int drif3_data1_a_pins[] = {\n+\t/* D1 */\n+\tRCAR_GP_PIN(6, 20),\n+};\n+static const unsigned int drif3_data1_a_mux[] = {\n+\tRIF3_D1_A_MARK,\n+};\n+static const unsigned int drif3_ctrl_b_pins[] = {\n+\t/* CLK, SYNC */\n+\tRCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25),\n+};\n+static const unsigned int drif3_ctrl_b_mux[] = {\n+\tRIF3_CLK_B_MARK, RIF3_SYNC_B_MARK,\n+};\n+static const unsigned int drif3_data0_b_pins[] = {\n+\t/* D0 */\n+\tRCAR_GP_PIN(6, 28),\n+};\n+static const unsigned int drif3_data0_b_mux[] = {\n+\tRIF3_D0_B_MARK,\n+};\n+static const unsigned int drif3_data1_b_pins[] = {\n+\t/* D1 */\n+\tRCAR_GP_PIN(6, 29),\n+};\n+static const unsigned int drif3_data1_b_mux[] = {\n+\tRIF3_D1_B_MARK,\n+};\n+\n /* - DU --------------------------------------------------------------------- */\n static const unsigned int du_rgb666_pins[] = {\n \t/* R[7:2], G[7:2], B[7:2] */\n@@ -3001,6 +3216,36 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {\n \tSH_PFC_PIN_GROUP(avb_avtp_capture_a),\n \tSH_PFC_PIN_GROUP(avb_avtp_match_b),\n \tSH_PFC_PIN_GROUP(avb_avtp_capture_b),\n+\tSH_PFC_PIN_GROUP(drif0_ctrl_a),\n+\tSH_PFC_PIN_GROUP(drif0_data0_a),\n+\tSH_PFC_PIN_GROUP(drif0_data1_a),\n+\tSH_PFC_PIN_GROUP(drif0_ctrl_b),\n+\tSH_PFC_PIN_GROUP(drif0_data0_b),\n+\tSH_PFC_PIN_GROUP(drif0_data1_b),\n+\tSH_PFC_PIN_GROUP(drif0_ctrl_c),\n+\tSH_PFC_PIN_GROUP(drif0_data0_c),\n+\tSH_PFC_PIN_GROUP(drif0_data1_c),\n+\tSH_PFC_PIN_GROUP(drif1_ctrl_a),\n+\tSH_PFC_PIN_GROUP(drif1_data0_a),\n+\tSH_PFC_PIN_GROUP(drif1_data1_a),\n+\tSH_PFC_PIN_GROUP(drif1_ctrl_b),\n+\tSH_PFC_PIN_GROUP(drif1_data0_b),\n+\tSH_PFC_PIN_GROUP(drif1_data1_b),\n+\tSH_PFC_PIN_GROUP(drif1_ctrl_c),\n+\tSH_PFC_PIN_GROUP(drif1_data0_c),\n+\tSH_PFC_PIN_GROUP(drif1_data1_c),\n+\tSH_PFC_PIN_GROUP(drif2_ctrl_a),\n+\tSH_PFC_PIN_GROUP(drif2_data0_a),\n+\tSH_PFC_PIN_GROUP(drif2_data1_a),\n+\tSH_PFC_PIN_GROUP(drif2_ctrl_b),\n+\tSH_PFC_PIN_GROUP(drif2_data0_b),\n+\tSH_PFC_PIN_GROUP(drif2_data1_b),\n+\tSH_PFC_PIN_GROUP(drif3_ctrl_a),\n+\tSH_PFC_PIN_GROUP(drif3_data0_a),\n+\tSH_PFC_PIN_GROUP(drif3_data1_a),\n+\tSH_PFC_PIN_GROUP(drif3_ctrl_b),\n+\tSH_PFC_PIN_GROUP(drif3_data0_b),\n+\tSH_PFC_PIN_GROUP(drif3_data1_b),\n \tSH_PFC_PIN_GROUP(du_rgb666),\n \tSH_PFC_PIN_GROUP(du_rgb888),\n \tSH_PFC_PIN_GROUP(du_clk_out_0),\n@@ -3195,6 +3440,48 @@ static const char * const avb_groups[] = {\n \t\"avb_avtp_capture_b\",\n };\n \n+static const char * const drif0_groups[] = {\n+\t\"drif0_ctrl_a\",\n+\t\"drif0_data0_a\",\n+\t\"drif0_data1_a\",\n+\t\"drif0_ctrl_b\",\n+\t\"drif0_data0_b\",\n+\t\"drif0_data1_b\",\n+\t\"drif0_ctrl_c\",\n+\t\"drif0_data0_c\",\n+\t\"drif0_data1_c\",\n+};\n+\n+static const char * const drif1_groups[] = {\n+\t\"drif1_ctrl_a\",\n+\t\"drif1_data0_a\",\n+\t\"drif1_data1_a\",\n+\t\"drif1_ctrl_b\",\n+\t\"drif1_data0_b\",\n+\t\"drif1_data1_b\",\n+\t\"drif1_ctrl_c\",\n+\t\"drif1_data0_c\",\n+\t\"drif1_data1_c\",\n+};\n+\n+static const char * const drif2_groups[] = {\n+\t\"drif2_ctrl_a\",\n+\t\"drif2_data0_a\",\n+\t\"drif2_data1_a\",\n+\t\"drif2_ctrl_b\",\n+\t\"drif2_data0_b\",\n+\t\"drif2_data1_b\",\n+};\n+\n+static const char * const drif3_groups[] = {\n+\t\"drif3_ctrl_a\",\n+\t\"drif3_data0_a\",\n+\t\"drif3_data1_a\",\n+\t\"drif3_ctrl_b\",\n+\t\"drif3_data0_b\",\n+\t\"drif3_data1_b\",\n+};\n+\n static const char * const du_groups[] = {\n \t\"du_rgb666\",\n \t\"du_rgb888\",\n@@ -3457,6 +3744,10 @@ static const char * const usb2_ch3_groups[] = {\n \n static const struct sh_pfc_function pinmux_functions[] = {\n \tSH_PFC_FUNCTION(avb),\n+\tSH_PFC_FUNCTION(drif0),\n+\tSH_PFC_FUNCTION(drif1),\n+\tSH_PFC_FUNCTION(drif2),\n+\tSH_PFC_FUNCTION(drif3),\n \tSH_PFC_FUNCTION(du),\n \tSH_PFC_FUNCTION(msiof0),\n \tSH_PFC_FUNCTION(msiof1),\n", "prefixes": [] }